Infineon IPB407N30N Metal oxide semiconductor field effect transistor Datasheet

MOSFET
MetalOxideSemiconductorFieldEffectTransistor
OptiMOSTM
OptiMOSTMPower-Transistor,300V
IPB407N30N
DataSheet
Rev.2.0
Final
PowerManagement&Multimarket
OptiMOSTMPower-Transistor,300V
IPB407N30N
1Description
D²PAK
Features
•N-channel,normallevel
•FastDiodewithreducedQrr
•Optimizedforhardcommutationruggedness
•Verylowon-resistanceRDS(on)
•175°Coperatingtemperature
•Pb-freeleadplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplication
•Halogen-freeaccordingtoIEC61249-2-21
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
300
V
RDS(on),max
40.7
mΩ
ID
44
A
Drain
Pin 2, Tab
Gate
Pin 1
Source
Pin 3
Type/OrderingCode
Package
Marking
RelatedLinks
IPB407N30N
PG-TO 263-3
407N30N
-
1)
J-STD20 and JESD22
Final Data Sheet
2
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
3
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
2Maximumratings
atTj=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
44
34
A
TC=25°C
TC=100°C
-
176
A
TC=25°C
-
-
240
mJ
ID=22A,RGS=50Ω
dv/dt
-
-
60
kV/µs
ID=44A,VDS=150V,
di/dt=1000A/µs,Tj,max=175°C
Gate source voltage
VGS
-20
-
20
V
-
Diode hard commutation destructive
current2)
Ptot
-
-
300
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current1)
ID,pulse
-
Avalanche energy, single pulse
EAS
Reversediodepeakdv/dt
3Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case3)
Values
Min.
Typ.
Max.
RthJC
-
0.3
0.5
K/W
-
Thermal resistance, junction - ambient,
RthJA
minimal footprint
-
-
62
K/W
-
Thermal resistance, junction - ambient,
RthJA
6 cm2 cooling area4)
-
-
40
K/W
-
1)
See figure 3
Diode pulse current is defined by thermal and/or package limits
3)
Defined by design. Not subject to production test.
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
2)
Final Data Sheet
4
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
4Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3
4
V
VDS=VGS,ID=270µA
-
1
10
10
300
µA
VDS=240V,VGS=0V,Tj=25°C
VDS=240V,VGS=0V,Tj=125°C
IGSS
-
1
100
nA
VGS=20V,VDS=0V
RDS(on)
-
36
40.7
mΩ
VGS=10V,ID=44A
Gate resistance
RG
-
2.4
3.6
Ω
-
Transconductance
gfs
52
103
-
S
|VDS|>2|ID|RDS(on)max,ID=44A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
300
-
Gate threshold voltage
VGS(th)
2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Drain-source on-state resistance
1)
Table5Dynamiccharacteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Ciss
-
5400
7180
pF
VGS=0V,VDS=100V,f=1MHz
Output capacitance
Coss
-
281
374
pF
VGS=0V,VDS=100V,f=1MHz
Reverse transfer capacitance1)
Crss
-
6
13
pF
VGS=0V,VDS=100V,f=1MHz
Turn-on delay time
td(on)
-
16
-
ns
VDD=100V,VGS=10V,ID=22A,
RG,ext=1.6Ω
Rise time
tr
-
9
-
ns
VDD=100V,VGS=10V,ID=22A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
43
-
ns
VDD=100V,VGS=10V,ID=22A,
RG,ext=1.6Ω
Fall time
tf
-
9
-
ns
VDD=100V,VGS=10V,ID=22A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Input capacitance1)
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Values
Min.
Typ.
Max.
Qgs
-
24
-
nC
VDD=100V,ID=44A,VGS=0to10V
Gate to drain charge
Qgd
-
7
-
nC
VDD=100V,ID=44A,VGS=0to10V
Switching charge
Qsw
-
15
-
nC
VDD=100V,ID=44A,VGS=0to10V
Gate charge total
Qg
-
65
87
nC
VDD=100V,ID=44A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.4
-
V
VDD=100V,ID=44A,VGS=0to10V
Output charge
Qoss
-
131
-
nC
VDD=100V,VGS=0V
1)
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
5
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
Table7Reversediode
Parameter
Symbol
Values
Unit
Note/TestCondition
44
A
TC=25°C
-
176
A
TC=25°C
-
-
44
A
TC=25°C,diF/dt=1000A/µs
VSD
-
0.9
1.2
V
VGS=0V,IF=44A,Tj=25°C
trr
-
152
304
ns
VR=100V,IF=32.2A,diF/dt=100A/µs
Qrr
-
844
1689
nC
VR=100V,IF=32.2A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
Diode hard commutation current
IS,hard
Diode forward voltage
Diode continous forward current
1)
Diode pulse current
2)
3)
Reverse recovery time
3)
Reverse recovery charge
1)
Diode pulse current is defined by thermal and/or package limits
Maximum allowed hard-commutated current through diode at di/dt=1000 A/µs
3)
Defined by design. Not subject to production test.
2)
Final Data Sheet
6
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
5Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
350
50
300
40
30
200
ID[A]
Ptot[W]
250
150
20
100
10
50
0
0
50
100
150
0
200
0
50
100
TC[°C]
150
200
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS>=10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
100
10
1 µs
2
10 µs
10
0.5
ZthJC[K/W]
ID[A]
100 µs
1 ms
101
10-1
0.2
0.1
10 ms
0.05
0
10
0.02
DC
0.01
single pulse
10-1
10-1
100
101
102
103
10-2
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
7
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
50
10 V
100
40
8V
6V
ID[A]
RDS(on)[mΩ]
5V
50
8V
10 V
30
20
10
0
0
1
2
3
4
0
5
0
20
VDS[V]
40
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
90
150
75
125
60
100
gfs[S]
ID[A]
60
80
60
80
ID[A]
45
30
75
50
175 °C
15
25
25 °C
0
0
2
4
6
0
0
VGS[V]
40
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
20
gfs=f(ID);Tj=25°C
8
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
120
4
100
2700 µA
3
270 µA
60
VGS(th)[V]
RDS(on)[mΩ]
80
98%
typ
2
40
1
20
0
-60
-20
20
60
100
140
0
-60
180
-10
Tj[°C]
40
90
140
190
Tj[°C]
RDS(on)=f(Tj);ID=44A;VGS=10V
VGS(th)=f(Tj);VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
Ciss
25 °C
175 °C
25°C, 98%
175°C, 98%
Coss
103
IF[A]
C[pF]
102
102
Crss
101
101
100
0
50
100
150
200
250
100
0.0
0.5
VDS[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
1.5
2.0
VSD[V]
IF=f(VSD);parameter:Tj
9
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
102
10
8
240 V
101
150 V
6
25 °C
VGS[V]
IAS[A]
100 °C
125 °C
60 V
4
2
100
100
101
102
103
0
0
tAV[µs]
20
40
60
80
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=44Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
340
330
VBR(DSS)[V]
320
310
300
290
280
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
10
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
6PackageOutlines
Figure1OutlinePG-TO263-3,dimensionsinmm/inches
Final Data Sheet
11
Rev.2.0,2014-12-27
OptiMOSTMPower-Transistor,300V
IPB407N30N
RevisionHistory
IPB407N30N
Revision:2014-12-27,Rev.2.0
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2014-12-27
Release of final version
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respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication
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Final Data Sheet
12
Rev.2.0,2014-12-27
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