Rohm BD8961NV Synchronous buck converter with integrated fet Datasheet

Datasheet
4.5V to 5.5V, 2.0A 1ch
Synchronous Buck Converter with Integrated FET
BD8961NV
General Description
Key Specification








The BD8961NV is ROHM's high efficiency step-down
switching regulator designed to produce a voltage as
low as 3.3V from a supply voltage of 5V. It offers high
efficiency by using synchronous switches and provides
fast transient response to sudden load changes by
implementing current mode control.
Features






Fast Transient Response because of Current Mode
Control System
High Efficiency for All Load Ranges because of
Synchronous Switches (Nch/Pch FET)
Soft-Start Function
Thermal Shutdown and UVLO Functions
Short Circuit Protection with Time Delay Function
Shutdown Function
Input Voltage Range:
Output Voltage:
Output Current:
Switching Frequency:
Pch FET ON-Resistance:
Nch FET ON-Resistance:
Standby Current:
Operating Temperature Range:
Package
4.5V to 5.5V
3.3V(Typ)
2.0A (Max)
1.0MHz(Typ)
200mΩ(Typ)
150mΩ(Typ)
0μA (Typ)
-25°C to +105°C
W(Typ) x D(Typ) x H(Max)
Applications
Power Supply for LSI including DSP, Microcomputer and
ASIC
SON008V5060
5.00mm x 6.00mm x 1.00mm
Typical Application Circuit
VCC
CIN
L
EN
VOUT
VCC,PVCC
SW
VOUT
VOUT
CO
ITH
GND,PGND
RITH
CITH
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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BD8961NV
Datasheet
Pin Configuration
TOP VIEW
VOUT
1
8
8
EN
VCC
2
7
PVCC
ITH
3
6
SW
GND
4
5
PGND
Figure 2. Pin Configuration
Pin Description
Pin No.
1
2
3
4
5
6
7
8
Pin Name
VOUT
VCC
ITH
GND
PGND
SW
PVCC
EN
Pin Function
Output voltage pin
VCC power supply input pin
GmAmp output pin/connected phase compensation capacitor
Ground pin
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
Enable pin (Active High)
Block Diagram
VCC
PVCC
VCC
Figure 3. Block Diagram
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Datasheet
Absolute Maximum Ratings
Parameter
VCC Voltage
PVCC Voltage
EN Voltage
Symbol
Rating
Unit
VCC
-0.3 to +7 (Note 1)
V
(Note 1)
V
PVCC
-0.3 to +7
VEN
SW,ITH Voltage
-0.3 to +7
V
VSW,VITH
-0.3 to +7
V
Power Dissipation 1
Pd1
0.90 (Note 2)
W
Power Dissipation 2
Pd2
3.90 (Note 3)
W
Operating Temperature Range
Topr
-25 to +105
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
+150
°C
Maximum Junction Temperature
(Note 1) Pd should not be exceeded.
(Note 2) Mounted on 1 layer 70mm x 70mm x 1.6mm Glass Epoxy PCB (the density of copper:3%). Reduce by 7.2mW/°C for Ta over 25°C.
(Note 3) Mounted on JESD51-7. Reduce by 31.2mW/°C for Ta over 25°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated
over the absolute maximum ratings.
Recommended Operating Conditions (Ta=25°C)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
VCC Voltage
VCC (Note 4)
4.5
5.0
5.5
V
PVCC Voltage
PVCC (Note 4)
4.5
5.0
5.5
V
VEN
0
-
VCC
V
-
-
2.0
A
EN Voltage
SW Average Output Current
ISW
(Note 4)
(Note 4) Pd should not be exceeded.
Electrical Characteristics (Ta=25°C, VCC=PVCC=3.3V, VEN=VCC)
Parameter
Standby Current
Bias Current
EN Low Voltage
EN High Voltage
EN Input Current
Oscillation Frequency
Pch FET ON-Resistance
Nch FET ON-Resistance
Output Voltage
ITH SInk Current
ITH Source Current
UVLO Threshold Voltage
UVLO Release Voltage
Soft Start Time
Timer Latch Time
Output Short Circuit Threshold Voltage
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Symbol
ISTB
ICC
VENL
VENH
IEN
fOSC
RONP
RONN
VOUT
ITHSI
ITHSO
VUVLO1
VUVLO2
tSS
tLATCH
VSCP
Min
2.0
0.8
3.250
10
10
3.6
3.65
0.5
1
-
3/21
Limit
Typ
0
250
GND
VCC
1
1
200
150
3.300
20
20
3.8
3.90
1
2
1.65
Max
10
450
0.8
10
1.2
320
270
3.350
4.0
4.2
2
3
2.31
Unit
μA
μA
V
V
μA
MHz
mΩ
mΩ
V
μA
μA
V
V
ms
ms
V
Conditions
EN=GND
Standby mode
Active mode
VEN=5V
PVCC=5V
PVCC=5V
VOUT=3.6V
VOUT=3.0V
VCC=5V to 0V
VCC=0V to 5V
SCP/TSD operated
VOUT=3.3V to 0V
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BD8961NV
Datasheet
Typical Performance Curves
Output Voltage: VOUT[V]
Output Voltage: VOUT[V]
Ta=25°C
IO=2A
VCC=5V
Ta=25°C
IO=0A
Input Voltage: VCC [V]
EN Voltage: VEN [V]
Figure 4. Output Voltage vs Input Voltage
Figure 5. Output Voltage vs EN Voltage
Output Voltage: VOUT[V]
Output Voltage:
VOUT[V]
VCC=5V
IO=0A
VCC=5V
Ta=25°C
Temperature: Ta [°C]
Output Current: IOUT [A]
Figure 7. Output Voltage VS Temperature
Figure 6. Output Voltage vs Output Current
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Datasheet
Typical Performance Curves - continued
Efficiency: η [%]
Frequency :fOSC [MHz]
VCC=5V
VCC=5V
Ta=25°C
Temperature: Ta [°C]
Output Current: IOUT [mA]
Figure 9. Frequency VS Temperature
Figure 8. Efficiency vs Output Current
VCC=5V
PMOS
NMOS
EN Voltage: VEN [V]
ON-Resistance: RON [Ω]
VCC=5V
Temperature: Ta [°C]
Temperature: Ta [°C]
Figure 10. ON-Resistance VS Temperature
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Figure 11. EN Voltage VS Temperature
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Datasheet
Typical Performance Curves - continued
VCC=5V
Frequency: fOSC [MHz]
Circuit Current: ICC [μA]
Ta=25°C
Input Voltage: VCC [V]
Temperature: Ta [°C]
Figure 13. Frequency vs Input Voltage
Figure 12. Circuit Current VS Temperature
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Datasheet
Typical Waveforms
SW
VCC=PVCC
=EN
1 msec
VOUT
VOUT
VCC=5V
Ta=25°C
IO=0A
VCC=5V
Ta=25°C
Figure 14. Soft Start Waveform
Figure 15. SW Waveform
(IO=10mA)
VOUT
VOUT
110mV
100mV
IOUT
IOUT
VCC=5V
Ta=25°C
VCC=5V
Ta=25°C
Figure 17. Transient Response
(IO=2A to 1A, 10μs)
Figure 16. Transient Response
(IO=1A to 2A, 10μs)
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BD8961NV
Datasheet
Application Information
1.
Operation
BD8961NV is a synchronous step-down switching regulator that achieves fast transient response by employing current
mode PWM control system.
(1) Synchronous Rectifier
Integrated synchronous rectification using two MOSFETs reduces power dissipation and increases efficiency when
compared to converters using external diodes. Internal shoot-through current limiting circuit further reduces power
dissipation.
(2) Current Mode PWM Control
PWM control signal of this IC depends on two feedback loops, the voltage feedback and the inductor current feedback.
(a) PWM (Pulse Width Modulation) Control
The clock signal coming from OSC has a frequency of 1MHz. When OSC sets the RS latch, the P-Channel
MOSFET is turned on and the N-Channel MOSFET is turned OFF. The opposite happens when the current
comparator (Current Comp) resets the RS latch i.e. the P-Channel MOSFET is turned OFF and the N-Channel
MOSFET is turned on. Current Comp's output is a comparison of two signals, the current feedback control signal
"SENSE" which is a voltage proportional to the current IL, and the voltage feedback control signal, FB.
SENSE
Current
Comp
RESET
VOUT
Level
Shift
R Q
FB
SET
Gm Amp
RITH
S
IL
Driver
Logic
VOUT
SW
Load
OSC
Figure 18. Diagram of Current Mode PWM Control
PVCC
Current
Comp
SENSE
FB
SET
GND
RESET
GND
SW
GND
IL
IL(AVE)
VOUT
VOUT(AVE)
Figure 19. PWM Switching Timing Chart
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2.
Datasheet
Description of Functions
(1) Soft-Start Function
During start-up, the soft-start circuit gradually establishes the output voltage to limit the input current. This prevents
the overshoot in the output voltage and inrush current.
(2) Shutdown Function
When EN terminal is “low”, the device operates in Standby Mode and all the functional blocks including reference
voltage circuit, internal oscillator and drivers are turned OFF. Circuit current during standby is 0μA (Typ).
(3) UVLO Function
The UVLO circuit detects whether the supplied input voltage is sufficient to obtain the output voltage of this IC. The
UVLO threshold, which has a hysteresis of 100mV (Typ), prevents output bouncing.
Hysteresis 100mV
VCC
EN
VOUT
tss
tss
tss
Soft Start
Standby Mode
Standby
Mode
Operating Mode
Standby
Mode
Operating Mode
UVLO
UVLO
Operating Mode
EN
Standby Mode
UVLO
Figure 20. Soft Start, Shutdown, UVLO Timing Chart
(4) Short Circuit Protection Circuit with Time Delay Function
To protect the IC from breakdown, the short circuit protection circuit turns the output OFF when the internal circuit
limiter is activated continuously for a fixed time (tLATCH) or more. The output that is kept OFF may be turned on again
by restarting EN or by resetting UVLO.
EN
Output OFF
latch
Output Short Circuit
Threshold Voltage
VOUT
IL Limit
IL
t1<tLATCH
Output OFF
t2=tLATCH
Output OFF
Operating Mode
Timer latch
EN
Operating Mode
EN
Figure 21. Short-Current Protection Circuit with Time Delay Timing Chart
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3.
Datasheet
Information on Advantages
Advantage 1： Offers fast transient response by using current mode control system
Conventional product (Load response IO=0.1A to 0.6A)
BD8961NV (Load response IO=1A to 2A)
VOUT
VOUT
100mV
160mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 50%.
Figure 22. Comparison of Transient Response
Advantage 2： Offers high efficiency because of its synchronous rectifier
100
80
EFF ICIENCY:η [%]
ON-Resistance of P-Channel MOS FET : 200mΩ(Typ)
ON-Resistance of N-Channel MOS FET : 150mΩ(Typ)
90
Efficiency: η [%]
(a) For heavier load:
This IC utilizes the synchronous rectifying mode and uses low ON-Resistance
MOSFET power transistors.
70
60
50
40
30
Ta=25°C
VCC=5V
20
10
0
10
100
1000
10000
OUTPUT
CURRENT:I
[mA]
Output
Current
:IOUTOUT
[mA]
Figure 23. Efficiency
Advantage 3： Supplied in smaller package due to small-sized power MOSFETs
・Output capacitor, Co, required for current mode control: 22µF ceramic capacitor
・Inductance, L, required for the operating frequency of 1 MHz: 2.2µH inductor
Reduces a mounting area required.
VCC
15mm
CIN
CIN
DC/DC
Convertor
Controller
RITH
RITH
L
VOUT
L
10mm
CITH
Co
CO
CITH
Figure 24. Example Application
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4.
Datasheet
Switching Regulator Efficiency
Efficiency η may be expressed by the equation shown below:
  VOUT  IOUT  100 POUT  100
VIN  I IN
PIN
POUT
 100
POUT  Pd
%
Efficiency may be improved by reducing the switching regulator power dissipation factors Pdα as follows:
Dissipation Factors:
(1)
ON-Resistance Dissipation of Inductor and FET：Pd(I2R)
Pd( I 2 R)  I OUT 2  ( RCOIL  RON )
Where:
RCOIL is the DC resistance of inductor
RON is the ON-Resistance of FET
IOUT is the output current
(2)
Gate Charge/Discharge Dissipation：Pd(Gate)
Pd Gate  C gs  f V 2
Where:
Cgs is the gate capacitance of FET
f is the switching frequency
V is the gate driving voltage of FET
(3)
Switching Dissipation：Pd(SW)
Pd SW  
V IN 2  C RSS  I OUT  f
I DRIVE
Where:
CRSS is the reverse transfer capacitance of FET
IDRIVE is the peak current of gate
(4)
ESR Dissipation of Capacitor：Pd(ESR)
Pd( ESR)  I RMS 2  ESR
Where:
IRMS is the ripple current of capacitor
ESR is the equivalent series resistance
(5)
Operating Current Dissipation of IC：Pd(IC)
PdIC   VIN  I CC
Where:
ICC is the circuit current
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5.
Datasheet
Considerations on Permissible Dissipation and Heat Generation
Since this IC functions with high efficiency without significant heat generation in most applications, no special consideration
is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input
voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation
must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON-Resistance of FET are considered. This is
because conduction losses are the most significant among other dissipation factors mentioned above, gate
charge/discharge dissipation and switching dissipation.
①3.9W
Power
:Pd[W]
PowerDissipation
dissipation:Pd
[W]
4.0
①for SON008V5060
JEDEC 4 layer board 76.2mmx114.3mmx1.6mm
θj-a=32.1°C/W
②for SON008V5060
ROHM standard 1 layer board 70mmx70mmx1.6mm
θj-a=138.9°C /W
③ IC only
θj-a=195.3°C /W
3.0
2.0
1.0
P  I OUT 2  RON
RON  D  RONP  1  D RONN
D is the ON duty (=VOUT/VCC)
RCOIL is the DC Resistance of Coil
RONP is the ON-Resistance of P-Channel MOS FET
RONN is the ON-Resistance of N-Channel MOS FET
IOUT is the Output Current
②0.90W
③0.64W
0
0
25
50
75
100105 125
150
Ambient
:Ta[°C]
Ambient Temperature
temperature:Ta
[℃]
Figure 25. Thermal Derating Curve
(SON008V5060)
If VCC=5V, VOUT=3.3V, RONP=0.2Ω, RONN=0.16Ω
IOUT=2A, for example,
D=VOUT/VCC=3.3/5.0=0.66
RON=0.66x0.20+(1-0.66)x0.16
=0.132+0.0544
=0.1864[Ω]
P=22x0.1864＝0.7456[W]
Since RONP is greater than RONN in this IC, the dissipation increases as the on duty becomes greater.
Taking into consideration the dissipation shown above, thermal design must be carried out with allowable sufficient margin.
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6.
Datasheet
Selection of Externally Connected Components
(1)
Selection of Inductor (L)
The inductance significantly depends on output ripple current.
As shown in the Equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
IL
ΔIL
IL 
VCC
VCC  VOUT   VOUT
A ・・・(1)
L  VCC  f
Appropriate ripple current at output should be 20% to 30% of the
maximum output current.
IL
VOUT
A
IL  0.3  IOUTMax
L
CO
L
・・・(2)
VCC  VOUT   VOUT
H 
I L  VCC  f
・・・(3)
Where:
ΔIL is the Output ripple current, and
f is the Switching frequency
Figure 26. Output Ripple Current
Note: Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases
efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current
rating.
If VCC=5V, VOUT=3.3V, f=1MHz, ΔIL=0.3Ax2A=0.6A, for example,(BD8961NV)
L
5.0  3.3  3.3
0.6  5.0  1.0M
 1.87  2.2
H 
Note: Select an inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor
for better efficiency.
(2)
Selection of Output Capacitor (CO)
Output capacitor should be selected with the consideration on the stability
region and the equivalent series resistance required to minimize the ripple
voltage.
VCC
Output ripple voltage is determined by the equation (4)：
VOUT
L
VOUT  I L  ESR
ESR
・・・(4)
Where :
ΔIL is the Output ripple current, and
ESR is the Equivalent series resistance of output capacitor
Co
Figure 27. Output Capacitor
(3)
V 
Note: Rating of the capacitor should be determined to allow a sufficient margin
against output voltage. A 22µF to 100µF ceramic capacitor is recommended.
Less ESR allows reduction in output ripple voltage.
Selection of Input Capacitor (CIN)
VCC
The input capacitor must be a low ESR capacitor with a capacitance sufficient to
cope with high ripple current to prevent high transient voltage. The ripple current
IRMS is given by the equation (5):
CIN
VOUT
L
I RMS  IOUT 
VOUT VCC  VOUT 
CO
VCC
A
・・・(5)
< Worst case > IRMSMax
When VCC is twice the VOUT, IRMS 
Figure 28. Input Capacitor
IOUT
2
If VCC=5.0V, VOUT=3.3V, and IOUTMax=2A, (BD8961NV)
3.35.0  3.3
ARMS 
 0.947
5.0
A low ESR 22μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
I RMS  2 
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(4)
Datasheet
Calculating RITH, CITH for Phase Compensation
As the Current Mode Control is designed to limit the inductor current, a pole (phase lag) appears in the low frequency
area due to a CR filter consisting of an output capacitor and a load resistance, while a zero (phase lead) appears in
the high frequency area due to the output capacitor and it’s ESR. So, the phases are easily compensated by adding a
zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp 
fp(Min)
A
1
2  RO  CO
fp(Max)
Gain
[dB]
f Z ESR 
0
fZ(ESR)
IOUT MIN
Phase
[deg]
IOUT MAX
1
2  ESR  CO
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency decreases.
0
-90
fpMin 
Figure 29. Open Loop Gain Characteristics
A
fpMax 
1
2  ROMax  Co
1
2  ROMin  Co
Hz
←with lighter load
Hz
←with heavier load
fZ(Amp)
Zero at power amplifier
Increasing the capacitance of the output capacitor lowers the
pole frequency while the zero frequency does not change.
(This is because when the capacitance is doubled, the capacitor
ESR is reduced to half.)
Gain
[dB]
0
0
Phase
[deg]
-90
FZ  Amp  
1
2  R ITH  C ITH
Figure 30. Error Amp Phase Compensation Characteristics
CIN
VCC
EN
VOUT
VCC,PVCC
L
SW
VOUT
ITH
VOUT
CO
GND,PGND
RITH
CITH
Figure 31. Typical Application Circuit
Stable feedback loop may be achieved by canceling the pole fp (Min) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
f Z  Amp   f P Min

1
2  R ITH  C ITH

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BD8961NV
7.
Datasheet
BD8961NV Cautions on PC Board layout
VCC
1
2
3
RITH
③
CITH
EN 8
VOUT
VCC
PVCC
ITH
SW
4
7
PGND
①
L
6
5
GND
EN
VOUT
CIN
②
Co
GND
Figure 32. Layout Diagram
①
For the sections drawn with heavy line, use thick conductor pattern as short as possible.
②
Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer
to pin PGND.
③
Lay out CITH and RITH between the pins ITH and GND as near as possible with least necessary wiring.
Note: SON008V5060 (BD8961NV) has thermal FIN on the reverse of the package.
The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB.
8.
Recommended Components List for Above Application
Symbol
Part
Value
Manufacturer
L
Series
Coil
2.2μH
TDK
LTF5022-2R2N3R2
CIN
Ceramic Capacitor
22μF
Kyocera
CM32X5R226M10A
CO
Ceramic Capacitor
22μF
Kyocera
CM316B226M06A
CITH
Ceramic Capacitor
680pF
Murata
RITH
Resistance
12kΩ
Rohm
GRM18 Series
MCR03 Series
Note: The parts list presented above is an example of recommended parts. Although the parts are standard, actual circuit characteristics should be checked
on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when
employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these
margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a
schottky barrier diode established between the SW and PGND pins.
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Datasheet
I/O Equivalent Circuit
・EN pin
PVCC
・SW pin
PVCC
PVCC
EN
SW
・ITH pin
・VOUT pin
VCC
VCC
10kΩ
ITH
VOUT
Figure 33. I/O Equivalent Circuit
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Datasheet
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
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Datasheet
Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 34. Example of monolithic IC structure
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
14. Selection of Inductor
It is recommended to use an inductor with a series resistance element (DCR) 0.1Ω or less. Especially, note that use
of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition
continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and
output will be latched OFF. When using an inductor over 0.1Ω, be careful to ensure adequate margins for variation
between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it
is recommended to start up the output with EN after supply voltage is within.
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BD8961NV
Datasheet
Ordering Information
B
D
8
9
6
Part Number
1
N
V
-
Package
NV:SON008V5060
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SON008V5060 (TOP VIEW)
Part Number Marking
D 8 9 6 1
LOT Number
1PIN MARK
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BD8961NV
Datasheet
Physical Dimension, Tape and Reel information
Package Name
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BD8961NV
Datasheet
Revision History
Date
Revision
02.Mar.2012
02.Oct.2014
001
002
Changes
New Release
Applied the ROHM Standard Style and improved understandability.
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice – GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice – GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD8961NV - Web Page
Buy
Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD8961NV
SON008V5060
2000
2000
Taping
inquiry
Yes