Maxim MAX4717EUB 4.5 â ¦/20 â ¦, 300mhz bandwidth, dual spdt analog switches in ucsp Datasheet

19-2627; Rev 0; 10/02
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Features
♦ USB 1.1 Signal Switching Compliant
♦ 2ns (max) Differential Skew
♦ -3dB Bandwidth: >300MHz
♦ Low 15pF On-Channel Capacitance
♦ Single-Supply Operation from +1.8V to +5.5V
♦ 4.5Ω RON (max) Switches (MAX4717/MAX4718)
0.3Ω (max) RON Match (+3.0V Supply)
1.2Ω (max) Flatness (+3.0V Supply)
♦ 20Ω RON (max) Switch (MAX4718)
0.4Ω (max) RON Match (+3.0V Supply)
1.2Ω (max) Flatness (+3.0V Supply)
♦ Rail-to-Rail® Signal Handling
♦ High Off-Isolation: -55dB (10MHz)
These switches are packaged in a chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 2.0mm ✕ 1.50mm area
and has a 4 ✕ 3 bump array with a bump pitch of
0.5mm. These switches are also available in a 10-pin
µMAX package.
♦ Low Crosstalk: -80dB (10MHz)
♦ Low Distortion: 0.03%
♦ +1.8V CMOS-Logic Compatible
♦ <0.5nA Leakage Current at +25°C
Applications
Ordering Information
USB 1.1 Signal Switching Circuits
PART
Battery-Operated Equipment
TEMP RANGE
PIN/BUMPPACKAGE
TOP
MARK
Audio/Video-Signal Routing
MAX4717EUB
-40°C to +85°C
10 µMAX
Headphone Switching
MAX4717EBC-T*
-40°C to +85°C
12 UCSP-12
Low-Voltage Data-Acquisition Systems
MAX4718EUB
-40°C to +85°C
10 µMAX
Sample-and-Hold Circuits
MAX4718EBC-T*
-40°C to +85°C
12 UCSP-12
Cell Phones
Note: UCSP package requires special solder temperature profile described in the Absolute Maximum Ratings section.
—
ABH
—
ABI
PDAs
*UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and environment. See the UCSP reliability notice in the UCSP Reliability section of this data sheet for
more information.
UCSP is a trademark of Maxim Integrated Products, Inc.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
MAX4717/MAX4718
(BUMP SIDE DOWN)
GND
NC1
C1
IN1
C2
B1
A1
NC2
A2
IN2
PART
SPDT1
SPDT2
MAX4717
4.5Ω
4.5Ω
MAX4718
4.5Ω
20Ω
MAX4717/MAX4718
COM1
NO1
C3
C4
A3
B4
V+
UCSP
A4
COM2
NO2
IN_
NO_
MAX4717/MAX4718
V+ 1
10 NO2
NO1 2
9
COM2
COM1 3
8
IN2
IN1 4
7
NC2
NC1 5
6
GND
NC_
0
OFF
ON
1
ON
OFF
SWITCHES SHOWN FOR LOGIC "0" INPUT
µMAX
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4717/MAX4718
General Description
The MAX4717/MAX4718 low-voltage, low on-resistance
(RON), dual single-pole/double throw (SPDT) analog
switches operate from a single +1.8V to +5.5V supply.
These devices are designed for USB 1.1 and audio
switching applications.
The MAX4717 features two 4.5Ω R ON (max) SPDT
switches with 1.2Ω flatness and 0.3Ω matching between
channels. The MAX4718 features one 4.5Ω RON (max)
SPDT switch and one 20Ω RON (max) SPDT switch. The
20Ω switch has a guaranteed matching and flatness of
0.4Ω and 1.2Ω, respectively. These switches offer breakbefore-make switching (1ns) with tON <80ns and tOFF
<40ns at +2.7V. The digital logic inputs are +1.8V logic
compatible with a +2.7V to +3.6V supply.
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND)
V+, IN_...................................................................-0.3V to +6.0V
COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V)
Continuous Current COM_, NO_, NC_ ...........................±100mA
Peak Current COM_, NO_, NC_
(pulsed at 1ms, 10% duty cycle)................................±200mA
Continuous Power Dissipation (TA = +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW
12-Bump UCSP (derate 11.4mW/°C above +70°C) ....909mW
ESD Method 3015.7 .............................................................>2kV
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering) (Note 2)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, table 3 for IR/VPR and convection reflow.
Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Analog Signal Range
SYMBOL
CONDITIONS
VCOM_,
VNO_, VNC_
TA
MIN
TMIN to
TMAX
0
TYP
MAX
UNITS
V+
V
ANALOG SWITCH (Low RON—MAX4717/MAX4718 SPDT 1)
+25°C
On-Resistance
(Note 5)
RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
∆RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
3.0
TMIN to
TMAX
5
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
0.1
TMIN to
TMAX
RFLAT(ON)
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 1.5V, 2.0V
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 3.3V, 0.3V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 0.3V, 3.3V, or
floating
0.6
TMIN to
TMAX
+25°C
-0.5
-1
+25°C
-1
TMIN to
TMAX
-2
+0.01
Ω
+0.5
+1
+0.01
Ω
1.2
1.5
TMIN to
TMAX
Ω
0.3
0.4
+25°C
On-Resistance Flatness
(Note 7)
4.5
nA
+1
+2
nA
ANALOG SWITCH (High RON—MAX4718 SPDT 2)
+25°C
On-Resistance (Note 5)
2
RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
15
TMIN to
TMAX
_______________________________________________________________________________________
20
25
Ω
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
∆RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
TYP
MAX
0.15
0.4
TMIN to
TMAX
0.5
+25°C
0.6
On-Resistance Flatness
(Note 7)
RFLAT(ON)
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 1.5V, 2.0V
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 3.3V, 0.3V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 0.3V, 3.3V, or
floating
tON
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 1;
VIH = 1.5V, VIL = 0V
tOFF
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 1;
VIH = 1.5V, VIL = 0V
Break-Before-Make Time Delay
(Note 8)
tBBM
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 2
Skew (Note 8)
tSKEW
RS = 39Ω, CL = 50pF, Figure 3
TMIN to
TMAX
0.15
VGEN = 1.5V, RGEN = 0Ω,
CL = 1.0nF, Figure 4
+25°C
5
TMIN to
TMAX
-0.5
TMIN to
TMAX
-1
+25°C
-1
TMIN to
TMAX
-2
+0.01
Ω
+0.5
+1
+0.01
Ω
1.2
1.5
+25°C
UNITS
nA
+1
+2
nA
DYNAMIC CHARACTERISTICS
Turn-On Time
Turn-Off Time
+25°C
40
TMIN to
TMAX
100
+25°C
20
TMIN to
TMAX
Charge Injection
Q
Off-Isolation
VISO
Crosstalk (Note 9)
VCT
On-Channel -3dB Bandwidth
Total Harmonic Distortion
NO_, NC_ Off-Capacitance
f = 10MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5
ns
40
50
+25°C
TMIN to
TMAX
80
ns
8
ns
1
2
ns
pC
-55
+25°C
dB
f = 1MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5
-80
f = 10MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5
-80
+25°C
f = 1MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5
dB
-110
BW
Signal = 0dBm, RL = 50Ω,
CL = 5pF, Figure 5
+25°C
>300
MHz
THD
VCOM = 2VP-P, RL = 600Ω
+25°C
0.03
%
+25°C
9
pF
CNO_(OFF),
f = 1MHz, Figure 6
CNC_(OFF)
_______________________________________________________________________________________
3
MAX4717/MAX4718
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Switch On-Capacitance
SYMBOL
C(ON)
CONDITIONS
f = 1MHz, Figure 6
TA
MIN
+25°C
TYP
MAX
15
UNITS
pF
DIGITAL I/O
Input Logic High Voltage
VIH
TMIN to
TMAX
Input Logic Low Voltage
VIL
TMIN to
TMAX
Input Leakage Current
IIN
V+ = +3.6V, VIN_ = 0 or 5.5V
1.4
V
0.5
V
TMIN to
TMAX
-100
+100
nA
TMIN to
TMAX
1.8
5.5
V
1
µA
POWER SUPPLY
Power-Supply Range
V+
Supply Current
I+
V+ = +5.5V, VIN_ = 0V or V+
TMIN to
TMAX
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Analog Signal Range
SYMBOL
CONDITIONS
VCOM_,
VNO_, VNC_
TA
MIN
TMIN to
TMAX
0
TYP
MAX
UNITS
V+
V
ANALOG SWITCH (Low RON—MAX4717/MAX4718 SPDT 1)
+25°C
On-Resistance (Note 5)
RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
∆RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
1.7
TMIN to
TMAX
3.5
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
0.1
TMIN to
TMAX
RFLAT(ON)
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 2.0V, 3.5V
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 5.5V; VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_ = 1.0V, 4.5V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 5.5V; VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_ = 1.0V, 4.5V, or
floating
4
0.4
TMIN to
TMAX
-0.5
TMIN to
TMAX
-1
+25°C
-1
TMIN to
TMAX
-2
+0.01
_______________________________________________________________________________________
Ω
+0.5
+1
+0.01
Ω
1.2
1.5
+25°C
Ω
0.3
0.4
+25°C
On-Resistance Flatness
(Note 7)
3
nA
+1
+2
nA
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
12
20
UNITS
ANALOG SWITCH (High RON—MAX4718 SPDT 2)
+25°C
On-Resistance (Note 5)
RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
∆RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
TMIN to
TMAX
25
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
0.15
TMIN to
TMAX
RFLAT(ON)
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 2.0V, 4.5V
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 5.5V; VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_= 1.0V, 4.5V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 5.5V, VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_ = 1.0V, 4.5V, or
floating
tON
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
tOFF
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
Break-Before-Make Time Delay
(Note 8)
tBBM
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 2
Skew (Note 8)
tSKEW
RS = 39Ω, CL = 50pF, Figure 3
0.4
0.5
+25°C
On-Resistance Flatness
(Note 7)
0.4
TMIN to
TMAX
-0.5
TMIN to
TMAX
-1
+25°C
-1
TMIN to
TMAX
-2
+0.01
Ω
+0.5
+1
+0.01
Ω
1.2
1.5
+25°C
Ω
nA
+1
+2
nA
DYNAMIC CHARACTERISTICS
+25°C
Turn-On Time
30
TMIN to
TMAX
100
+25°C
Turn-Off Time
20
TMIN to
TMAX
ns
40
50
+25°C
TMIN to
TMAX
80
ns
8
ns
1
TMIN to
TMAX
0.15
2
ns
DIGITAL I/O
Input Logic High Voltage
VIH
TMIN to
TMAX
Input Logic Low Voltage
VIL
TMIN to
TMAX
Input Leakage Current
IIN
V+ = 5.5V, VIN_ = 0V or V+
TMIN to
TMAX
2.0
-100
V
0.8
V
+100
nA
_______________________________________________________________________________________
5
MAX4717/MAX4718
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TMIN to
TMAX
1.8
TYP
MAX
UNITS
5.5
V
1
µA
POWER SUPPLY
Power-Supply Range
V+
Supply Current
I+
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
TMIN to
TMAX
V+ = 5.5V, VIN_ = 0V or V+
UCSP parts are 100% tested at +25°C only, and guaranteed by design over the specified temperature range. µMAX parts
are 100% tested at TMAX and guaranteed by design over the specified temperature range.
The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value is a maximum.
Guaranteed by design for UCSP parts.
∆RON = RON(MAX) - RON(MIN).
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Guaranteed by design.
Between any two switches.
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
V+ = 1.8V
5
RON (Ω)
6
V+ = 3V
LOW RON SWITCH
V+ = 2.5V
V+ = 3V
4
TA = +85°C
TA = +25°C
3
V+ = 4.2V
V+ = 5V
2
2
0
1
V+ = 5V
LOW RON SWITCH
4
RON (Ω)
8
ON-RESISTANCE vs. VCOM
5
MAX4717/18 toc02
MAX4717/18 toc01
LOW RON SWITCH
4
6
3
TA = +25°C
1
2
3
VCOM (V)
6
4
5
TA = +85°C
2
1
TA = -40°C
TA = -40°C
0
MAX4717/18 toc03
ON-RESISTANCE vs. VCOM
10
RON (Ω)
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
0
0
0.5
1.0
1.5
VCOM (V)
2.0
2.5
3.0
0
1
2
3
VCOM (V)
_______________________________________________________________________________________
4
5
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ON-RESISTANCE vs. VCOM
12
TA = -40°C
11
1
2
3
4
10
5
10
0.5
0
1.0
VCOM (V)
LEAKAGE CURRENT vs. TEMPERATURE
2.5
3.0
COM ON-LEAKAGE
COM OFF-LEAKAGE
200
V+ = 5V
LOW RON SWITCH
800
100
0
600
COM ON-LEAKAGE
COM OFF-LEAKAGE
400
60
85
-15
TEMPERATURE (°C)
LEAKAGE CURRENT vs. TEMPERATURE
10
35
60
COM ON-LEAKAGE
COM OFF-LEAKAGE
100
-100
10
35
TEMPERATURE (°C)
-15
40
CL = 1nF
V+ = 5V
30
CL = 1nF
V+ = 3V
20
60
85
10
35
60
85
SUPPLY CURRENT vs. TEMPERATURE
6
5
4
V+ = 5V
3
2
V+ = 3V
1
0
-15
-40
TEMPERATURE (°C)
10
-40
COM OFF-LEAKAGE
100
85
50
CHARGE INJECTION (pC)
700
300
COM ON-LEAKAGE
300
CHARGE INJECTION vs. VCOM
MAX4717/18 toc10
V+ = 5V
HIGH RON SWITCH
500
500
TEMPERATURE (°C)
900
5
-100
-40
SUPPLY CURRENT (nA)
35
4
V+ = 3V
HIGH RON SWITCH
MAX4717/18 toc11
10
3
LEAKAGE CURRENT vs. TEMPERATURE
0
-15
2
700
200
-40
1
0
VCOM (V)
1000
LEAKAGE CURRENT (pA)
400
LEAKAGE CURRENT (pA)
2.0
LEAKAGE CURRENT vs. TEMPERATURE
MAX4717/18 toc07
V+ = 3V
LOW RON SWITCH
LEAKAGE CURRENT (pA)
1.5
VCOM (V)
500
300
TA = +25°C
TA = -40°C
V+ = 5V
0
11
TA = +25°C
MAX4717/18 toc09
12
10
MAX4717/18 toc05
12
V+ = 4.2V
TA = +85°C
13
MAX4717/18 toc12
14
13
V+ = 5V
HIGH RON SWITCH
14
RON (Ω)
V+ = 2.5V
15
LEAKAGE CURRENT (pA)
16
TA = +85°C
14
RON (Ω)
RON (Ω)
18
V+ = 3V
HIGH RON SWITCH
ON-RESISTANCE vs. VCOM
MAX4717/18 toc08
V+ = 1.8V
15
MAX4717/18 toc04
HIGH RON SWITCH
MAX4717/18 toc06
ON-RESISTANCE vs. VCOM
20
0
0
1
2
3
VCOM (V)
4
5
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
7
MAX4717/MAX4718
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
40
1.2
VTH0.8
60
tON
40
tOFF
V+ = 3V
20
0.4
0
20
0
1
2
3
4
5
0
2.0
1.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
TURN-ON/OFF TIME
vs. TEMPERATURE
TURN-ON/OFF TIME
vs. TEMPERATURE
LOW RON SWITCH
tON
40
40
tON, V+ = 5.0V
30
20
tOFF
20
50
3.5
4.5
5.5
40
30
tOFF, V+ = 5.0V
tOFF, V+ = 3.0V
10
0
2.5
tON, V+ = 5.0V
20
tOFF, V+ = 5.0V
tOFF, V+ = 3.0V
10
0
HIGH RON SWITCH
tON, V+ = 3.0V
tON/tOFF (ns)
60
tON, V+ = 3.0V
50
5.5
60
MAX4717/18 toc17
60
tON/tOFF (ns)
80
0
-40
-15
10
35
60
85
-40
-15
10
35
85
60
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
RISE/FALL-TIME DELAY
vs. SUPPLY VOLTAGE
RISE/FALL-TIME DELAY
vs. TEMPERATURE
RISE TIME TO FALL TIME MISMATCH
vs. SUPPLY VOLTAGE
1.5
RISE DELAY
1.0
0.5
FALL DELAY
0
1.0
RISE DELAY
FALL DELAY
0.5
3.5
SUPPLY VOLTAGE (V)
4.5
5.5
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
LOW RON SWITCH
300
200
100
0
2.5
400
MAX4717/18 toc21
1.5
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
V+ = 4.2V
LOW RON SWITCH
MISMATCH (ps)
2.0
2.0
MAX4717/18 toc20
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
LOW RON SWITCH
OUTPUT RISE/FALL-TIME DELAY (ns)
MAX4717/18 toc19
3.0
1.5
4.5
SUPPLY VOLTAGE (V)
HIGH RON SWITCH
2.5
3.5
SUPPLY VOLTAGE (V)
100
1.5
2.5
1.5
LOGIC LEVEL (V)
MAX4717/18 toc16
0
tON/tOFF (ns)
80
VTH+
MAX4717/18 toc18
60
LOW RON SWITCH
tON/tOFF (ns)
V+ = 5V
100
MAX4717/18 toc14
1.6
LOGIC THRESHOLD (V)
80
SUPPLY CURRENT (µA)
2.0
MAX4717/18 toc13
100
8
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
MAX4717/18 toc15
SUPPLY CURRENT vs. LOGIC LEVEL
OUTPUT RISE/FALL-TIME DELAY (ps)
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
0
-40
-15
10
35
TEMPERATURE (°C)
60
85
1.5
2.5
3.5
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
4.5
5.5
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
MAX4717/18 toc23
300
150
200
100
50
100
0
0
0
10
35
60
85
2.5
1.5
TEMPERATURE (°C)
3.5
4.5
SUPPLY VOLTAGE (V)
20
MAX4717/18 toc25
0
-20
-20
ON-LOSS (dB)
-40
OFF-ISOLATION
-80
-100
HIGH RON SWITCH
V+ = 3V/5V
0
ON-LOSS
-60
35
60
85
FREQUENCY RESPONSE
LOW RON SWITCH
V+ = 3V/5V
10
TEMPERATURE (°C)
FREQUENCY RESPONSE
20
-15
-40
5.5
ON-LOSS
-40
-60
OFF-ISOLATION
-80
-100
CROSSTALK
-120
-140
0.0001
0.01
-140
0.0001
100
1
CROSSTALK
-120
FREQUENCY (MHz)
1
100
FREQUENCY (MHz)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
1
MAX4717/18 toc27
1
0.01
THD (%)
V+ = 3V
LOW RON SWITCH
RL = 600Ω
0.1
MAX4717/18 toc28
-15
ON-LOSS (dB)
-40
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
V+ = 4.2V
MAX4717 ONLY
MAX4717/18 toc26
50
200
SKEW (ps)
100
SKEW vs. TEMPERATURE
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
MAX4717 ONLY
SKEW (ps)
INPUT RISE/FALL TIME = 15ns
FIGURE 4, CL = 50pF
V+ = 4.2V
LOW RON SWITCH
THD (%)
MISMATCH (ps)
150
SKEW vs. SUPPLY VOLTAGE
400
MAX4717/18 toc22
200
MAX4717/18 toc24
RISE TIME TO FALL TIME MISMATCH
vs. TEMPERATURE
V+ = 3V
HIGH RON SWITCH
RL = 600Ω
0.1
0.01
0.01
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
_______________________________________________________________________________________
9
MAX4717/MAX4718
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Pin Description
PIN
NAME
FUNCTION
UCSP
µMAX
A1
7
NC2
Analog Switch 2—Normally Closed
Terminal
A2
8
IN2
Digital Control Input for Analog
Switch 2
A3
9
COM2
A4
10
NO2
Analog Switch 2—Normally Open
Terminal
B1
6
GND
Ground
B4
1
V+
C1
5
NC1
Analog Switch 1—Normally Closed
Terminal
C2
4
IN1
Digital Control Input for Analog
Switch 1
C3
3
COM1
C4
2
NO1
Analog Switch 2—Common
Terminal
Positive-Supply Voltage Input
Analog Switch 1—Common
Terminal
Analog Switch 1—Normally Open
Terminal
Detailed Description
The MAX4717/MAX4718 high-speed, low-voltage, low onresistance (RON), dual SPDT analog switches operate
from a single +1.8V to +5.5V supply. The switches feature
break-before-make switching operation and fast switching speeds (tON = 80ns (max), tOFF = 40ns (max)).
These switches have low 15pF on-channel capacitance, which allows for 12Mbps switching of the data
signals for USB 1.0/1.1 applications. The MAX4717 is
designed to switch D+ and D- USB signals with a guaranteed skew of less than 2ns (see Figure 4) as measured from 50% of the input signal to 50% of the output
signal.
Applications Information
Digital Control Inputs
The MAX4717/MAX4718 logic inputs accept up to
+5.5V regardless of supply voltage. For example, with
a +3.3V supply, IN_ can be driven low to GND and high
to +5.5V allowing for mixing of logic levels in a system.
Driving the control logic inputs rail-to-rail minimizes
power consumption. For a +3V supply voltage, the
logic thresholds are 0.5V (low) and 1.4V (high); for a
10
+5V supply voltage, the logic thresholds are 0.8V (low)
and 2.0V (high).
Analog Signal Levels
The on-resistance of the MAX4717/MAX4718 changes
very little for analog input signals across the entire supply
voltage range (see the Typical Operating Characteristics).
The switches are bidirectional, so the NO_, NC_, and
COM_ pins can be either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings
may cause permanent damage to the device.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current-limited.
UCSP Package Considerations
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Chip-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s website at www.maxim-ic.com.
Chip Information
TRANSISTOR COUNT: 235
PROCESS: BiCMOS
______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
MAX4717/
MAX4718
V+
VN_
LOGIC
INPUT
V+
COM_
NO_
50%
VIL
VOUT
OR NC_
RL
t OFF
CL
IN_
VOUT
GND
LOGIC
INPUT
SWITCH
OUTPUT
0.9 x V0UT
0.9 x VOUT
0V
t ON
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
RL
VOUT = VN_
RL + RON
(
t r < 5ns
t f < 5ns
VIH
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
)
Figure 1. Switching Time
V+
MAX4717/
MAX4718
LOGIC
INPUT
V+
VN_
NC_
RL
300Ω
IN_
LOGIC
INPUT
50%
VIL
VOUT
COM_
NO_
VIH
CL
35pF
GND
0.9 x VOUT
VOUT
tBBM
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 2. Break-Before-Make Interval
______________________________________________________________________________________
11
MAX4717/MAX4718
Test Circuits/Timing Diagrams
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
MAX4717/MAX4718
Test Circuits/Timing Diagrams (continued)
RS
IN+
RISE TIME DELAY = |tINRISE - tOUTRISE|
MAX4717
NC1 OR
NO1
COM1
OUT+
CL
RS
IN-
NC2 OR
NO2
COM2
FALL TIME DELAY = |tINFALL - tOUTFALL|
RISE TIME TO FALL TIME MISMATCH = |tOUTFALL - tOUTRISE|
OUTCL
IN1
IN2
VIL TO VIH
tINFALL
V+
VIN+
tINRISE
90%
90%
50%
10%
0V
10%
V+
VIN-
50%
0V
tOUTFALL
V+
tOUTRISE
90%
90%
VOUT+
50%
10%
0V
10%
V+
50%
VOUT0V
tSKEW
Figure 3. Output Signal Skew
12
______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
V+
MAX4717/
MAX4718
∆VOUT
V+
RGEN
VOUT
COM_
NC_
OR NO_
VOUT
IN
OFF
CL
V GEN
GND
OFF
ON
IN_
VIL TO VIH
IN
ON
OFF
OFF
Q = (∆V OUT )(C L )
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 4. Charge Injection
+5V 10nF
V
OFF-ISOLATION = 20log OUT
VIN
NETWORK
ANALYZER
0V OR V+
V+
IN_
NC1
MAX4717/
MAX4718
VOUT
NO1*
50Ω
50Ω
VIN
COM1
GND
V
ON-LOSS = 20log OUT
VIN
50Ω
MEAS
50Ω
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
REF
V
CROSSTALK = 20log OUT
VIN
50Ω
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
10nF
V+
V+
COM_
MAX4717/
MAX4718
IN
CAPACITANCE
METER
f = 1MHz
VIL OR VIH
NC_ or
NO_
GND
Figure 6. Channel Off/On-Capacitance
______________________________________________________________________________________
13
MAX4717/MAX4718
Test Circuits/Timing Diagrams (continued)
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
MAX4717/MAX4718
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
14
______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
10LUMAX.EPS
e
4X S
10
INCHES
10
H
ÿ 0.50±0.1
0.6±0.1
1
1
0.6±0.1
BOTTOM VIEW
TOP VIEW
D2
MILLIMETERS
MAX
DIM MIN
0.043
A
0.006
A1
0.002
A2
0.030
0.037
0.120
D1
0.116
0.118
0.114
D2
0.116
0.120
E1
E2
0.114
0.118
H
0.187
0.199
L
0.0157 0.0275
L1
0.037 REF
b
0.007
0.0106
e
0.0197 BSC
c
0.0035 0.0078
0.0196 REF
S
α
0∞
6∞
MAX
MIN
1.10
0.15
0.05
0.75
0.95
3.05
2.95
3.00
2.89
3.05
2.95
2.89
3.00
4.75
5.05
0.40
0.70
0.940 REF
0.177
0.270
0.500 BSC
0.090
0.200
0.498 REF
0∞
6∞
E2
GAGE PLANE
A2
c
A
b
D1
A1
α
E1
L
L1
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
21-0061
REV.
I
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX4717/MAX4718
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
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