ICST M902-01 Vcso based gbe clock generator Datasheet

Product Data Sheet
Integrated
Circuit
Systems, Inc.
M902-01
VCSO BASED GBE CLOCK GENERATOR
27
26
25
24
23
22
21
20
19
XTAL_2
NC
NC
NC
NC
VCC
DNC
DNC
DNC
28
29
30
31
32
33
34
35
36
M902-01
(Top View)
18
17
16
15
14
13
12
11
10
NC
NC
nFOUT1
FOUT1
GND
nFOUT0
FOUT0
VCC
GND
GND
GND
GND
OP_IN
nOP_OUT
nVC
VC
OP_OUT
nOP_IN
The M902-01 is a PLL (Phase Locked Loop) based
clock generator that uses an
internal VCSO (Voltage Controlled
SAW Oscillator) to produce a very
low jitter output clock. It is ideal for
Gigabit Ethernet. The output clock
(frequency of 156.25 or 187.50MHz
for example) is provided from two
LVPECL clock output pairs. (Specify frequency at time
of order.) The accuracy of the output frequency is
assured by the internal PLL, which phase-locks the
internal VCSO to the reference input frequency (25 or
30MHz for example). The input reference can either
be an external crystal, utilizing the internal crystal
oscillator, or a stable external clock source such as
a packaged crystal oscillator.
XTAL_1 / REF_IN
GND
STOP
EXT_CLK
EN_EXT_CLK
NC
NC
NC
VCC
PIN ASSIGNMENT (9 x 9 mm SMT)
1
2
3
4
5
6
7
8
9
GENERAL DESCRIPTION
FEATURES
◆ Output clock frequency from 125MHz to 190MHz
(Consult factory for frequency availability)
Figure 1: Pin Assignment
◆ Two identical LVPECL output pairs
◆ Integrated SAW (surface acoustic wave) delay line
Example Output Frequency Configurations
◆ Low jitter 0.5ps rms (over 12kHz-20MHz)
Ref Clock
Frequency
(MHz)
◆ Ideal for Gigabit Ethernet clock reference
◆ Output-to-output skew < 100ps
◆ External XTAL or LVCMOS reference input
20
◆ Selectable external feed-through clock input
25
◆ STOP clock control (Logic 1 stops output clocks)
30
◆ Industrial temperature grade available
PLL
Ratio
Output
Frequency 1
(MHz)
25/4
Application
125.00
GbE
156.25
10GbE
187.50
12GbE
Table 1: Example Output Frequency Configurations
◆ Single 3.3V power supply
Note 1: Specify output clock frequency at time of order
◆ Small 9 x 9 mm SMT (surface mount) package
SIMPLIFIED BLOCK DIAGRAM
M902-01
VSCO
External
Crystal
or
Reference
Clock Input
XTAL
OSC
Divider
Frequency
Multiplying
PLL
LVPECL
Output
Clock Pairs
O
1
(e.g., 156.25
or 187.50MHz)
(e.g., 25 or 30MHz)
External
Loop Filter
External
Clock
Input
External
Clock
Select
Output
Clock STOP
Control
Figure 2: Simplified Block Diagram
M902-01 Datasheet Rev 2.1
Revised 24Jun2004
M902-01 VCSO Based GbE Clock Generator
Integrated Circuit Systems, Inc.
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M902-01
Integrated
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Systems, Inc.
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
DETAILED BLOCK DIAGRAM
RLOOP
CLOOP
RPOST
External
Loop Filter
Components
CPOST
CPOST
RLOOP
M902-01
OP_IN
Phase
Detector
XTAL_1 / REF_IN
XTAL
OSC
XTAL_2
nOP_IN
CLOOP
OP_OUT
RPOST
nOP_OUT
nVC
VC
SAW Delay Line
RIN
R Divider
R=4
RIN
Loop Filter
Amplifier
Phase
Shifter
VCSO
M Divider
M = 25
O
Phase Locked Loop (PLL)
1
EXT_CLK
FOUT1
nFOUT1
FOUT0
nFOUT0
EN_EXT_CLK
STOP
Figure 3: Detailed Block Diagram
PIN DESCRIPTIONS
Number
1, 2, 3, 10, 14, 26
4
9
5
8
6
7
11, 19, 33
Name
GND
OP_IN
nOP_IN
nOP_OUT
OP_OUT
nVC
VC
VCC
I/O
12
13
15
16
17, 18
20, 21, 22
29, 30, 31, 32
FOUT0
nFOUT0
FOUT1
nFOUT1
23
EN_EXT_CLK
Input
24
EXT_CLK
Input
25
STOP
Input
27
XTAL_1 / REF_IN
Input
28
XTAL_2
Input
34, 35, 36
DNC
Configuration
Ground
Description
Power supply ground connections.
Input
External loop filter connections. See Figure 5,
External Loop Filter, on pg. 4.
Output
Input
Power
Output
Power supply connection, connect to +3.3V.
No internal terminator
Clock output pairs, differential LVPECL output
(156.25 MHz for the M902-01-156.2500)
No internal connection
NC
Logic 1 enables the EXT_CLK input.
Use Logic 0 for normal operation.
External clock feed-through: 0 to 200 MHz
Logic 1 stops clock outputs.
Internal pull-down resistor1
Use Logic 0 for normal operation.
External crystal connection. Also accepts
LVCMOS/LVTTL compatible clock source.
External crystal connection. Leave unconnected
when driving pin 27 with external clock reference.
Do Not Connect.
Internal pull-down resistor1
Table 2: Pin Descriptions
Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 6.
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
Revised 24Jun2004
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M902-01
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VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
FUNCTIONAL DESCRIPTION
The PLL
The PLL (Phase Locked Loop) includes the phase
detector, the VCSO, a feedback divider (labeled
“M Divider”), and a reference divider (“R Divider”).
The M902-01 is a PLL (Phase Locked Loop) based
clock generator that generates output clocks
synchronized to an input reference clock.
The M902-01 combines the flexibility of a VCSO
(Voltage Controlled SAW Oscillator) with the stability of
a crystal oscillator.
Input Reference
The input reference can either be an external, discrete
crystal or a stable external clock source such as a
packaged (temperature-compensated) crystal
oscillator.
• If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should be a parallel-resonant, fundamental mode
crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input
pins. External crystal load trim capacitors are also
required. (See “Crystal Specifications” on pg. 4.)
• If an external LVCMOS/LVTTL clock source is used,
apply it to the XTAL_1 / REF_IN input pin.
In either case, the reference clock is supplied to the
phase detector of the PLL. The M902-01 includes a
reference divider that divides the input reference
frequency by a fixed value “R” and provides the result to
the phase detector.
The EX_CLK pin is available for a clock feed-through
mode for testing. See “External Clock Feed-through”
on pg. 3.
The feedback divider divides the VCSO output
frequency by a fixed value “M” to match the reference
frequency provided to the phase detector by the
reference divider.
By controlling the frequency and phase of the VCSO,
the phase detector precisely locks the frequency and
phase of the feedback divider output to that of the
reference divider output.
The relationship between the VCSO output frequency,
the M Divider, the R Divider and the input reference
frequency is defined as follows:
M
Fvcso = Fxtal × ----R
For the M902-01-156.2500 (see “Ordering Information” on pg. 8):
•
•
•
•
VCSO output frequency = 156.25MHz
Input reference frequency = 25MHz
M=25
R= 4
Therefore, for the M902-01-156.2500:
25
156.25MHz = 25MHz × ---------4
M
The product of the input crystal frequency and ----R
falls within the lock range of the VCSO.
External Clock Feed-through
The EXT_CLK pin provides an input for an external
single-ended clock that directly drives the LVPECL
clock outputs. This pin is intended for system debugging
and performance evaluation..
EN_EXT_CLK
EXT_CLK
Logic 1 enables the EXT_CLK input.
Use Logic 0 for normal operation.
Apply an external LVCMOS/LVTTL clock source
for 0 to 200 MHz feed-through operation.
Leave inactive for normal operation.1
Note 1: In applications where EXT_CLK is active while the SAW PLL
signal path is enabled, it is necessary to gate the EXT_CLK to
minimize jitter in the LVPECL output pairs. See the PCB Design
Guidelines for ICS SAW PLLs application note at
www.icst.com/products/appnotes/M000-AN-001.PCBdesign.pdf
STOP Clock
The STOP pin puts the output clock into a static condition.
Logic 1 Output clocks are static
Logic 0 Output clocks enabled for normal operation
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
Revised 24Jun2004
3 of 8
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M902-01
Integrated
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Systems, Inc.
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
APPLICATION INFORMATION
External Loop Filter
This section includes information on the optional
external crystal and on the external loop filter.
To provide stable PLL operation, and thereby a low jitter
output clock, the M902-01 requires the use of an
external loop filter. This is provided via the provided
filter pins (see Figure 5).
The subsections on the loop filter provide example
component values and also briefly describe the SAW
PLL simulator tool and additional application
information available at www.icst.com.
RLOOP
CPOST
RLOOP
Crystal Specifications
f0
∆f/f0
OP_IN
AT-cut quartz
16
∆f/fC / TA Frequency Stability -40 to +85 oC 1
∆f/f0 / y Aging, per year (first) @+25 oC 1
ESR
CS
CL
MHz
±15
ppm
±50
ppm
±5
ppm
50
Spurious Response (non-harmonic)
-40 dBc
7
16
32
0.1
1.0
0.5
VC
6
7
3.0
1.5
4.70
20
150
1
3.3
4.7
1.00
10
150
2.1 2
1.1
4.7
0.10
10
150
6.4
4.5
20.0
0.10
20
270
4.2
33.0
0.03
20
120
1.5
Table 3: External Loop Filter Component Values
10.6 3
Note 1: These frequency tolerance specifications are suitable for
a ±100 ppm clock output frequency requirement.
Table 4: External Loop Filter Component Values
The external crystal will be applied to the XTAL_1 / REF_IN
and XTAL_2 input pins. External crystal load capacitors
are also required.
Note 1: Optimum loop bandwidth when using an external reference
crystal. Will help to attenuate interference on the crystal’s
sinusoidal clock waveform and therefore will minimize
device output clock jitter.
Note 2: Alternative loop filter setting when using an external reference crystal. Smaller C loop lowers loop damping factor with
negligible increase in output jitter.
Note 3: Optimum loop bandwidth when using an external reference
crystal oscillator. The square wave clock reference does not
require as much jitter attenuation, which allows for a wider
loop bandwidth and improved system noise tolerance.
C1
Refer to the M902-01 product web page at
www.icst.com/products/summary/m902-01.htm for
additional product information.
XTAL OSC
XTAL
nVC
5
PLL Bandwidth Damping R loop C loop R post C post
Factor
(kΩ)
(µF)
(kΩ)
(pF)
(kHz)
mW
XTAL_1 / REF_IN
nOP_OUT
8
Figure 5: External Loop Filter
pF
Recommended External Crystal Configuration
M902-01
M9xx-0x
OP_OUT
9
External Loop Filter Component Values
Ω
pF
Equivalent Series Resistance
Shunt Capacitance
Load Capacitance,
parallel load resonant
Drive Level
P0
40
RPOST
CLOOP
The loop filter is implemented as a differential circuit
to minimize system noise interference. Due to the
differential signal path design, the implementation
requires two identical complementary RC filters as
shown here. See Table 4, External Loop Filter
Component Values, below.
Fundamental
Frequency Tolerance @+25 oC 1
nOP_IN
4
Min Typ Max Unit
Crystal Type
Mode of Oscillation
Nominal Frequency Range
RPOST
CPOST
External Crystal Specifications
If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should have the following general specifications:
Parameter
CLOOP
XTAL_2
C2
Figure 4: Recommended External Crystal Configuration
XTAL= 25 or 30 MHz, Load Capacitance Specification = 18 pF
C1 = 27 pF
C2 = 33 pF
External load capacitors C1 and C2 present a load of 15 pf
to the crystal (they are seen in series by the crystal through
the common ground connection). With the additional of PCB
trace capacitance and M902-01 input capacitance, the total
load to the crystal is about 18 pf.
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
Revised 24Jun2004
4 of 8
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M902-01
Integrated
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Systems, Inc.
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
PLL Simulator Tool Available
SAW PLL Application Notes Available
A free PC software utility is available on the ICS website
(www.icst.com). The M2000 Timing Modules PLL
Simulator is a downloadable application that simulates
PLL jitter and wander transfer characteristics. This
enables the user to set appropriate external loop
component values in a given application.
The ICS web site (www.icst.com) also has application
notes on:
Refer to the SAW PLL Simulator Software web page at
www.icst.com/products/calculators/m2000filterSWdesc.htm
for additional information.
• PCB layout guidelines (including special detailed
•
•
•
instructions for preventing issues such as external
reference crosstalk)
Any new special device application details that may
become available
Instructions for using PLL simulator software
Guidelines for PCB fabrication (including recommended PCB footprint, solder mask, and furnace
profile)
Refer to the SAW PLL Application Notes web page at
www.icst.com/products/appnotes/SawPllAppNotes.htm
for application notes and any additional product
information that may become available.
ABSOLUTE MAXIMUM RATINGS1
Symbol Parameter
Rating
Unit
VI
Input Voltage
-0.5 to VCC +0.5
V
VO
Output Voltage
-0.5 to VCC +0.5
V
IO
Output Current
25
mA
VCC
Power Supply Voltage
4.6
V
-45 to +100
oC
TS
Storage Temperature
Table 5: Absolute Maximum Ratings
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional operation of product at these conditions
or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
RECOMMENDED CONDITIONS OF OPERATION
Symbol Parameter
VCC
Positive Supply Voltage
TA
Ambient Operating Temperature
Commercial
Industrial
Min
Typ
Max
Unit
3.135
3.3
3.465
V
oC
+70
+85
0
-40
oC
Table 6: Recommended Conditions of Operation
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
Revised 24Jun2004
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M902-01
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VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
ELECTRICAL SPECIFICATIONS
DC Characteristics
Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1,
LVPECL outputs terminated with 50Ω to VCC - 2V
Symbol Parameter
Power Supply
Logic Inputs
Reference
Clock
Input
Min
Typ
Max
Unit
3.135
3.3
3.465
V
VCC
Positive Supply Voltage
ICC
Power Supply Current
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
IIL
Input Low Current
-5.0
VIH
Input High Voltage
(Vcc / 2 ) +0.5
VIL
Input Low Voltage
IIH
Input High Current
IIL
Input Low Current
CIN
Input Capacitance, All Inputs STOP,
mA
300
2
Vcc +0.3
V
0.8
V
150
µA
-0.3
EN_EXT_CLK, EXT_CLK,
STOP
µA
Vcc +0.3
-0.3
XTAL_1 / REF_IN
(XTAL_2 disconnected)
V
(Vcc / 2 ) -0.5 V
µA
150
µA
-5.0
EN_EXT_CLK, EXT_CLK,
All Inputs
pF
4
XTAL_1 / REF_IN, XTAL_2
Pull-down
Rpulldown Internal Pull-down Resistor
Differential
Output
VOH
Output High Voltage
VOL
Output Low Voltage
VP-P
Peak to Peak Output Voltage
EN_EXT_CLK, STOP
FOUT, nFOUT (0-1)
kΩ
51
Vcc -1.4
Vcc -1.0
V
Vcc -2.0
Vcc -1.7
V
0.5
0.85
V
Table 7: DC Characteristics
Note 1: See Ordering Information on pg. 8
AC Characteristics
Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1,
LVPECL outputs terminated with 50Ω to VCC - 2V
Symbol Parameter
FOUT
Output Frequency Range
FIN
Nominal Input Frequency, XTAL_1 / REF_IN
APR
VCSO Pull-Range
Φn
Single Side Band
Phase Noise
@156.25MHz
Min
Typ
Max
Unit
125
156.25
190
MHz
±100
25
MHz
±150
ppm
1kHz Offset
-90
10kHz Offset
-110
-135
Test Conditions
0.5
1.0
dBc/Hz
dBc/Hz
dBc/Hz
ps
45
50
55
%
FOUT, nFOUT (0-1)
350
450
550
ps
20% to 80%
Output Fall Time
FOUT, nFOUT (0-1)
350
450
550
ps
20% to 80%
Output Skew
Between Any Pair
100
ps
EXT_CLK Frequency
EXT_CLK
200
MHz
100kHz Offset
J(t)
Jitter (rms)
tDC
Output Duty Cycle, High Time
tR
Output Rise Time
tF
tS
0
Table 8: AC Characteristics
Note 1: See Ordering Information on pg. 8
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
12kHz to 20MHz
Revised 24Jun2004
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VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER
Mechanical Dimensions:
Refer to the M902-01 product web page at
www.icst.com/products/summary/m902-01.htm
for recommended PCB footprint, solder mask,
furnace profile, and related information.
Figure 6: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier
M902-01 Datasheet Rev 2.1
Integrated Circuit Systems, Inc.
Revised 24Jun2004
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M902-01
Product Data Sheet
VCSO BASED GBE CLOCK GENERATOR
ORDERING INFORMATION
Part Numbering Scheme
Part Number:
Example Part Numbers
M902- 01 - xxx.xxxx
Device Number
Output Freq. (MHz)
Temperature
“ - ” = 0 to +70 oC (commercial)
I = - 40 to +85 oC (industrial)
125.00
156.25
Output Frequency (MHz)
See Table 9, right. Consult ICS for other frequencies.
Figure 7: Part Numbering Scheme
187.50
Temperature
Order Part Number
commercial
industrial
commercial
industrial
commercial
industrial
M902-01 - 125.0000
M902-01I125.0000
M902-01 - 156.2500
M902-01I156.2500
M902-01 - 187.5000
M902-01I187.5000
Table 9: Example Part Numbers
Consult factory for frequency availability.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
M902-01 Datasheet Rev 2.1
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