Cypress BCM20707UA2KFFB4GT Complies with bluetooth core specification version 4.2 including br/edr/ble Datasheet

The following document contains information on Cypress products. Although the document is marked with the name
“Broadcom”, the company that originally developed the specification, Cypress will continue to offer these products to
new and existing customers.
There is no change to this document as a result of offering the device as a Cypress product. Any changes that have
been made are the result of normal document improvements and are noted in the document history page, where
supported. Future revisions will occur when appropriate, and changes will be noted in a document history page.
Cypress continues to support existing part numbers. To order these products, please use only the Cypress Ordering
Part Number listed in the table.
Broadcom Ordering Part Number
BCM20707UA1KFFB4GT
BCM20707UA1KFFB4G
BCM20707VA1PKWBG
BCM20707UA2KFFB4GT
BCM20707VA1PKWBGT
BCM20707UA2KFFB4G
BCM20707UA1KFFB1G
Cypress Ordering Part Number
CYW20707UA1KFFB4GT
CYW20707UA1KFFB4G
CYW20707VA1PKWBG
CYW20707UA2KFFB4GT
CYW20707VA1PKWBGT
CYW20707UA2KFFB4G
CYW20707UA1KFFB1G
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Cypress Semiconductor Corporation
Document Number: 002-14792 Rev. *F
198 Champion Court
San Jose, CA 95134-1709
408-943-2600
Revised October 17, 2016
Preliminary Data Sheet
BCM20707
Bluetooth SoC for Embedded Wireless Devices
GE NE R AL DE S C RI PT ION
F E A T U RE S
Broadcom®
•
The
BCM20707 is a single-chip
Bluetooth 4.2-compliant, stand-alone baseband
processor with an integrated 2.4 GHz transceiver.
Manufactured using the industry's most advanced
40 nm CMOS low-power process, the BCM20707
employs the highest level of integration to eliminate
all critical external components, thereby minimizing
the device's footprint and the costs associated with
implementing Bluetooth solutions.
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The BCM20707 is the optimal solution for embedded
and IoT applications. Built-in firmware adheres to the
Bluetooth Low Energy (BLE) profile
A P P LIC AT IO N S
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Complies with Bluetooth Core Specification
version 4.2 including BR/EDR/BLE
Broadcom proprietary LE data rate up to 2 Mbps
BLE HID profile version 1.00 compliant
Bluetooth Device ID profile version 1.3 compliant
Supports Generic Access Profile (GAP)
Supports Adaptive Frequency Hopping (AFH)
Excellent receiver sensitivity
Programmable output power control
Integrated ARM Cortex-M3 microprocessor core
On-chip power-on reset (POR)
Support for EEPROM and serial flash interfaces
Integrated low dropout regulators (LDO)
On-chip software controlled PMU
PCM/I2S Interface
Infrared modulator
IR learning
On-chip support for SPI (master/slave modes)
Broadcom Serial Communications interface
(compatible with NXP I2C slaves)
Package types:
– 49-pin FBGA package (4.5 mm x 4.0 mm)
Bluetooth 4.2-compliant
– 36-pin WLBGA package (2.8 mm x 2.5 mm)
Bluetooth 4.2-complaint
– RoHS compliant
Home automation
Point-of-sale input devices
Blood pressure monitors
“Find me” devices
Heart rate monitors
Proximity sensors
Thermometers
Wearables
•
Figure 1: Functional Block Diagram
BCM20707
JTAG
Cortex-M3
DMA
Scan JTAG
Address
Decoder
Bus Arb
Trap & Patch
Flash I/F
32-bit AHB
AHB2EBI
External
Bus I/F
AHB2APB
WD Timer
Remap &
Pause
GPIO+Aux
SW
Timers
AHB2MEM
AHB2MEM
PMU Control
ROM
RAM
Interrupt
Controller
JTAG Master
32-bit APB
Calibration &
Control
Bluetooth Radio
Digital Demod
Bit Sync
Low Power
Scan
Blue RF Registers
PMU
LPO
PCM
UART
LCU
Digital
Modulator
RF
SPI
Master
Buffer
APU
Blue RF I/F
Digital I/O
I2C_Master
BT Clk/
Hopper
Rx/Tx
Buffer
I/O
Port Control
Debug
UART
PTU
ADC
MIC
POR
20707-DS206-R
Corporate Headquarters: San Jose, CA
May 27, 2016
BCM20707 Preliminary Data Sheet
Revision History
Revision History
Revision
Date
20707-DS106-R
05/27/16 Updated:
• Cover page minor edits.
• Figure 2: “Reset Timing,” on page 13.
• Figure 3: “LDO Functional Block Diagram,” on page 16.
• Figure 8: “BCM20707 49-Pin FBGA Ball Map,” on page 35.
• Table 9: “Power Supply Specifications,” on page 37.
• Table 10: “VDDC LDO Electrical Specifications,” on page 38.
• Ambient operating temperatures in Section 5: “Ordering Information,” on
page 61.
20707-DS105-R
04/20/16
20707-DS104-R
04/07/16
20707-DS103-R
03/24/16
20707-DS102-R
10/02/15
20707-DS101-R
06/15/15
20707-DS100-R
04/17/15
Broadcom®
May 27, 2016 • 20707-DS206-R
Change Description
Added:
• “Link Control Layer” on page 11.
• Table 11: “BTLDO_2P5 Electrical Specifications,” on page 39.
Added:
• 36-pin WLBGA Package (2.8mm x2.5mm) feature bullet on cover page
• Added informative notes in “One-Time Programmable Memory” on page 12
and “Clock Frequencies” on page 21
• “36-Pin WLBGA Package” on page 23
• Table 7: “BCM20707 36-Pin WLBGA List,” on page 32
• Figure 21: “BCM20707 36-pin WLBGA Package (2.8 mm x 2.5 mm),” on page
59
• 36-pin WLBGA part to Section 5: “Ordering Information,” on page 61
Updated:
• Figure 19: “BCM20707 49-pin FBGA Package (4.5 mm x 4.0 mm),” page 51
Updated:
• Table 6: “BCM20707 49-Ball Pin List,” on page 26
Updated:
• Table 6: “BCM20707 49-Ball Pin List,” on page 27
Updated:
• “Internal LDO” on page 14
• Figure 3: “LDO Functional Block Diagram,” on page 15 (added)
• “Collaborative Coexistence” on page 15 (added)
• “Global Coexistence Interface” on page 15 (added)
• “SECI I/O” on page 15 (added)
• Table 6: “BCM20707 49-Ball Pin List,” on page 27
• Table 8: “Power Supply Specifications,” on page 33
• Section 5: “Ordering Information,” on page 55
Initial release
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 2
© 2016 by Broadcom. All rights reserved.
Broadcom®, the pulse logo, Connecting everything®, the Connecting everything logo, and Avago
Technologies are among the trademarks of Broadcom and/or its affiliates in the United States, certain other
countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective
owners.
Broadcom reserves the right to make changes without further notice to any products or data herein to improve
reliability, function, or design.
Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not
assume any liability arising out of the application or use of this information, nor the application or use of any
product or circuit described herein, neither does it convey any license under its patent rights nor the rights of
others.
This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed,
intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations,
pollution control, hazardous substances management, or other high-risk application. BROADCOM
PROVIDES THIS DATA SHEET “AS-IS,” WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS
ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT.
BCM20707 Preliminary Data Sheet
Table of Contents
Table of Contents
About This Document .................................................................................................................................. 9
Purpose and Audience ............................................................................................................................ 9
Acronyms and Abbreviations................................................................................................................... 9
Technical Support ........................................................................................................................................ 9
Section 1: Functional Description ................................................................................... 10
Bluetooth Baseband Core ......................................................................................................................... 10
Bluetooth 4.2 Features .......................................................................................................................... 10
Link Control Layer ................................................................................................................................. 11
Test Mode Support................................................................................................................................ 11
Frequency Hopping Generator.............................................................................................................. 11
Microprocessor Unit................................................................................................................................... 12
NVRAM Configuration Data and Storage.............................................................................................. 12
One-Time Programmable Memory........................................................................................................ 12
External Reset....................................................................................................................................... 13
Integrated Radio Transceiver .................................................................................................................... 14
Transmit ................................................................................................................................................ 14
Digital Modulator ............................................................................................................................ 14
Digital Demodulator and Bit Synchronizer ..................................................................................... 14
Power Amplifier .............................................................................................................................. 14
Receiver ................................................................................................................................................ 15
Digital Demodulator and Bit Synchronizer ..................................................................................... 15
Receiver Signal Strength Indicator................................................................................................. 15
Local Oscillator Generation ................................................................................................................... 15
Calibration ............................................................................................................................................. 15
Internal LDO .......................................................................................................................................... 15
Collaborative Coexistence......................................................................................................................... 16
Global Coexistence Interface .................................................................................................................... 16
SECI I/O ................................................................................................................................................ 16
Peripheral Transport Unit .......................................................................................................................... 17
Broadcom Serial Communications Interface ......................................................................................... 17
UART Interface...................................................................................................................................... 18
Peripheral UART Interface ............................................................................................................. 19
PCM Interface.............................................................................................................................................. 20
Slot Mapping ......................................................................................................................................... 20
Frame Synchronization ......................................................................................................................... 20
Data Formatting..................................................................................................................................... 20
Burst PCM Mode ................................................................................................................................... 20
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Table of Contents
Clock Frequencies...................................................................................................................................... 21
Crystal Oscillator ................................................................................................................................... 21
HID Peripheral Block...................................................................................................................... 22
GPIO Ports .................................................................................................................................................. 23
49-Pin FBGA Package .......................................................................................................................... 23
36-Pin WLBGA Package ....................................................................................................................... 23
PWM............................................................................................................................................................. 24
Triac Control ............................................................................................................................................... 25
Serial Peripheral Interface ......................................................................................................................... 25
Infrared Modulator...................................................................................................................................... 25
Infrared Learning ........................................................................................................................................ 26
Power Management Unit............................................................................................................................ 27
RF Power Management ........................................................................................................................ 27
Host Controller Power Management ..................................................................................................... 27
BBC Power Management...................................................................................................................... 27
Section 2: Pin Assignments ............................................................................................. 28
Pin Descriptions ......................................................................................................................................... 28
49-Pin FBGA List................................................................................................................................... 28
36-Pin WLBGA List ............................................................................................................................... 32
Ball Map....................................................................................................................................................... 35
49-Pin FBGA Ball Map .......................................................................................................................... 35
36-Pin WLBGA Ball Map ....................................................................................................................... 36
Section 3: Specifications .................................................................................................. 37
Electrical Characteristics........................................................................................................................... 37
Digital I/O Characteristics...................................................................................................................... 40
Current Consumption ............................................................................................................................ 41
RF Specifications ....................................................................................................................................... 43
Timing and AC Characteristics ................................................................................................................. 47
UART Timing......................................................................................................................................... 47
SPI Timing............................................................................................................................................. 48
BSC Interface Timing ............................................................................................................................ 50
PCM Interface Timing............................................................................................................................ 51
Short Frame Sync, Master Mode ................................................................................................... 51
Short Frame Sync, Slave Mode ..................................................................................................... 52
Long Frame Sync, Master Mode.................................................................................................... 53
Long Frame Sync, Slave Mode...................................................................................................... 54
2S
I
Timing.............................................................................................................................................. 55
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 5
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Table of Contents
Section 4: Mechanical Information .................................................................................. 58
Package Diagrams...................................................................................................................................... 58
Tape Reel and Packaging Specifications................................................................................................. 60
Section 5: Ordering Information ...................................................................................... 61
Appendix A: Acronyms and Abbreviations .................................................................... 62
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 6
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
List of Figures
List of Figures
Figure 1: Functional Block Diagram................................................................................................................... 1
Figure 2: Reset Timing..................................................................................................................................... 13
Figure 3: LDO Functional Block Diagram ........................................................................................................ 16
Figure 4: Recommended Oscillator Configuration—12 pF Load Crystal ........................................................ 21
Figure 5: PWM Block Diagram......................................................................................................................... 24
Figure 6: Infrared TX ........................................................................................................................................ 26
Figure 7: Infrared RX ....................................................................................................................................... 26
Figure 8: BCM20707 49-Pin FBGA Ball Map................................................................................................... 35
Figure 9: BCM20707 36-Pin WLBGA Ball Map ............................................................................................... 36
Figure 10: UART Timing .................................................................................................................................. 47
Figure 11: SPI Timing, Mode 0 and 2 .............................................................................................................. 48
Figure 12: SPI Timing, Mode 1 and 3 .............................................................................................................. 49
Figure 13: BSC Interface Timing Diagram ....................................................................................................... 50
Figure 14: PCM Timing Diagram (Short Frame Sync, Master Mode) .............................................................. 51
Figure 15: PCM Timing Diagram (Short Frame Sync, Slave Mode) ................................................................ 52
Figure 16: PCM Timing Diagram (Long Frame Sync, Master Mode)............................................................... 53
Figure 17: PCM Timing Diagram (Long Frame Sync, Slave Mode)................................................................. 54
Figure 18: I2S Transmitter Timing .................................................................................................................... 57
Figure 19: I2S Receiver Timing........................................................................................................................ 57
Figure 20: BCM20707 49-pin FBGA Package (4.5 mm x 4.0 mm) .................................................................. 58
Figure 21: BCM20707 36-pin WLBGA Package (2.8 mm x 2.5 mm)............................................................... 59
Figure 22: Pin 1 Orientation ............................................................................................................................. 60
Broadcom®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 7
BCM20707 Preliminary Data Sheet
List of Tables
List of Tables
Table 1: Common Baud Rate Examples, 24 MHz Clock ................................................................................. 18
Table 2: Common Baud Rate Examples, 48 MHz Clock ................................................................................. 19
Table 3: BCM20707 Peripheral UART ............................................................................................................. 19
Table 4: Crystal Strapping Options for the 49-Pin FBGA Package.................................................................. 21
Table 5: Reference Crystal Electrical Specifications ....................................................................................... 22
Table 6: BCM20707 49-Pin FBGA List ............................................................................................................ 28
Table 7: BCM20707 36-Pin WLBGA List ......................................................................................................... 32
Table 8: Absolute Maximum Ratings ............................................................................................................... 37
Table 9: Power Supply Specifications.............................................................................................................. 37
Table 10: VDDC LDO Electrical Specifications................................................................................................ 38
Table 11: BTLDO_2P5 Electrical Specifications .............................................................................................. 39
Table 12: Digital I/O Characteristics ................................................................................................................ 40
Table 13: Bluetooth, BLE, BR and EDR Current Consumption, Class 1 ......................................................... 41
Table 14: Bluetooth and BLE Current Consumption, Class 2 (0 dBm) ........................................................... 41
Table 15: Receiver RF Specifications .............................................................................................................. 43
Table 16: Transmitter RF Specifications .......................................................................................................... 45
Table 17: BLE RF Specifications ..................................................................................................................... 46
Table 18: UART Timing Specifications ............................................................................................................ 47
Table 19: SPI Mode 0 and 2 ............................................................................................................................ 48
Table 20: SPI Mode 1 and 3 ............................................................................................................................ 49
Table 21: BSC Interface Timing Specifications (up to 1 MHz) ......................................................................... 50
Table 22: PCM Interface Timing Specifications (Short Frame Sync, Master Mode)........................................ 51
Table 23: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode).......................................... 52
Table 24: PCM Interface Timing Specifications (Long Frame Sync, Master Mode) ........................................ 53
Table 25: PCM Interface Timing Specifications (Long Frame Sync, Slave Mode) .......................................... 54
Table 26: Timing for I2S Transmitters and Receivers ...................................................................................... 56
Table 27: BCM20707 Tape Reel Specifications .............................................................................................. 60
Table 28: Ordering Information ........................................................................................................................ 61
Broadcom®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 8
About This Document
BCM20707 Preliminary Data Sheet
About This Document
Purpose and Audience
The data sheet provides details of the functional, operational, and electrical characteristics of the Broadcom®
BCM20707 device. It is intended for hardware, design, application, and OEM engineers.
Acronyms and Abbreviations
In most cases, acronyms and abbreviations are defined on first use. Acronyms and abbreviations in this
document are also defined in Appendix A: “Acronyms and Abbreviations,” on page 62.
For a comprehensive list of acronyms and other terms used in Broadcom documents, go to:
http://www.broadcom.com/press/glossary.php.
Technical Support
Broadcom provides customer access to a wide range of information, including technical documentation,
schematic diagrams, product bill of materials, PCB layout information, and software updates through its
customer support portal (https://support.broadcom.com). For a CSP account, contact your Sales or Engineering
support representative.
In addition, Broadcom provides other product support through its Downloads & Support site
(http://www.broadcom.com/support/).
Broadcom®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 9
BCM20707 Preliminary Data Sheet
Functional Description
Section 1: Functional Description
Bluetooth Baseband Core
The Bluetooth Baseband Core (BBC) implements all of the time-critical functions required for high-performance
Bluetooth operation. The BBC manages the buffering, segmentation, and routing of data for all connections. It
also buffers data that passes through it, handles data flow control, schedules SCO/ACL and TX/RX transactions,
monitors Bluetooth slot usage, optimally segments and packages data into baseband packets, manages
connection status indicators, and composes and decodes HCI packets. In addition to these functions, it
independently handles HCI event types, and HCI command types. The following transmit and receive functions
are also implemented in the BBC hardware to increase reliability and security of the TX/RX data before sending
over the air:
•
Symbol timing recovery, data deframing, forward error correction (FEC), header error control (HEC), cyclic
redundancy check (CRC), data decryption, and data dewhitening in the receiver.
•
Data framing, FEC generation, HEC generation, CRC generation, key generation, data encryption, and
data whitening in the transmitter.
Bluetooth 4.2 Features
Both the BCM20707 36-pin WLBGA package and the 49-pin FBGA package support all Bluetooth 4.2 and
legacy features, with the following benefits:
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Dual-mode Bluetooth low energy (BT and BLE operation)
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Extended inquiry response (EIR): Shortens the time to retrieve the device name, specific profile, and
operating mode.
•
Encryption pause resume (EPR): Enables the use of Bluetooth technology in a much more secure
environment.
•
Sniff subrating (SSR): Optimizes power consumption for low duty cycle asymmetric data flow, which
subsequently extends battery life.
•
Secure simple pairing (SSP): Reduces the number of steps for connecting two devices, with minimal or no
user interaction required.
•
Link supervision time out (LSTO): Additional commands added to HCI and Link Management Protocol
(LMP) for improved link timeout supervision.
•
Quality of service (QoS) enhancements: Changes to data traffic control, which results in better link
performance. Audio, human interface device (HID), bulk traffic, SCO, and enhanced SCO (eSCO) are
improved with the erroneous data (ED) and packet boundary flag (PBF) enhancements.
•
Secure connections (BR/EDR)
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Fast advertising interval
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Piconet clock adjust
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Connectionless broadcast
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LE privacy v1.1
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Low duty cycle directed advertising
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LE dual mode topology
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Bluetooth Baseband Core
Link Control Layer
The link control layer is part of the Bluetooth link control functions that are implemented in dedicated logic in the
link control unit (LCU). This layer consists of the command controller that takes commands from the software,
and other controllers that are activated or configured by the command controller, to perform the link control
tasks. Each task is performed in a different state in the Bluetooth Link Controller.
•
States:
– Standby
– Connection
– Page
– Page Scan
– Inquiry
– Inquiry Scan
– Sniff
– Advertising
– Scanning
Test Mode Support
The BCM20707 fully supports Bluetooth Test mode as described in Part I:1 of the Specification of the Bluetooth
System Version 3.0. This includes the transmitter tests, normal and delayed loopback tests, and reduced
hopping sequence.
In addition to the standard Bluetooth Test Mode, the BCM20707 also supports enhanced testing features to
simplify RF debugging and qualification and type-approval testing. These features include:
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Fixed frequency carrier wave (unmodulated) transmission
– Simplifies some type-approval measurements (Japan)
– Aids in transmitter performance analysis
•
Fixed frequency constant receiver mode
– Receiver output directed to I/O pin
– Allows for direct BER measurements using standard RF test equipment
– Facilitates spurious emissions testing for receive mode
•
Fixed frequency constant transmission
– 8-bit fixed pattern or PRBS-9
– Enables modulated signal measurements with standard RF test equipment
Frequency Hopping Generator
The frequency hopping sequence generator selects the correct hopping channel number based on the link
controller state, Bluetooth clock, and device address.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Microprocessor Unit
Microprocessor Unit
The BCM20707 microprocessor unit runs software from the link control (LC) layer up to the host controller
interface (HCI). The microprocessor is based on the Cortex-M3 32-bit RISC processor with embedded ICE-RT
debug and JTAG interface units. The microprocessor also includes 848 KB of ROM memory for program storage
and boot ROM, 352 KB of RAM for data scratch-pad, and patch RAM code.
The internal boot ROM provides flexibility during power-on reset to enable the same device to be used in various
configurations. At power-up, the lower layer protocol stack is executed from the internal ROM.
External patches can be applied to the ROM-based firmware to provide flexibility for bug fixes and features
additions. These patches can be downloaded using external NVRAM. The device can also support the
integration of user applications and profiles using an external serial flash memory.
NVRAM Configuration Data and Storage
NVRAM contains configuration information about the customer application, including the following:
•
Fractional-N information
•
BD_ADDR
•
UART baud rate
•
SDP service record
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File system information used for code, code patches, or data. The BCM20707 can use SPI Flash or I2C
EEPROM/serial flash for NVRAM storage.
One-Time Programmable Memory
The BCM20707 includes 2 Kbytes of one-time programmable (OTP) memory allow manufacturing
customization and to avoid the need for an on-board NVRAM. If customization is not required, then the OTP
does not need to be programmed. Whether the OTP is programmed or not, to save power it is disabled when
the boot process is complete. The OTP is designed to store a minimal amount of information. Aside from OTP
data, most user configuration information will be downloaded to RAM after the BCM20707 boots and is ready
for host transport communication.
Note: The OTP is disabled internally for the 36-Pin WLBGA package.
The OTP contents are limited to:
•
Parameters required prior to downloading the user configuration to RAM.
•
Parameters unique to each part and each customer (for example, the Bluetooth device address and/or the
software license key).
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Microprocessor Unit
External Reset
An external active-low reset signal, RESET_N, can be used to put the BCM20707 in the reset state. An external
voltage detector reset IC with 50 ms delay is needed on the RESET_N. The RESET_N should be released only
after the VDDO supply voltage level has been stabilized for 50 ms.
Figure 2: Reset Timing
Low
threshold
50 ms
Reset
(External)
VDDO
~2.4 ms
VDDO POR
0.5 ms
VDDC
~2.4 ms
VDDC Reset (Internal)
10 LPO cycles
XTAL_RESET
8 LPO cycles
XTAL_BUF_PU
Note: The Reset signal should remain below this threshold 50 ms after VDDO is stable. Note that the
representation of this signaling diagram is extended and not drawn to scale.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Integrated Radio Transceiver
Integrated Radio Transceiver
The BCM20707 has an integrated radio transceiver that has been optimized for use in 2.4 GHz Bluetooth
wireless systems. It has been designed to provide low-power, low-cost, robust communications for applications
operating in the globally available 2.4 GHz unlicensed ISM band. The BCM20707 is fully compliant with the
Bluetooth Radio Specification and enhanced data rate (EDR) specification and meets or exceeds the
requirements to provide the highest communication link quality of service.
Transmit
The BCM20707 features a fully integrated zero-IF transmitter. The baseband transmit data is GFSK-modulated
in the modem block and upconverted to the 2.4 GHz ISM band in the transmitter path. The transmitter path
consists of signal filtering, I/Q upconversion, output power amplifier, and RF filtering. The transmitter path also
incorporates /4-DQPSK for 2 Mbps and 8-DPSK for 3 Mbps to support EDR. The transmitter section is
compatible with the BLE specification. The transmitter PA bias can also be adjusted to provide Bluetooth class
1 or class 2 operation.
Digital Modulator
The digital modulator performs the data modulation and filtering required for the GFSK, /4-DQPSK, and
8-DPSK signal. The fully digital modulator minimizes any frequency drift or anomalies in the modulation
characteristics of the transmitted signal and is much more stable than direct VCO modulation schemes.
Digital Demodulator and Bit Synchronizer
The digital demodulator and bit synchronizer take the low-IF received signal and perform an optimal frequency
tracking and bit synchronization algorithm.
Power Amplifier
The fully integrated PA supports Class 1 or Class 2 output using a highly linearized, temperature-compensated
design. This provides greater flexibility in front-end matching and filtering. Due to the linear nature of the PA
combined with some integrated filtering, external filtering is required to meet the Bluetooth and regulatory
harmonic and spurious requirements. For integrated mobile handset applications in which Bluetooth is
integrated next to the cellular radio, external filtering can be applied to achieve near thermal noise levels for
spurious and radiated noise emissions. The transmitter features a sophisticated on-chip transmit signal strength
indicator (TSSI) block to keep the absolute output power variation within a tight range across process, voltage,
and temperature.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Integrated Radio Transceiver
Receiver
The receiver path uses a low-IF scheme to downconvert the received signal for demodulation in the digital
demodulator and bit synchronizer. The receiver path provides a high degree of linearity, an extended dynamic
range, and high-order on-chip channel filtering to ensure reliable operation in the noisy 2.4 GHz ISM band. The
front-end topology, with built-in out-of-band attenuation, enables the BCM20707 to be used in most applications
with minimal off-chip filtering. For integrated handset operation, in which the Bluetooth function is integrated
close to the cellular transmitter, external filtering is required to eliminate the desensitization of the receiver by
the cellular transmit signal.
Digital Demodulator and Bit Synchronizer
The digital demodulator and bit synchronizer take the low-IF received signal and perform an optimal frequency
tracking and bit synchronization algorithm.
Receiver Signal Strength Indicator
The radio portion of the BCM20707 provides a receiver signal strength indicator (RSSI) signal to the baseband,
so that the controller can take part in a Bluetooth power-controlled link by providing a metric of its own receiver
signal strength to determine whether the transmitter should increase or decrease its output power.
Local Oscillator Generation
A local oscillator (LO) generation provides fast frequency hopping (1600 hops/second) across the 79 maximum
available channels. The LO generation subblock employs an architecture for high immunity to LO pulling during
PA operation. The BCM20707 uses an internal RF and IF loop filter.
Calibration
The BCM20707 radio transceiver features an automated calibration scheme that is fully self-contained in the
radio. No user interaction is required during normal operation or during manufacturing to provide optimal
performance. Calibration tunes the performance of all the major blocks within the radio to within 2% of optimal
conditions, including gain and phase characteristics of filters, matching between key components, and key gain
blocks. This takes into account process variation and temperature variation. Calibration occurs transparently
during normal operation during the settling time of the hops, and calibrates for temperature variations as the
device cools and heats during normal operation in its environment.
Internal LDO
The BCM20707 uses two LDOs - one for 1.2V and the other for 2.5V. The 1.2V LDO provides power to the
baseband and radio and the 2.5V LDO powers the PA.
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BCM20707 Preliminary Data Sheet
Collaborative Coexistence
Figure 3: LDO Functional Block Diagram
BCM20707 PMU
VBAT
VDD2P5
1.2V LDO
VDDC_OUT
2.5V LDO
VDD2P5_OUT
(VDDC_LDO)
(BTLDO2P5)
AVSS_GND
Collaborative Coexistence
The BCM20707 provides extensions and collaborative coexistence to the standard Bluetooth AFH for direct
communication with WLAN devices. Collaborative coexistence enables WLAN and Bluetooth to operate
simultaneously in a single device. The device supports industry-standard coexistence signaling, including
802.15.2, and supports Broadcom and third-party WLAN solutions.
Global Coexistence Interface
The BCM20707 supports the proprietary Broadcom Global Coexistence Interface (GCI) which is a 2-wire
interface.
The following key features are associated with the interface:
•
Enhanced coexistence data can be exchanged over GCI_SECI_IN and GCI_SECI_OUT a two-wire
interface, one serial input (GCI_SECI_IN), and one serial output (GCI_SECI_OUT). The pad configuration
registers must be programmed to choose the digital I/O pins that serve the GCI_SECI_IN and
GCI_SECI_OUT function.
•
It supports generic UART communication between WLAN and Bluetooth devices.
•
To conserve power, it is disabled when inactive.
•
It supports automatic resynchronization upon waking from sleep mode.
•
It supports a baud rate of up to 4 Mbps.
SECI I/O
The BCM20707 devices have dedicated GCI_SECI_IN and GCI_SECI_OUT pins. The two pin functions can be
mapped to any of the Broadcom Global Coexistence Interface (GCI) GPIO. Pin function mapping is controlled
by the configuration file that is stored in either NVRAM or downloaded directly into on-chip RAM from the host.
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BCM20707 Preliminary Data Sheet
Peripheral Transport Unit
Peripheral Transport Unit
Broadcom Serial Communications Interface
The BCM20707 provides a 2-pin master BSC interface, which can be used to retrieve configuration information
from an external EEPROM or to communicate with peripherals such as trackball or touch-pad modules, and
motion tracking ICs used in mouse devices. The BSC interface is compatible with I2C slave devices. BSC does
not support multimaster capability or flexible wait-state insertion by either master or slave devices.
The following transfer clock rates are supported by BSC:
•
100 kHz
•
400 kHz
•
800 kHz (Not a standard I2C-compatible speed.)
•
1 MHz (Compatibility with high-speed I2C-compatible devices is not guaranteed.)
The following transfer types are supported by BSC:
•
Read (Up to 127 bytes can be read.)
•
Write (Up to 127 bytes can be written.)
•
Read-then-Write (Up to 127 bytes can be read and up to 127 bytes can be written.)
•
Write-then-Read (Up to 127 bytes can be written and up to 127 bytes can be read.)
Hardware controls the transfers, requiring minimal firmware setup and supervision.
The clock pin (SCL) and data pin (SDA) are both open-drain I/O pins. Pull-up resistors external to the
BCM20707 are required on both the SCL and SDA pins for proper operation.
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BCM20707 Preliminary Data Sheet
Peripheral Transport Unit
UART Interface
The UART physical interface is a standard, 4-wire interface (RX, TX, RTS, and CTS) with adjustable baud rates
from 38400 bps to 6 Mbps. During initial boot, UART speeds may be limited to 750 kbps. The baud rate may be
selected via a vendor-specific UART HCI command. The BCM20707 has a 1040-byte receive FIFO and a 1040byte transmit FIFO to support enhanced data rates. The interface supports the Bluetooth UART HCI (H4)
specification. The default baud rate for H4 is 115.2 kbaud.
The UART clock default setting is 24 MHz, and can be configured to run as high as 48 MHz to support up to
6 Mbps. The baud rate of the BCM20707 UART is controlled by two values. The first is a UART clock divisor
(set in the DLBR register) that divides the UART clock by an integer multiple of 16. The second is a baud rate
adjustment (set in the DHBR register) that is used to specify a number of UART clock cycles to stuff in the first
or second half of each bit time. Up to eight UART cycles can be inserted into the first half of each bit time, and
up to eight UART clock cycles can be inserted into the end of each bit time.
Table 1 contains example values to generate common baud rates with a 24 MHz UART clock.
Table 1: Common Baud Rate Examples, 24 MHz Clock
Baud Rate Adjustment
Baud Rate (bps)
High Nibble
Low Nibble
Mode
Error (%)
6M
0xFF
0xF8
High rate
0.00
4M
0xFF
0xF4
High rate
0.00
3M
0xFF
0xF8
High rate
0.00
2M
0XFF
0XF4
High rate
0.00
1M
0X44
0XFF
Normal
0.00
921600
0x05
0x05
Normal
0.16
460800
0x02
0x02
Normal
0.16
230400
0x04
0x04
Normal
0.16
115200
0x00
0x00
Normal
0.16
57600
0x00
0x00
Normal
0.16
38400
0x01
0x00
Normal
0.00
Table 2 contains example values to generate common baud rates with a 48 MHz UART clock.
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BCM20707 Preliminary Data Sheet
Peripheral Transport Unit
Table 2: Common Baud Rate Examples, 48 MHz Clock
Baud Rate (bps)
High Rate
Low Rate
Mode
Error (%)
6M
0xFF
0xF8
High rate
0
4M
0xFF
0xF4
High rate
0
3M
0x0
0xFF
Normal
0
2M
0x44
0xFF
Normal
0
1.5M
0x0
0xFE
Normal
0
1M
0x0
0xFD
Normal
0
921600
0x22
0xFD
Normal
0.16
230400
0x0
0xF3
Normal
0.16
115200
0x1
0xE6
Normal
–0.08
57600
0x1
0xCC
Normal
0.04
38400
0x11
0xB2
Normal
0
Normally, the UART baud rate is set by a configuration record downloaded after reset. Support for changing the
baud rate during normal HCI UART operation is included through a vendor-specific command that allows the
host to adjust the contents of the baud rate registers.
The BCM20707 UART operates correctly with the host UART as long as the combined baud rate error of the
two devices is within ±2%.
Peripheral UART Interface
The BCM20707 has a second UART that may be used to interface to other peripherals. This peripheral UART
is accessed through the optional I/O ports, which can be configured individually and separately for each
functional pin as shown in Table 3.
Table 3: BCM20707 Peripheral UART
Pin Name
pUART_TX
pUART_RX
pUART_CTS_N
pUART_RTS_N
Configured pin name
P0
P2
P3
P6
P31
P33
–
P30
Note: Not all of the GPIOs above are available on the 36-pin WLBGA package.
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BCM20707 Preliminary Data Sheet
PCM Interface
PCM Interface
The BCM20707 includes a PCM interface that shares pins with the I2S interface. The PCM Interface on the
BCM20707 can connect to linear PCM codec devices in master or slave mode. In master mode, the BCM20707
generates the PCM_CLK and PCM_SYNC signals. In slave mode, these signals are provided by another master
on the PCM interface and are inputs to the BCM20707.
Slot Mapping
The BCM20707 supports up to three simultaneous full-duplex SCO or eSCO channels through the PCM
interface. These three channels are time-multiplexed onto the single PCM interface by using a time-slotting
scheme where the 8 kHz or 16 kHz audio sample interval is divided into as many as 16 slots. The number of
slots is dependent on the selected interface rate (128 kHz, 512 kHz, or 1024 kHz). The corresponding number
of slots for these interface rate is 1, 2, 4, 8, and 16, respectively. Transmit and receive PCM data from an SCO
channel is always mapped to the same slot. The PCM data output driver tristates its output on unused slots to
allow other devices to share the same PCM interface signals. The data output driver tristates its output after the
falling edge of the PCM clock during the last bit of the slot.
Frame Synchronization
The BCM20707 supports both short- and long-frame synchronization in both master and slave modes. In shortframe synchronization mode, the frame synchronization signal is an active-high pulse at the audio frame rate
that is a single-bit period in width and is synchronized to the rising edge of the bit clock. The PCM slave looks
for a high on the falling edge of the bit clock and expects the first bit of the first slot to start at the next rising edge
of the clock. In long-frame synchronization mode, the frame synchronization signal is again an active-high pulse
at the audio frame rate; however, the duration is three-bit periods and the pulse starts coincident with the first
bit of the first slot.
Data Formatting
The BCM20707 may be configured to generate and accept several different data formats. For conventional
narrowband speech mode, the BCM20707 uses 13 of the 16 bits in each PCM frame. The location and order of
these 13 bits can be configured to support various data formats on the PCM interface. The remaining three bits
are ignored on the input and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. The
default format is 13-bit 2’s complement data, left justified, and clocked MSB first.
Burst PCM Mode
In this mode of operation, the PCM bus runs at a significantly higher rate of operation to allow the host to duty
cycle its operation and save current. In this mode of operation, the PCM bus can operate at a rate of up to
24 MHz. This mode of operation is initiated with an HCI command from the host.
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BCM20707 Preliminary Data Sheet
Clock Frequencies
Clock Frequencies
The BCM20707 49-pin FBGA package supports 20, 24, and 40 MHz crystals (XTAL) by selecting the correct
crystal strapping options. Other frequencies also supported by firmware configuration. Table 4 lists the strapping
options.
Table 4: Crystal Strapping Options for the 49-Pin FBGA Package
Strapping Option Pin
BT_XTAL_STRAP_1
BT_XTAL_STRAP_0
XTAL Frequency
Pull Low
Pull Low
40 Mhz
Pull Low
Pull High
24 MHz
Pull High
Pull Low
20 MHz
Pull High
Pull High
Read from serial flash or EEPROM
Note: Only the Read from Serial flash or EEPROM option is available for the 36-pin WLBGA package.
The strapping is set internally in the package.
Crystal Oscillator
The XTAL must have an accuracy of ±20 ppm as defined by the Bluetooth specification. Two external load
capacitors in the range of 5 pF to 30 pF are required to work with the crystal oscillator. The selection of the load
capacitors is XTAL-dependent (see Figure 4).
Figure 4: Recommended Oscillator Configuration—12 pF Load Crystal
22 pF
XIN
Crystal
XOUT
20 pF
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BCM20707 Preliminary Data Sheet
Clock Frequencies
Table 5 shows the recommended crystal specifications.
Table 5: Reference Crystal Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum Unit
Nominal frequency
–
20
24
40
Oscillation mode
–
Fundamental
Frequency tolerance
@25°C
–
±10
–
ppm
Tolerance stability over temp
@0°C to +70°C
–
±10
–
ppm
Equivalent series resistance
–
–
–
60
W
Load capacitance
–
–
12
–
pF
Operating temperature range
–
0
–
+70
°C
Storage temperature range
–
–40
–
+125
°C
Drive level
–
–
–
200
μW
Aging
–
–
–
±10
ppm/year
Shunt capacitance
–
–
–
2
pF
MHz
–
HID Peripheral Block
The peripheral blocks of the BCM20707 all run from a single 128 kHz low-power RC oscillator. The oscillator can
be turned on at the request of any of the peripherals. If the peripheral is not enabled, it shall not assert its clock
request line.
The keyboard scanner is a special case, in that it may drop its clock request line even when enabled, and then
reassert the clock request line if a keypress is detected.
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BCM20707 Preliminary Data Sheet
GPIO Ports
GPIO Ports
49-Pin FBGA Package
The BCM20707 49-pin FBGA package has 24 general-purpose I/Os (GPIOs). All GPIOs support programmable
pull-ups and are capable of driving up to 8 mA at 3.3V or 4 mA at 1.8V, except P26, P27, P28, and P29, which
are capable of driving up to 16 mA at 3.3V or 8 mA at 1.8V. The following GPIOs are available:
•
BT_GPIO_0/P36/P38 (triple bonded; only one of three is available)
•
BT_GPIO_1/P25/P32 (triple bonded; only one of three is available)
•
BT_GPIO_3/P27/P33 (triple bonded; only one of three is available)
•
BT_CLK_REQ/P4/P24 (triple bonded; only one of three is available)
•
BT_GPIO_5/P15 (dual bonded; only one of two is available)
•
BT_GPIO_6/P11/P26 (triple bonded; only one of three is available)
•
BT_GPIO_7/P30 (Dual bonded; only one of two is available)
•
BT_CLK_REQ/P4/P24 (triple bonded; only one of three is available)
•
I2S_PCM_IN/P12 (dual bonded; only one of two is available)
•
I2S_PCM_OUT/P3/P29/P35 (quadruple bonded; only one of four is available)
•
I2S_PCM_CLK/P2/P28/P37 (quadruple bonded; only one of four is available)
•
I2S_WS_PCM_SYNC/P0/P34 (triple bonded; only one of three is available)
All of these pins can be programmed as ADC inputs.
Port 26–Port 29
P[26:29] consist of four pins. All pins are capable of sinking up to 16 mA for LEDs. These pins also have PWM
functionality, which can be used for LED dimming.
36-Pin WLBGA Package
The BCM20707 36-pin WLBGA package has seven GPIOs. All GPIOs support programmable pull-ups and are
capable of driving up to 8 mA at 3.3V or 4 mA at 1.8V. The following GPIOs are available:
•
BT_GPIO_3/P0/LPO_IN (triple bonded; only one of three is available)
•
BT_GPIO_5/P8/P33 (triple bonded; only one of three is available)
•
I2S_DI/PCM_OUT_P3 (triple bonded; only one of three is available)
•
I2S_DO/PCM_OUT/BT_GPIO_6/P9 (quadruple bonded; only one of four is available)
•
I2S_CLK/PCM_CLK/BT_GPIO_4/P1 (quadruple bonded; only one of four is available)
•
I2S_WS/PCM_SYNC/P11 (triple bonded; only one of three is available)
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BCM20707 Preliminary Data Sheet
PWM
PWM
The BCM20707 has four internal PWMs. The PWM module consists of the following:
•
PWM1–4
•
Each of the four PWM channels, PWM1–4, contains the following registers:
– 10-bit initial value register (read/write)
– 10-bit toggle register (read/write)
– 10-bit PWM counter value register (read)
•
PWM configuration register shared among PWM1–4 (read/write). This 12-bit register is used:
– To configure each PWM channel
– To select the clock of each PWM channel
– To change the phase of each PWM channel
Figure 5 shows the structure of one PWM.
Figure 5: PWM Block Diagram
pwm#_init_val_adr register
enable
clk_sel
o_flip
pwm_cfg_adr register
pwm#_togg_val_adr register
10
10
pwm#_cntr_adr
10
cntr value is ARM readable
pwm_out
Example: PWM cntr w/ pwm#_init_val = 0 (dashed line)
PWM cntr w/ pwm#_init_val = x (solid line)
10'H3FF
pwm_togg_val_adr
10'Hx
10'H000
pwm_out
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BCM20707 Preliminary Data Sheet
Triac Control
Triac Control
The BCM20707 includes hardware support for zero-crossing detection and trigger control for up to four triacs.
The BCM20707 detects zero-crossing on the AC zero detection line and uses that to provide a pulse that is
offset from the zero crossing. This allows the BCM20707 to be used in dimmer applications, as well as any other
applications that require a control signal that is offset from an input event.
The zero-crossing hardware includes an option to suppress glitches.
Serial Peripheral Interface
The BCM20707 has two independent SPI interfaces. One is a master-only interface (SPI_2) and the other
(SPI_1) can be either a master or a slave. Each interface has a 64-byte transmit buffer and a 64-byte receive
buffer. To support more flexibility for user applications, the BCM20707 has optional I/O ports that can be
configured individually and separately for each functional pin. The BCM20707 acts as an SPI master device that
supports 1.8V or 3.3V SPI slaves. The BCM20707 can also act as an SPI slave device that supports a 1.8V or
3.3V SPI master.
Note: SPI voltage depends on VDDO; therefore, it defines the type of devices that can be supported.
Infrared Modulator
The BCM20707 includes hardware support for infrared TX. The hardware can transmit both modulated and
unmodulated waveforms. For modulated waveforms, hardware inserts the desired carrier frequency into all IR
transmissions. IR TX can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral
UART transmitter.
If descriptors are used, they include IR on/off state and the duration between 1–32767 µsec. The BCM20707 IR
TX firmware driver inserts this information in a hardware FIFO and makes sure that all descriptors are played
out without a glitch due to underrun (see Figure ).
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BCM20707 Preliminary Data Sheet
Infrared Learning
Figure 6: Infrared TX
VCC
R1
62
D1 Infrared-LD
R2
BCM20707
IR TX
2.4K
Q1
MMBTA42
Infrared Learning
The BCM20707 includes hardware support for infrared learning. The hardware can detect both modulated and
unmodulated signals. For modulated signals, the BCM20707 can detect carrier frequencies between 10 kHz
and 500 kHz, and the duration that the signal is present or absent. The BCM20707 firmware driver supports
further analysis and compression of the learned signal. The learned signal can then be played back through the
BCM20707 IR TX subsystem (see Figure 7).
Figure 7: Infrared RX
VCC
D2 Photodiode
BCM20707
IR RX
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BCM20707 Preliminary Data Sheet
Power Management Unit
Power Management Unit
The Power Management Unit (PMU) provides power management features that can be invoked by software
through power management registers or packet-handling in the baseband core.
RF Power Management
The BBC generates power-down control signals for the transmit path, receive path, PLL, and power amplifier to
the 2.4 GHz transceiver, which then processes the power-down functions accordingly.
Host Controller Power Management
Power is automatically managed by the firmware based on input device activity. As a power-saving task, the
firmware controls the disabling of the on-chip regulator when in HIDOFF (deep sleep) mode.
BBC Power Management
There are several low-power operations for the BBC:
•
Physical layer packet handling turns RF on and off dynamically within packet TX and RX.
•
Bluetooth-specified low-power connection mode. While in these low-power connection modes, the
BCM20707 runs on the Low Power Oscillator and wakes up after a predefined time period.
The BCM20707 automatically adjusts its power dissipation based on user activity. The following power modes
are supported:
•
Active mode
•
Idle mode
•
Sleep mode
•
HIDOFF (deep sleep) mode
The BCM20707 transitions to the next lower state after a programmable period of user inactivity. When user
activity resumes, the BCM20707 immediately enters Active mode.
In HIDOFF mode, the BCM20707 baseband and core are powered off by disabling power to VDDC_OUT and
PAVDD. The VDDO domain remains powered up and will turn the remainder of the chip on when it detects user
events. This mode minimizes chip power consumption and is intended for long periods of inactivity.
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BCM20707 Preliminary Data Sheet
Pin Assignments
Section 2: Pin Assignments
Pin Descriptions
49-Pin FBGA List
Table 6: BCM20707 49-Pin FBGA List
Signal
I/O
Power
Domain
Description
A2
RFOP
I/O
VDD_RF
RF I/O antenna port
A4
XO_IN
I
VDD_RF
Crystal or reference input
A5
XO_OUT
O
VDD_RF
Crystal oscillator output
I
N/A
VBAT input pin. This must be less than or equal to
VDDO.
Pin
Radio
Voltage Regulators
D1
VBAT
E1
VDD2P5_IN
I
N/A
2.5V LDO input
E2
VDD2P5_OUT
O
N/A
2.5V LDO output
F1
VDDC_OUT
O
N/A
1.2V LDO output
Straps
G3
BT_XTAL_STRAP_0
I
VDDO
A strap for choosing the XTAL frequencies.
F2
BT_XTAL_STRAP_1
I
VDDO
A strap for choosing the XTAL frequencies.
A6
RST_N
I
VDDO
Active-low reset input
G7
BT_TM1
I
VDDO
Reserved: connect to ground.
I
VDDO
BT_GPIO_0/BT_DEV_WAKE A signal from the host
to the BCM20707 that the host requires attention.
P36
I/O
VDDO
GPIO: P36
A/D converter input 3
Quadrature: QDZ0
SPI_1: SPI_CLK (master and slave)
Auxiliary Clock Output: ACLK0
External T/R switch control: ~tx_pd
P38
I/O
VDDO
GPIO: P38
A/D converter input 1
SPI_1: MOSI (master and slave)
IR_TX
Digital I/O
F8
BT_GPIO_0
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BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 6: BCM20707 49-Pin FBGA List (Cont.)
Pin
Signal
I/O
Power
Domain
F7
BT_GPIO_1
O
VDDO
BT_GPIO_1/BT_HOST_WAKE A signal from the
BCM20707 device to the host indicating that the
Bluetooth device requires attention.
P25
I/O
VDDO
GPIO: P25
SPI_1: MISO (master and slave)
Peripheral UART: puart_rx
P32
I/O
VDDO
GPIO: P32
A/D converter input 7
Quadrature: QDX0
SPI_1: SPI_CS (slave only)
Auxiliary clock output: ACLK0
Peripheral UART: puart_tx
Description
E4
BT_GPIO_2
I
VDDO
When high, this signal extends the XTAL warm-up
time for external CLK requests. Otherwise, it is
typically connected to ground.
C5
BT_GPIO_3
I/O
VDDO
General-purpose I/O
P27
PWM1
I/O
VDDO
GPIO: P27
SPI_1: MOSI (master and slave)
Optical control output: QOC1
Triac control 2
Current: 16 mA sink
P33
I/O
VDDO
GPIO: P33
A/D converter input 6
Quadrature: QDX1
SPI_1: MOSI (slave only)
Auxiliary clock output: ACLK1
Peripheral UART: puart_rx
BT_GPIO_4
I/O
VDDO
General-purpose I/O: can also be configured as a
GCI pin.
P6
I/O
VDDO
GPIO: P6
Quadrature: QDZ0
Peripheral UART: puart_rts
SPI_1: SPI_CS (slave only)
60Hz_main
I
N/A
P31
I/O
VDDO
GPIO: P31
A/D converter input 8
Peripheral UART: puart_tx
BT_GPIO_5
I/O
VDDO
General-purpose I/O: can also be configured as a
GCI pin.
Debug UART
P15
I/O
VDDO
GPIO: P15
A/D converter input 20
IR_RX
60Hz_main
D6
LPO_IN
B5
External LPO input
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BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 6: BCM20707 49-Pin FBGA List (Cont.)
Pin
Signal
I/O
Power
Domain
B6
BT_GPIO_6
I/O
VDDO
General-purpose I/O: can also be configured as a
GCI pin.
P11
I/O
VDDO
GPIO: P11
Keyboard scan output (column): KSO3
A/D converter input 24
P26
PWM0
I/O
VDDO
GPIO: P26
SPI_1: SPI_CS (slave only)
Optical control output: QOC0
Triac control 1
Current: 16 mA sink
BT_GPIO_7
I/O
VDDO
General-purpose I/O: can also be configured as a
GCI pin.
P30
I/O
VDDO
GPIO: P30
A/D converter input 9
Peripheral UART: puart_rts
I
VDDO
UART receive data
C6
F5
BT_UART_RXD
Description
F4
BT_UART_TXD
O
VDDO
UART transmit data
F3
BT_UART_RTS_N
O
VDDO
UART request to send output
G4
BT_UART_CTS_N
I
VDDO
UART clear to send input
G8
BT_CLK_REQ
O
VDDO
Used for shared-clock application.
P4
I/O
VDDO
GPIO: P4
Quadrature: QDY0
Peripheral UART: puart_rx
SPI_1: MOSI (master and slave)
IR_TX
P24
I/O
VDDO
GPIO: P24
SPI_1: SPI_CLK (master and slave)
Peripheral UART: puart_tx
D8
SPI2_MISO_I2C_SCL
I/O
VDDO
BSC CLOCK
E8
SPI2_MOSI_I2C_SDA
I/O
VDDO
BSC DATA
E7
SPI2_CLK
O
VDDO
Serial flash SPI clock
D7
SPI2_CSN
O
VDDO
Serial flash active-low chip select
C7
I2S_DI/PCM_IN
I/O
VDDO
PCM/I2S data input.
I2C_SDA
P12
I/O
VDDO
GPIO: P12
A/D converter input 23
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 30
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 6: BCM20707 49-Pin FBGA List (Cont.)
Pin
Signal
I/O
Power
Domain
A8
I2S_DO/PCM_OUT
I/O
VDDO
PCM/I2S data output.
I2C_SCL
P3
I/O
VDDO
GPIO: P3
Quadrature: QDX1
Peripheral UART: puart_cts
SPI_1: SPI_CLK (master and slave)
P29
PWM3
I/O
VDDO
GPIO: P29
Optical control output: QOC3
A/D converter input 10
LED2
Current: 16 mA sink
P35
I/O
VDDO
GPIO: P35
A/D converter input 4
Quadrature: QDY1
Peripheral UART: puart_cts
BSC: SDA
I2S_CLK/PCM_CLK
I/O
VDDO
PCM/I2S clock Fp1
P2
I/O
VDDO
GPIO: P2
Quadrature: QDX0
Peripheral UART: puart_rx
SPI_1: SPI_CS (slave only)
SPI_1: MOSI (master only)
P28
PWM2
I/O
VDDO
GPIO: P28
Optical control output: QOC2
A/D converter input 11
LED1
Current: 16 mA sink
P37
I/O
VDDO
GPIO: P37
A/D converter input 2
Quadrature: QDZ1
SPI_1: MISO (slave only)
Auxiliary clock output: ACLK1
BSC: SCL
I2S_WS/PCM_SYNC
I/O
VDDO
PCM sync/I2S word select
P0
I/O
VDDO
GPIO: P0
A/D converter input 29
Peripheral UART: puart_tx
SPI_1: MOSI (master and slave)
IR_RX
60Hz_main
Note: Not available during TM1 = 1.
P34
I/O
VDDO
GPIO: P34
A/D converter input 5
Quadrature: QDY0
Peripheral UART: puart_rx
External T/R switch control: tx_pd
I
VDDO
•
•
B7
C8
G2
BT_OTP_3P3V_ON
Description
If OTP is used, pull this pin high.
If OTP is not used, pull this pin low.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 31
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 6: BCM20707 49-Pin FBGA List (Cont.)
Pin
Signal
I/O
Power
Domain
JTAG_SEL
I/O
VDDO
Description
JTAG
D5
ARM JTAG debug mode control.
Connect to GND for all applications.
Supplies
G1
BT_OTP_VDD3P3V
I
N/A
3.3V OTP supply voltage
B4
BT_IFVDD1P2
I
N/A
Radio IF PLL supply
A1
BT_PAVDD2P5
I
N/A
Radio PA supply
B1
BT_LNAVDD1P2
I
N/A
Radio LNA supply
C1
BT_VCOVDD1P2
I
N/A
Radio VCO supply
A3
BT_PLLVDD1P2
I
N/A
Radio RF PLL supply
B8, G6 VDDC
I
N/A
Core logic supply
G5
I
N/A
Digital I/O supply voltage
–
N/A
Ground
VDDO
A7, B2, VSS
B3, C2,
D2, F6
36-Pin WLBGA List
Table 7: BCM20707 36-Pin WLBGA List
Ball
Signal
I/O
Power Domain
Description
Radio
A1
RFOP
I/O
VDD_RF
RF I/O antenna port
A5
XO_IN
I
VDD_RF
Crystal or reference input
A4
XO_OUT
O
VDD_RF
Crystal oscillator output
Voltage Regulators
D2
VBAT
I
N/A
VBAT input pin. This must be less than or
equal to VDDO.
D1
VDD2P5_IN
I
N/A
2.5V LDO input
C1
VDDC_OUT
O
N/A
1.2V LDO output
RST_N
I
VDDO
Active-low reset input
D6
BT_GPIO_0
I
VDDO
BT_GPIO_0/BT_DEV_WAKE. A signal
from the host to the BCM20707 indicating
that the host requires attention.
E6
BT_GPIO_1
O
VDDO
BT_GPIO_1/BT_HOST_WAKE. A signal
from the BCM20707 device to the host
indicating that the Bluetooth device
requires attention.
Straps
C6
Digital I/O
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 32
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 7: BCM20707 36-Pin WLBGA List (Cont.)
Ball
Signal
I/O
Power Domain
Description
C4
BT_GPIO_2
I
VDDO
When high, this signal extends the XTAL
warm-up time for external CLK requests.
Otherwise, it is typically connected to
ground.
F2
BT_GPIO_3
I/O
VDDO
General-purpose I/O
P0
I
VDDO
• GPIO: P0
• A/D converter input 29
• Peripheral UART: puart_tx
• SPI_1: MOSI (master and slave)
• IR_RX
• 60 Hz_main
Note: Not available during TM1 = 1.
LPO_IN
I
N/A
External LPO input
BT_GPIO_5
I/O
VDDO
General-purpose I/O
P8
I
VDDO
•
•
•
GPIO: P8
A/D converter input 27
External T/R Switch Control: ~tx_pd
P33
I
VDDO
•
•
•
•
•
•
GPIO: P33
A/D converter input 6
Quadrature: QDX1
SPI_1: MOSI (slave only)
Auxiliary clock output: ACLK1
Peripheral UART: puart_rx
F5
BT_UART_RXD
I
VDDO
UART receive data
E5
BT_UART_TXD
O
VDDO
UART transmit data
F4
BT_UART_RTS_N
O
VDDO
UART request to send output
F3
BT_UART_CTS_N
I
VDDO
UART clear to send input
F6
BT_CLK_REQ
O
VDDO
Used for shared-clock application.
F1
SPI2_MISO_I2C_SCL
I/O
VDDO
BSC CLOCK
E3
SPI2_MOSI_I2C_SDA
I/O
VDDO
BSC DATA
E1
SPI2_CLK
I/O
VDDO
Serial flash SPI clock
E2
SPI2_CSN
I/O
VDDO
Serial flash active-low chip select
B6
I2S_DI/PCM_IN
I/O
VDDO
•
•
PCM/I2S data input.
I2C_SDA
P3
I
VDDO
•
•
•
•
GPIO: P3
Quadrature: QDX1
Peripheral UART: puart_cts
SPI_1: SPI_CLK (master and slave)
C5
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 33
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 7: BCM20707 36-Pin WLBGA List (Cont.)
Ball
Signal
I/O
Power Domain
Description
A3
I2S_DO/PCM_OUT
I/O
VDDO
PCM/I2S data output.
I2C_SCL
BT_GPIO_6
I/O
VDDO
General-purpose I/O
P9
I
VDDO
GPIO:P9
A/D converter input 26
External T/R switch control: tx_pd
I2S_CLK/PCM_CLK
I/O
VDDO
PCM/I2S clock
BT_GPIO_4
I/O
VDDO
General-purpose I/O
P1
I
VDDO
GPIO:P1
A/D converter input 28
Peripheral UART: puart_rts
SPI_1: MISO (master and slave)
IR_TX
I2S_WS/PCM_SYNC
I/O
VDDO
PCM sync/I2S word select
P11
I
VDDO
GPIO: P11
A/D converter input 24
JTAG_SEL
I/O
VDDO
ARM JTAG debug mode control. Connect
to GND for all applications.
BT_IFVDD1P2
I
N/A
Radio IF PLL supply
B1
BT_PAVDD2P5
I
N/A
Radio PA supply
B3
BT_PLLVDD1P2
I
N/A
Radio RF PLL supply
D5
VDDC
I
N/A
Core logic supply
E4
VDDO
I
N/A
Digital I/O supply voltage
–
N/A
Ground
B4
A6
JTAG
B5
Supplies
C2
A2, B2, C3, VSS
D3, D4
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 34
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Ball Map
Ball Map
49-Pin FBGA Ball Map
Figure 8: BCM20707 49-Pin FBGA Ball Map
1
2
3
4
5
6
7
A
BT_
PAVDD2P5
RFOP
BT_
PLLVDD1P2
XO_IN
XO_OUT
RST_N
VSS
B
BT_
LNAVDD1P2
VSS
VSS
BT_
IFVDD1P2
BT_GPIO_5/
P15
BT_GPIO_6/
P11/P26
I2S_CLK/
PCM_CLK/
P2/P28/P37
VDDC
B
C
BT_
VCOVDD1P2
VSS
NC
NC
BT_GPIO_3/
P27/P33
BT_GPIO_7/
P30
I2S_DI/
PCM_IN/P12
I2S_WS/
PCM_SYNC/
P0/P34
C
D
VBAT
VSS
NC
NC
JTAG_SEL
BT_GPIO_4/
P6/LPO_IN/
P31
SPI2_CSN
SPI2_MISO_
I2C_SCL
D
E
VDD2P5_IN
VDD2P5_OUT
NC
BT_GPIO_2
NC
NC
SPI2_CLK
SPI2_MOSI_
I2C_SDA
E
F
VDDC_OUT
BT_XTAL_
STRAP_1
BT_UART_
RTS_N
BT_UART_
TXD
BT_UART_
RXD
VSS
BT_GPIO_1/
P25/P32
BT_GPIO_0/
P36/P38
F
G
BT_OTP_
VDD3P3V
BT_OTP_
3P3V_ON
BT_XTAL_
STRAP_0
BT_UART_
CTS_N
VDDO
VDDC
BT_TM1
1
2
3
4
5
6
7
Broadcom®
May 27, 2016 • 20707-DS206-R
8
I2S_DO/
A
PCM_OUT/P3/
P29/P35
BT_CLK_REQ/ G
P4/P24
8
Bluetooth SoC
Page 35
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Ball Map
36-Pin WLBGA Ball Map
Figure 9: BCM20707 36-Pin WLBGA Ball Map
1
F
E
SPI2_MISO_I2C_
SCL
SPI2_CLK
2
BT_GPIO_3
P0
LPO_IN
SPI2_CSN
VBAT
3
4
5
BT_UART_CTS_N
BT_UART_RTS_N
BT_UART_RXD
SPI2_MOSI_I2C_SDA
VDDO
BT_UART_TXD
BT_GPIO_1
BT_HOST_WAKE
VSS
VSS
VDDC
BT_GPIO_0
BT_DEV_WAKE
D
VDD2P5_IN
C
VDDC_OUT
BT_IFVDD1P2
VSS
B
BT_PAVDD2P5
VSS
BT_PLLVDD1P2
I2S_CLK/PCM_CLK
BT_GPIO_4
P1
JTAG_SEL
RFOP
VSS
I2S_DO/PCM_OUT
BT_GPIO_6
P9
XO_OUT
XO_IN
A
BT_GPIO_2
Broadcom®
May 27, 2016 • 20707-DS206-R
BT_GPIO_5
P8
P33
6
BT_CLK_REQ
RST_N
I2S_DI_PCM_IN
P3
I2S_WS/PCM_SYNC
P11
Bluetooth SoC
Page 36
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Specifications
Section 3: Specifications
Electrical Characteristics
Table 8 shows the maximum electrical rating for voltages referenced to VDD pin.
Table 8: Absolute Maximum Ratings
Specification
Parameter
Minimum
Nominal
Maximum
Units
Ambient temperature of operation
–30
25
85
°C
Storage temperature
–40
–
150
°C
ESD tolerance HBM
–2000
–
2000
V
ESD tolerance MM
–100
–
100
V
ESD tolerance CDM
–500
–
500
V
Latch-up
–200
–
200
mA
VDDC
–0.5
–
1.38
V
VDDO
–0.5
–
3.795
V
VDD_RF (excluding PA)
–0.5
–
1.38
V
VDDPA
–0.5
–
3.565
V
VBAT
–0.5
–
3.795
V
BT_OTP_VDD3P3V
–0.5
–
3.795
V
VDD2P5_IN
–0.5
–
3.795
V
Table 9 shows the power supply characteristics for the range TJ = 0°C to 125°C.
Table 9: Power Supply Specifications
Parameter
Conditions
Min.
Typ.
Max.
Units
VDD Core
–
1.14
1.2
1.26
V
VDDOa
–
1.62
3.3
3.6
V
VDDRF
Excluding class 1 PA
1.14
1.2
1.26
V
VDDPA
Class 1 operation
2.25
2.5 to 2.8
2.94
V
VBATa
–
1.62
3.3
3.6
V
BT_OTP_VDD3 –
P3V
3.0
3.3
3.6
V
VDD2P5_IN
3.0
3.3
3.6
V
–
a. VDDO must be ≥ VBAT.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 37
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Electrical Characteristics
Table 10: VDDC LDO Electrical Specifications
Parameter
Conditions
Min.
Typical
Max.
Unit
Input Voltage
–
1.62
3.3
3.6
V
Nominal Output
Voltage
–
–
1.2
DC Accuracy
Accuracy at any step, including bandgap
reference.
–5
–
5
%
Output Voltage
Range
Programmability Step Size
0.89
–
1.34
V
–
30
–
mV
Load Current
–
–
40
mA
–
–
200
mV
–
–
0.2
%Vo/V
Load Regulation Iload = 1 mA to 40 mA, Vout = 1.2V,
Package + PCB R = 0.3Ω
–
0.02
0.05
%Vo/mA
Quiescent
Current
No load @Vin = 3.3V
–
18
23
μA
Power down
Current
Vin = 3.3V @25C
–
0.2
–
μA
Vin = 3.6 @80C
–
TBD
–
–
Output Noise
Iload = 15 mA, 100 kHz
–
40
nV/sqrtHz
Iload = 15 mA, 2 MHz
–
14
nV/sqrtHz
–
Dropout Voltage Iload = 40 mA
Line Regulation
PSRR
Vin from 1.62V to 3.6V, Iload = 40 mA
Vin = 3.3, Vout = 1.2V,
Iload = 40 mA
V
1 kHz
65
–
–
dB
10 kHz
60
–
–
dB
100 kHz
55
–
–
dB
100
–
–
mA
Over Current
Limit
–
Turn-on Time
VBAT = 3.3V, BG already on,
–
LDO OFF to ON, Co = 1 μF, 90% of Vout
–
100
μs
In-rush current
during turn-on
During start-up, Co = 1 μF
–
–
60
mA
Transient
Performance
Iload = 1 mA to 15 mA and
15 mA to 1 mA in 1 μs
–
–
40
mV
Iload = 15 mA to 40 mA and
40 mA to 15 mA in 1 μs
–
–
25
–
External Output
Capacitor
Ceramic cap with ESR ≤0.5Ω
0.8
1
4.7
μF
External Input
Capacitor
Ceramic, X5R, 0402, ±20%, 10V.
–
1
–
μF
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 38
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Electrical Characteristics
Table 11: BTLDO_2P5 Electrical Specifications
Parameters
Conditions
Min
Typ
Max
Units
Input supply
voltage, Vin
Min = Vo + 0.2V = 2.7V
(for Vo = 2.5V)
Dropout voltage requirement must
be met under maximum load for
performance specs.
3.0
3.3
3.6
V
Nominal output
voltage, Vo
Default = 2.5V
–
2.5
–
V
Output voltage
programmability
2.2
Range
Accuracy at any step (including line/ –5
load regulation), load >0.1 mA
–
2.8
5
V
%
Dropout voltage
At max load
–
–
200
mV
Output current
–
0.1
–
70
mA
Quiescent current
No load; Vin = Vo + 0.2V
Vin = Vo + 0.2V
–
8
660
16
700
μA
Leakage current
Power-down mode. At junction
temperature 85°C.
–
1.5
5
μA
Line regulation
Vin from (Vo + 0.2V) to 3.6V, max
load
–
–
3.5
mV/V
Load regulation
Load from 1 mA to 70 mA,
Vin = 3.6V
–
–
0.3
mV/mA
PSRR
Vin ≥ Vo + 0.2V, Vo = 2.5V,
Co = 2.2 μF, max load, 100 Hz to
100 kHz
20
–
–
dB
LDO turn-on time
LDO turn-on time when rest of chip –
is up
–
150
μs
External output
capacitor, Co
Ceramic, X5R, 0402, (ESR: 5m240 mΩ), ±20%, 6.3V
0.7
2.2
2.64
μF
External input
capacitor
Ceramic, X5R, 0402, ±20%, 10V
–
1
–
μF
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 39
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Electrical Characteristics
Digital I/O Characteristics
Table 12: Digital I/O Characteristics
Characteristics
Value
Symbol
Minimum
Typical
Maximum
Unit
Input Voltage
•
•
Low
High
VDDO = 1.8V
VIL
–
–
0.6
V
VDDO = 3.3
VIL
–
–
0.8
V
VDDO = 1.8V
VIH
1.1
–
–
V
VDDO = 3.3V
VIH
2.0
–
–
V
–
–
0.4
V
–
–
V
Output Voltage
•
Low
–
VOL
•
High
VDDO – 0.4V
VOH
Input Current
•
Low
–
IIL
–
–
1.0
μA
•
High
–
IIH
–
–
1.0
μA
Output Current
•
Low
VDDO = 3.3V,
VOL = 0.4V
IOL
–
–
2.0
mA
•
High
VDDO = 3.3V,
VOH = 2.9V
IOH
–
–
4.0
mA
VDDO = 1.8V,
VOH = 1.4
IOH
–
–
TBD
mA
CIN
–
–
0.4
pF
Input capacitance –
Note: In Table 13, current consumption measurements are taken at VBAT with the assumption that
VBAT is connected to VDDO and VDD2P5_IN.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 40
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Electrical Characteristics
Current Consumption
Table 13: Bluetooth, BLE, BR and EDR Current Consumption, Class 1
Mode
Remarks
3DH5/3DH5
–
Typ.
Unit
37.10
mA
BLE
•
BLE
Connected 600 ms interval
211
μA
•
BLE ADV
Unconnectable 1.00 sec
176
μA
•
BLE Scan
No devices present. A 1.28-sec interval with 11.25 ms scan window.
355
μA
DMx/DHx
•
DM1/DH1
–
32.15
mA
•
DM3/DH3
–
38.14
mA
•
DM5/DH5
–
38.46
mA
HIDOFF
Deep sleep
2.69
μA
Page scan
Periodic scan rate is 1.28 sec
0.486
mA
Receive
•
1 Mbps
Peak current level during reception of a basic-rate packet.
26.373
mA
•
EDR
Peak current level during the reception of a 2 or 3 Mbps rate packet. 26.373
mA
Sniff Slave
•
11.25 ms
–
4.95
mA
•
22.5 ms
–
2.6
mA
•
495.00 ms
Based on one attempt and no timeout.
254
μA
Transmit
•
1 Mbps
Peak current level during the transmission of a basic-rate packet:
GFSK output power = 10 dBm.
60.289
mA
•
EDR
Peak current level during the transmission of a 2 or 3 Mbps rate
packet. EDR output power = 8 dBm.
52.485
mA
Note: In Table 14, current consumption measurements are taken at input of VDD2P5_IN, VDDO, and
VBAT combined (VDD2P5_IN = VDDO = VBAT = 3.0V).
Table 14: Bluetooth and BLE Current Consumption, Class 2 (0 dBm)
Mode
Remarks
Typ.
Unit
3DH5/3DH5
–
31.57
mA
BLE
•
BLE ADV
Unconnectable 1.00 sec
174
μA
•
BLE Scan
No devices present. A 1.28-sec interval with 11.25 ms scan window.
368
μA
–
27.5
mA
DMx/DHx
•
DM1/DH1
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 41
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Electrical Characteristics
Table 14: Bluetooth and BLE Current Consumption, Class 2 (0 dBm)
Mode
Remarks
Typ.
Unit
•
DM3/DH3
–
31.34
mA
•
DM5/DH5
–
32.36
mA
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 42
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
RF Specifications
RF Specifications
Note:
•
•
All specifications in Table 15 are for industrial temperatures.
All specifications in Table 15 are single-ended. Unused inputs are left open.
Table 15: Receiver RF Specifications
Conditions
Minimum Typical a Maximum Unit
Frequency range
–
2402
–
2480
MHz
RX sensitivity b
GFSK, 0.1% BER, 1 Mbps
–
–93.5
–
dBm
LE GFSK, 0.1% BER, 1 Mbps
–
–96.5
–
dBm
/4-DQPSK, 0.01% BER, 2 Mbps –
–95.5
–
dBm
Parameter
General
8-DPSK, 0.01% BER, 3 Mbps
–
–89.5
–
dBm
Maximum input
GFSK, 1 Mbps
–
–
–20
dBm
Maximum input
/4-DQPSK, 8-DPSK, 2/3 Mbps –
–
–20
dBm
C/I cochannel
GFSK, 0.1% BER
–
9.5
11
dB
C/I 1 MHz adjacent channel
GFSK, 0.1% BER
–
–5
0
dB
C/I 2 MHz adjacent channel
GFSK, 0.1% BER
–
–40
–30.0
dB
C/I > 3 MHz adjacent channel
GFSK, 0.1% BER
–
–49
–40.0
dB
C/I image channel
GFSK, 0.1% BER
–
–27
–9.0
dB
C/I 1 MHz adjacent to image
channel
GFSK, 0.1% BER
–
–37
–20.0
dB
C/I cochannel
–
11
13
dB
–
–8
0
dB
C/I 2 MHz adjacent channel
/4-DQPSK, 0.1% BER
/4-DQPSK, 0.1% BER
/4-DQPSK, 0.1% BER
–
–40
–30.0
dB
C/I > 3 MHz adjacent channel
8-DPSK, 0.1% BER
–
–50
–40.0
dB
C/I image channel
/4-DQPSK, 0.1% BER
/4-DQPSK, 0.1% BER
–
–27
–7.0
dB
–
–40
–20.0
dB
C/I cochannel
8-DPSK, 0.1% BER
–
17
21
dB
C/I 1 MHz adjacent channel
8-DPSK, 0.1% BER
–
–5
5
dB
Interference Performance
C/I 1 MHz adjacent channel
C/I 1 MHz adjacent to image
channel
C/I 2 MHz adjacent channel
8-DPSK, 0.1% BER
–
–40
–25.0
dB
C/I > 3 MHz adjacent channel
8-DPSK, 0.1% BER
–
–47
–33.0
dB
C/I Image channel
8-DPSK, 0.1% BER
–
–20
0
dB
C/I 1 MHz adjacent to image
channel
8-DPSK, 0.1% BER
–
–35
–13.0
dB
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 43
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
RF Specifications
Table 15: Receiver RF Specifications (Cont.)
Parameter
Conditions
Minimum Typical a Maximum Unit
Out-of-Band Blocking Performance (CW)c
30 MHz–2000 MHz
0.1% BER
–
–10.0
–
dBm
2000–2399 MHz
0.1% BER
–
–27
–
dBm
2498–3000 MHz
0.1% BER
–
–27
–
dBm
3000 MHz–12.75 GHz
0.1% BER
–
–10.0
–
dBm
Out-of-Band Blocking Performance, Modulated Interferer
776–764 MHz
CDMA
–
–10d
–
dBm
824–849 MHz
CDMA
–
–10d
–
dBm
1850–1910 MHz
CDMA
–
–23d
–
dBm
824–849 MHz
EDGE/GSM
–
–10d
–
dBm
880–915 MHz
EDGE/GSM
–
–10d
–
dBm
1710–1785 MHz
EDGE/GSM
–
–23d
–
dBm
1850–1910 MHz
EDGE/GSM
–
–23d
–
dBm
1850–1910 MHz
WCDMA
–
–23d
–
dBm
1920–1980 MHz
WCDMA
–
–23d
–
dBm
–
–39.0
–
–
dBm
30 MHz to 1 GHz
–
–
–
–62
dBm
1 GHz to 12.75 GHz
–
–
–
–47
dBm
65 MHz to 108 MHz
FM Rx
–
–147
–
dBm/Hz
746 MHz to 764 MHz
CDMA
–
–147
–
dBm/Hz
851–894 MHz
CDMA
–
–147
–
dBm/Hz
925–960 MHz
EDGE/GSM
–
–147
–
dBm/Hz
1805–1880 MHz
EDGE/GSM
–
–147
–
dBm/Hz
1930–1990 MHz
PCS
–
–147
–
dBm/Hz
2110–2170 MHz
WCDMA
–
–147
–
dBm/Hz
Intermodulation Performancee
BT, Df = 5 MHz
Spurious Emissionsf
a.
b.
c.
d.
e.
f.
Typical operating conditions are 1.22V operating voltage and 25°C ambient temperature.
The receiver sensitivity is measured at BER of 0.1% on the device interface.
Meets this specification using a front-end bandpass filter.
Numbers are referred to the pin output with an external BPF filter.
f0 = –64 dBm Bluetooth-modulated signal, f1 = –39 dBm sine wave, f2 = –39 dBm Bluetooth-modulated
signal, f0 = 2f1 – f2, and |f2 – f1| = n*1 MHz, where n is 3, 4, or 5. For the typical case, n = 4.
Includes baseband radiated emissions.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 44
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
RF Specifications
Note:
•
•
All specifications in Table 16 are for industrial temperatures.
All specifications in Table 16 are single-ended. Unused inputs are left open.
Table 16: Transmitter RF Specifications
Parameter
Conditions
Minimum Typical
Maximum Unit
–
2402
–
2480
MHz
–
–
12
–
dBm
–
–
9
–
dBm
General
Frequency range
Class1: GFSK Tx
powera
Class1: EDR Tx powerb
Class 2: GFSK Tx power
–
–
2
–
dBm
Power control step
–
2
4
8
dB
/4-DQPSK Frequency Stability
/4-DQPSK RMS DEVM
/4-QPSK Peak DEVM
/4-DQPSK 99% DEVM
–
–10
–
10
kHz
–
–
–
20
%
–
–
–
35
%
–
–
–
30
%
8-DPSK frequency stability
–
–10
–
10
kHz
8-DPSK RMS DEVM
–
–
–
13
%
Modulation Accuracy
8-DPSK Peak DEVM
–
–
–
25
%
8-DPSK 99% DEVM
–
–
–
20
%
–
–
–
–26
dBc
In-Band Spurious Emissions
1.0 MHz < |M – N| < 1.5 MHz
1.5 MHz < |M – N| < 2.5 MHz
–
–
–
–20
dBm
|M – N| > 2.5 MHz
–
–
–
–40
dBm
Out-of-Band Spurious Emissions
30 MHz to 1 GHz
–
–
–
–36.0c
dBm
1 GHz to 12.75 GHz
–
–
–
–30.0c, d
dBm
1.8 GHz to 1.9 GHz
–
–
–
–47.0
dBm
5.15 GHz to 5.3 GHz
–
–
–
–47.0
dBm
a.
b.
c.
d.
12 dBm output for GFSK measured with PAVDD = 2.5V.
9 dBm output for EDR measured with PAVDD = 2.5V.
Maximum value is the value required for Bluetooth qualification.
Meets this spec using a front-end band pass filter.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 45
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
RF Specifications
Table 17: BLE RF Specifications
Parameter
Conditions
Minimum Typical
Maximum Unit
Frequency range
N/A
2402
–
2480
MHz
GFSK, 0.1% BER, 1 Mbps
–
–96.5
–
dBm
N/A
–
9
–
dBm
Rx
sensea
Tx powerb
Mod Char: Delta F1 average
N/A
225
255
275
kHz
Mod Char: Delta F2 max
N/A
99.9
–
–
%
Mod Char: Ratio
N/A
0.8
0.95
–
%
c
a. Dirty Tx is Off.
b. The BLE Tx power can be increased to compensate for front-end losses such as BPF, diplexer, switch, etc. The
output is capped at 12 dBm out. The BLE Tx power at the antenna port cannot exceed the 10 dBm EIRP
specification limit.
c. At least 99.9% of all delta F2 max frequency values recorded over 10 packets must be greater than 185 kHz.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 46
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Timing and AC Characteristics
In this section, use the numbers listed in the Reference column of each table to interpret the following timing
diagrams.
UART Timing
Table 18: UART Timing Specifications
Reference
Characteristics
Min.
Max.
Unit
1
Delay time, UART_CTS_N low to UART_TXD valid
–
24
Baud out
cycles
2
Setup time, UART_CTS_N high before midpoint of
stop bit
–
10
ns
3
Delay time, midpoint of stop bit to UART_RTS_N high –
2
Baud out
cycles
Figure 10: UART Timing
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 47
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
SPI Timing
The SPI interface can be clocked up to 12 MHz.
Table 19 and Figure 11 show the timing requirements when operating in SPI Mode 0 and 2.
Table 19: SPI Mode 0 and 2
Reference
Characteristics
Minimum
Maximum
Unit
1
Time from slave assert SPI_INT to master assert SPI_CSN
(DirectRead)
0
∞
ns
2
Time from master assert SPI_CSN to slave assert SPI_INT
(DirectWrite)
0
∞
ns
3
Time from master assert SPI_CSN to first clock edge
20
∞
ns
/2 SCK
ns
/2 SCK
ns
4
Setup time for MOSI data lines
8
1
5
Hold time for MOSI data lines
8
1
6
Time from last sample on MOSI/MISO to slave deassert
SPI_INT
0
100
ns
7
Time from slave deassert SPI_INT to master deassert
SPI_CSN
0
∞
ns
8
Idle time between subsequent SPI transactions
1 SCK
∞
ns
Figure 11: SPI Timing, Mode 0 and 2
8
SPI_CSN
SPI_INT
(DirectWrite)
2
6
SPI_INT
(DirectRead)
7
1
3
SPI_CLK
(Mode 0)
SPI_CLK
(Mode 2)
4
SPI_MOSI
SPI_MISO
-
Not Driven
First Bit
First Bit
5
Second Bit
Last bit
-
Second Bit
Last bit
Not Driven
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Table 20 and Figure 12 show the timing requirements when operating in SPI Mode 0 and 2.
Table 20: SPI Mode 1 and 3
Reference
Characteristics
Minimum
Maximum
Unit
1
Time from slave assert SPI_INT to master assert
SPI_CSN (DirectRead)
0
∞
ns
2
Time from master assert SPI_CSN to slave assert
SPI_INT (DirectWrite)
0
∞
ns
3
Time from master assert SPI_CSN to first clock edge
20
∞
ns
4
Setup time for MOSI data lines
8
1
/2 SCK
ns
5
Hold time for MOSI data lines
8
1
/2 SCK
ns
6
Time from last sample on MOSI/MISO to slave
deassert SPI_INT
0
100
ns
7
Time from slave deassert SPI_INT to master
deassert SPI_CSN
0
∞
ns
8
Idle time between subsequent SPI transactions
1 SCK
∞
ns
Figure 12: SPI Timing, Mode 1 and 3
SPI_CSN
8
SPI_INT
(DirectWrite)
2
6
SPI_INT
(DirectRead)
7
1
SPI_CLK
(Mode 1)
3
SPI_CLK
(Mode 3)
4
5
SPI_MOSI
-
Invalid bit
First bit
Last bit
-
SPI_MISO
Not Driven
Invalid bit
First bit
Last bit
Not Driven
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 49
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
BSC Interface Timing
The specifications in Table 21 references Figure 13.
Table 21: BSC Interface Timing Specifications (up to 1 MHz)
Reference
Characteristics
Minimum
Maximum
Unit
1
Clock frequency
–
100
kHz
400
800
1000
2
START condition setup time
650
–
ns
3
START condition hold time
280
–
ns
4
Clock low time
650
–
ns
5
Clock high time
280
–
ns
0
–
ns
6
Data input hold
7
Data input setup time
100
–
ns
8
STOP condition setup time
280
–
ns
9
Output valid from clock
–
400
ns
10
Bus free timeb
650
–
ns
timea
a. As a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid
unintended generation of START or STOP conditions.
b. Time that the CBUS must be free before a new transaction can start.
Figure 13: BSC Interface Timing Diagram
1
5
SCL
2
4
8
6
3
7
SDA
IN
10
9
SDA
OUT
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 50
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
PCM Interface Timing
Short Frame Sync, Master Mode
Figure 14: PCM Timing Diagram (Short Frame Sync, Master Mode)
1
2
3
P CM _B C LK
4
PC M _ SYN C
8
PC M _ O U T
H IG H IM PE D A N C E
5
7
6
PC M _IN
Table 22: PCM Interface Timing Specifications (Short Frame Sync, Master Mode)
Reference Characteristics
Minimum
Typical
Maximum Unit
1
PCM bit clock frequency
–
–
20.0
2
PCM bit clock LOW
20.0
–
–
ns
3
PCM bit clock HIGH
20.0
–
–
ns
4
PCM_SYNC delay
0
–
5.7
ns
5
PCM_OUT delay
–0.4
–
5.6
ns
6
PCM_IN setup
16.9
–
–
ns
7
PCM_IN hold
25.0
–
–
ns
8
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
–0.4
–
5.6
ns
Broadcom®
May 27, 2016 • 20707-DS206-R
MHz
Bluetooth SoC
Page 51
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Short Frame Sync, Slave Mode
Figure 15: PCM Timing Diagram (Short Frame Sync, Slave Mode)
1
2
3
PC M _BCLK
4
5
PCM _SYNC
9
PC M _O U T
H IG H IM P E D A N C E
6
8
7
P C M _ IN
Table 23: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode)
Reference
Characteristics
Minimum
Typical Maximum Unit
1
PCM bit clock frequency
–
–
TBD
MHz
2
PCM bit clock LOW
TBD
–
–
ns
3
PCM bit clock HIGH
TBD
–
–
ns
4
PCM_SYNC setup
TBD
–
–
ns
5
PCM_SYNC hold
TBD
–
–
ns
6
PCM_OUT delay
TBD
–
TBD
ns
7
PCM_IN setup
TBD
–
–
ns
8
PCM_IN hold
TBD
–
–
ns
9
Delay from rising edge of PCM_BCLK during last bit TBD
period to PCM_OUT becoming high impedance
–
TBD
ns
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
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BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Long Frame Sync, Master Mode
Figure 16: PCM Timing Diagram (Long Frame Sync, Master Mode)
1
2
3
PCM_BCLK
4
PCM_SYNC
8
PCM_OUT
Bit 0
HIGH IMPEDANCE
Bit 1
5
7
6
PCM_IN
Bit 0
Bit 1
Table 24: PCM Interface Timing Specifications (Long Frame Sync, Master Mode)
Reference Characteristics
Minimum Typical Maximum Unit
1
PCM bit clock frequency
–
–
TBD
MHz
2
PCM bit clock LOW
TBD
–
–
ns
3
PCM bit clock HIGH
TBD
–
–
ns
4
PCM_SYNC delay
TBD
–
TBD
ns
5
PCM_OUT delay
TBD
–
TBD
ns
6
PCM_IN setup
TBD
–
–
ns
7
PCM_IN hold
TBD
–
–
ns
8
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
TBD
–
TBD
ns
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 53
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Long Frame Sync, Slave Mode
Figure 17: PCM Timing Diagram (Long Frame Sync, Slave Mode)
1
2
3
PCM_BCLK
4
5
PCM_SYNC
9
PCM_OUT
Bit 0
HIGH IMPEDANCE
Bit 1
6
8
7
PCM_IN
Bit 0
Bit 1
Table 25: PCM Interface Timing Specifications (Long Frame Sync, Slave Mode)
Reference Characteristics
Minimum Typical
Maximum Unit
1
PCM bit clock frequency
–
–
TBD
MHz
2
PCM bit clock LOW
TBD
–
–
ns
3
PCM bit clock HIGH
TBD
–
–
ns
4
PCM_SYNC setup
TBD
–
–
ns
5
PCM_SYNC hold
TBD
–
–
ns
6
PCM_OUT delay
TBD
–
TBD
ns
7
PCM_IN setup
TBD
–
–
ns
8
PCM_IN hold
TBD
–
–
ns
9
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
TBD
–
TBD
ns
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 54
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
I2S Timing
The BCM20707 supports two independent I2S digital audio ports. The I2S interface supports both master and
slave modes. The I2S signals are:
•
I2S clock: I2S SCK
•
I2S Word Select: I2S WS
•
I2S Data Out: I2S SDO
•
I2S Data In: I2S SDI
I2S SCK and I2S WS become outputs in master mode and inputs in slave mode, while I2S SDO always stays
as an output. The channel word length is 16 bits and the data is justified so that the MSB of the left-channel data
is aligned with the MSB of the I2S bus, per the I2S specification. The MSB of each data word is transmitted one
bit clock cycle after the I2S WS transition, synchronous with the falling edge of bit clock. Left-channel data is
transmitted when I2S WS is low, and right-channel data is transmitted when I2S WS is high. Data bits sent by
the BCM20707 are synchronized with the falling edge of I2S_SCK and should be sampled by the receiver on
the rising edge of I2S_SSCK.
The clock rate in master mode is either of the following:
48 kHz x 32 bits per frame = 1.536 MHz
48 kHz x 50 bits per frame = 2.400 MHz
The master clock is generated from the input reference clock using a N/M clock divider.
In the slave mode, any clock rate is supported to a maximum of 3.072 MHz.
Note: Timing values specified in Table 26 are relative to high and low threshold levels.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 55
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Table 26: Timing for I2S Transmitters and Receivers
Transmitter
Clock Period T
Receiver
Lower Limit
Upper Limit
Lower Limit
Upper Limit
Min
Max
Min
Max
Min
Max
Min
Max
Notes
Ttr
–
–
–
Tr
–
–
–
a
Master Mode: Clock generated by transmitter or receiver
HIGH tHC
0.35Ttr
–
–
–
0.35Ttr
–
–
–
b
LOWtLC
0.35Ttr
–
–
–
0.35Ttr
–
–
–
b
Slave Mode: Clock accepted by transmitter or receiver
HIGH tHC
–
0.35Ttr
–
–
–
0.35Ttr
–
–
c
LOW tLC
–
0.35Ttr
–
–
–
0.35Ttr
–
–
c
Rise time tRC
–
–
0.15Ttr
–
–
–
–
d
Delay tdtr
–
–
–
0.8T
–
–
–
–
e
Hold time thtr
0
–
–
–
–
–
–
–
d
Setup time tsr
–
–
–
–
–
0.2Tr
–
–
f
Hold time thr
–
–
–
–
–
0
–
–
f
Transmitter
Receiver
a. The system clock period T must be greater than Ttr and Tr because both the transmitter and receiver have to be
able to handle the data transfer rate.
b. At all data rates in master mode, the transmitter or receiver generates a clock signal with a fixed mark/space
ratio. For this reason, tHC and tLC are specified with respect to T.
c. In slave mode, the transmitter and receiver need a clock signal with minimum HIGH and LOW periods so that
they can detect the signal. So long as the minimum periods are greater than 0.35Tr, any clock that meets the
requirements can be used.
d. Because the delay (tdtr) and the maximum transmitter speed (defined by Ttr) are related, a fast transmitter driven
by a slow clock edge can result in tdtr not exceeding tRC which means thtr becomes zero or negative. Therefore,
the transmitter has to guarantee that thtr is greater than or equal to zero, so long as the clock rise time tRC is not
more than tRCmax, where tRCmax is not less than 0.15Ttr.
e. To allow data to be clocked out on a falling edge, the delay is specified with respect to the rising edge of the
clock signal and T, always giving the receiver sufficient setup time.
f. The data setup and hold time must not be less than the specified receiver setup and hold time.
Note: The time periods specified in Figure 18 on page 57 and Figure 19 on page 57 are defined by
the transmitter speed. The receiver specifications must match transmitter performance.
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 56
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Figure 18: I2S Transmitter Timing
T
tRC*
tLC > 0.35T
tHC > 0.35T
VH = 2.0V
SCK
VL = 0.8V
thtr > 0
totr < 0.8T
SD and WS
T = Clock period
Ttr = Minimum allowed clock period for transmitter
T = Ttr
* tRC is only relevant for transmitters in slave mode.
Figure 19: I2S Receiver Timing
T
tLC > 0.35T
tHC > 0.35
VH = 2.0V
SCK
VL = 0.8V
tsr > 0.2T
thr > 0
SD and WS
T = Clock period
Tr = Minimum allowed clock period for transmitter
T > Tr
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 57
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Mechanical Information
Section 4: Mechanical Information
Package Diagrams
Figure 20: BCM20707 49-pin FBGA Package (4.5 mm x 4.0 mm)
Broadcom®
May 27, 2016 • 20707-DS206-R
Bluetooth SoC
Page 58
BROADCOM CONFIDENTIAL
BCM20707 Preliminary Data Sheet
Package Diagrams
Figure 21: BCM20707 36-pin WLBGA Package (2.8 mm x 2.5 mm)
Broadcom®
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BCM20707 Preliminary Data Sheet
Tape Reel and Packaging Specifications
Tape Reel and Packaging Specifications
Table 27: BCM20707 Tape Reel Specifications
Parameter
Value
Quantity per reel
2500
Reel diameter
13 inches
Hub diameter
4 inches
Tape width
16 mm
Tape pitch
12 mm
The top-left corner of the BCM20707 package is situated near the sprocket holes, as shown in Figure 22.
Figure 22: Pin 1 Orientation
Pin 1: Top left corner of package toward sprocket holes
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BCM20707 Preliminary Data Sheet
Ordering Information
Section 5: Ordering Information
Table 28: Ordering Information
Part Number
Package
BCM20707UA2KFFB4G
49-pin FBGA
BCM20707UA2EKUBGT
36-pin WLBGA
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Acronyms and Abbreviations
Appendix A: Acronyms and Abbreviations
The following list of acronyms and abbreviations may appear in this document.
Term
Description
ADC
analog-to-digital converter
AFH
adaptive frequency hopping
AHB
advanced high-performance bus
APB
advanced peripheral bus
APU
audio processing unit
ARM7TDMI-S™ Acorn RISC Machine 7 Thumb instruction, Debugger, Multiplier, Ice, Synthesizable
BSC
Broadcom Serial Control
BTC
Bluetooth controller
COEX
coexistence
DFU
device firmware update
DMA
direct memory access
EBI
external bus interface
HCI
Host Control Interface
HV
high voltage
IDC
initial digital calibration
IF
intermediate frequency
IRQ
interrupt request
JTAG
Joint Test Action Group
LCU
link control unit
LDO
low dropout
LHL
lean high land
LPO
low power oscillator
LV
LogicVision™
MIA
multiple interface agent
PCM
pulse code modulation
PLL
phase locked loop
PMU
power management unit
POR
power-on reset
PWM
pulse width modulation
QD
quadrature decoder
RAM
random access memory
RC oscillator
A resistor-capacitor oscillator is a circuit composed of an amplifier, which provides the output
signal, and a resistor-capacitor network, which controls the frequency of the signal.
RF
radio frequency
ROM
read-only memory
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BCM20707 Preliminary Data Sheet
Term
Description
RX/TX
receive, transmit
Acronyms and Abbreviations
SPI
serial peripheral interface
SW
software
UART
universal asynchronous receiver/transmitter
UPI
µ-processor interface
WD
watchdog
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BCM20707 Preliminary Data Sheet
Broadcom® reserves the right to make changes without further notice to any products or data herein to improve reliability,
function, or design.
Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability
arising out of the application or use of this information, nor the application or use of any product or circuit described herein,
neither does it convey any license under its patent rights nor the rights of others.
Broadcom
Web: www.broadcom.com
Corporate Headquarters: San Jose, CA
© 2016 by Broadcom. All rights reserved.
20707-DS206-R
May 27, 2016