FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET tm 40V, 6A, 29mΩ Features General Description Max rDS(on) = 29mΩ at VGS = 10V These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Max rDS(on) = 36mΩ at VGS = 4.5V Low gate charge High performance trench technology for extremely low rDS(on) High power and current handling capability RoHS compliant Applications Inverter Power suppliers D2 D2 D1 D1 G2 SO-8 S1 Pin 1 G1 S2 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID (Note 1a) -Pulsed EAS Drain-Source Avalanche Energy (Note 3) ±20 V 6 A 26 mJ 2 Power Dissipation for Single Operation TJ, TSTG Units V 20 Power Dissipation for Dual Operation PD Ratings 40 (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range 1.6 W 0.9 °C -55 to 150 Thermal Characteristics RθJA Thermal Resistance-Single operation, Junction to Ambient (Note 1a) 81 RθJA Thermal Resistance-Single operation, Junction to Ambient (Note 1b) 135 RθJC Thermal Resistance, Junction to Case (Note 1) 40 °C/W Package Marking and Ordering Information Device Marking FDS8949 Device FDS8949 ©2006 Fairchild Semiconductor Corporation FDS8949 Rev. B1 Reel Size 13’’ 1 Tape Width 12mm Quantity 2500 units www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET October 2006 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current 40 ID = 250µA, referenced to 25°C V mV/°C 33 1 µA 10 µA ±100 nA 3 V VDS = 32V, VGS = 0V TJ = 55°C VGS = ±20V,VDS = 0V On Characteristics (Note 2) VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250µA ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250µA, referenced to 25°C rDS(on) Drain to Source On Resistance gFS Forward Transconductance 1 1.9 -4.6 mV/°C VGS = 10V, ID = 6A 21 29 VGS = 4.5V, ID = 4.5A 26 36 VGS = 10V, ID = 6A,TJ = 125°C 29 43 VDS = 10V,ID = 6A 22 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 20V, VGS = 0V, f = 1MHz f = 1MHz 715 955 pF 105 140 pF 60 90 pF Ω 1.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller”Charge VDD = 20V, ID = 1A VGS = 10V, RGEN = 6Ω VDS = 20V, ID = 6A,VGS = 5V 9 18 ns 5 10 ns 23 37 ns 3 6 ns 7.7 11 nC 2.4 nC 2.8 nC Drain-Source Diode Characteristics and Maximum Ratings VSD Source to Drain Diode Forward Voltage VGS = 0V, IS = 6A (note 2) 0.8 1.2 V trr Reverse Recovery Time (note 3) 17 26 ns Qrr Reverse Recovery Charge 7 11 nC IF = 6A, diF/dt = 100A/µs Notes: 1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user’s board design. a) 81°C/W when mounted on a 1in2 pad of 2 oz copper b) 135°C/W when mounted on a minimum pad . Scale 1:1 on letter size paper 2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%. 3: Starting TJ = 25°C, L = 1mH, IAS = 7.3A, VDD = 40V, VGS = 10V. FDS8949 Rev. B1 2 www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted 20 ID, DRAIN CURRENT (A) 16 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 VGS = 10V VGS = 3.5V VGS = 4.5V 12 VGS = 3.0V 8 4 PULSE DURATION = 300µs DUTY CYCLE = 20%MAX 0 0.0 0.5 1.0 1.5 2.0 2.5 PULSE DURATION = 300µs DUTY CYCLE = 20%MAX 2.5 VGS = 3.0V 2.0 VGS = 3.5V 1.5 VGS = 4.5V 1.0 0.5 VGS = 10V 0 VDS, DRAIN TO SOURCE VOLTAGE (V) 20 70 1.6 ID = 6A VGS = 10V 1.4 1.2 1.0 0.8 0.6 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (oC) 150 VDD = 10V 12 TJ = 125oC 8 TJ = 25oC TJ = -55oC 4 0 1.5 2.0 2.5 3.0 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 4.0 Figure 5. Transfer Characteristics FDS8949 Rev. B1 50 40 TJ = 125oC 30 20 TJ = 25oC 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 100 IS, REVERSE DRAIN CURRENT (A) 16 PULSE DURATION = 300µs DUTY CYCLE = 20%MAX Figure 4. On-Resistance vs Gate to Source Voltage 20 PULSE DURATION = 300µs DUTY CYCLE = 20%MAX ID = 3.5A 60 10 Figure 3. Normalized On Resistance vs Junction Temperature ID, DRAIN CURRENT (A) 16 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE Figure 1. On Region Characteristics 4 8 12 ID, DRAIN CURRENT(A) VGS = 0V 10 1 TJ = 125oC TJ = 25oC 0.1 0.01 1E-3 0.2 TJ = -55oC 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 3 10 VGS, GATE TO SOURCE VOLTAGE(V) 10 VDD = 10V Ciss VDD = 30V VDD = 20V 6 CAPACITANCE (pF) 8 4 2 0 0 4 8 12 Qg, GATE CHARGE(nC) Crss 10 16 f = 1MHz VGS = 0V 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 40 Figure 8. Capacitance vs Drain to Source Voltage 10 7 6 1 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT(A) 10 1 Figure 7. Gate Charge Characteristics TJ = 25oC TJ = 125oC 0.1 -3 10 -2 10 -1 0 1 2 VGS = 10V 4 3 VGS = 4.5V 2 1 o RθJA = 81 C/W 0 25 10 50 75 100 125 150 TA, Ambient TEMPERATURE (oC) Figure 10. Maximum Continuous Drain Current vs Ambient Temperature 100 10 100us 1 10ms P(PK), PEAK TRANSIENT POWER (W) 100 1ms LIMITED BY PACKAGE 0.1 5 3 10 10 10 10 tAV, TIME IN AVALANCHE(ms) Figure 9. Unclamped Inductive Switching Capability ID, DRAIN CURRENT (A) Coss 2 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) 0.01 0.01 0.1 100ms 1s SINGLE PULSE TJ = MAX RATED 10s DC TA = 25oC 1 10 100 300 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area FDS8949 Rev. B1 VGS = 10V SINGLE PULSE RθJA = 135°C/W TA = 25°C 10 SINGLE PULSE 1 0.7 -4 10 -3 10 -2 -1 0 1 10 10 10 10 t, PULSE WIDTH (s) 2 10 3 10 Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 P(PK) t1 t2 0.01 RθJA(t) = r(t)*RθJA RθJA = 135oC/W SINGLE PULSE 1E-3 -3 10 TJ-TA =P*RθJA DUTY FACTOR: D = t1/t2 -2 10 -1 0 10 10 1 10 2 10 3 10 t, RECTANGULAR PULSE DURATION (s) Figure 13. Transient Thermal Response Curve FDS8949 Rev. B1 5 www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I20 FDS8949 Rev. B1 6 www.fairchildsemi.com FDS8949 Dual N-Channel Logic Level PowerTrench® MOSFET TRADEMARKS