LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 LM6211 Low Noise, RRO Operational Amplifier with CMOS Input and 24V Operation Check for Samples: LM6211 FEATURES 1 (Typical 24V Supply Unless Otherwise Noted) 2 • • • • • • • Supply Voltage Range 5V to 24V Input Referred Voltage Noise 5.5 nV/√Hz Unity Gain Bandwidth 20 MHz 1/f Corner Frequency 400 Hz Slew Rate 5.6 V/μs Supply Current 1.05 mA Low Input Capacitance 5.5 pF • • • Temperature Range -40°C to 125°C Total Harmonic Distortion 0.01% @ 1 kHz, 600Ω Output Short Circuit Current 25 mA APPLICATIONS • • • • PLL Loop Filters Low Noise Active Filters Strain Gauge Amplifiers Low Noise Microphone Amplifiers DESCRIPTION The LM6211 is a wide bandwidth, low noise op amp with a wide supply voltage range and a low input bias current. The LM6211 operates with a single supply voltage of 5V to 24V, is unity gain stable, has a groundsensing CMOS input stage, and offers rail-to-rail output swing. The LM6211 is designed to provide optimal performance in high voltage, low noise systems. The LM6211 has a unity gain bandwidth of 20 MHz and an input referred voltage noise density of 5.5 nV/√Hz at 10 kHz. The LM6211 achieves these specifications with a low supply current of only 1 mA. The LM6211 has a low input bias current of 2.3 pA, an output short circuit current of 25 mA and a slew rate of 5.6 V/us. The LM6211 also features a low common-mode input capacitance of 5.5 pF which makes it ideal for use in wide bandwidth and high gain circuits. The LM6211 is well suited for low noise applications that require an op amp with very low input bias currents and a large output voltage swing, like active loop-filters for wide-band PLLs. A low total harmonic distortion, 0.01% at 1 kHz with loads as high as 600Ω, also makes the LM6211 ideal for high fidelity audio and microphone amplifiers. The LM6211 is available in the small SOT-23 package, allowing the user to implement ultra-small and cost effective board layouts. Typical Application 1000 CHARGE PUMP OUTPUT VCO + INPUT VS_PLL 2 VOLTAGE NOISE (nV/ Hz) VS = 5V, 24V 100 10 1 1 10 100 1k 10k 100k FREQUENCY (Hz) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2013, Texas Instruments Incorporated LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) ESD Tolerance (3) Human Body Model 2000V Machine Model 200V VIN Differential ±0.3V Supply Voltage (VS = V+ – V−) 25V + V +0.3V, V −0.3V Voltage at Input/Output pins −65°C to +150°C Storage Temperature Range Junction Temperature (4) +150°C Soldering Information (1) (2) (3) (4) − Infrared or Convection (20 sec) 235°C Wave Soldering Lead Temp. (10 sec) 260°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics Tables. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA . All numbers apply for packages soldered directly onto a PC board. Operating Ratings (1) −40°C to +125°C Temperature Range Supply Voltage (VS = V+ – V−) 5V to 24V Package Thermal Resistance (θJA (2)) (1) (2) 5-Pin SOT-23 178°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics Tables. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA . All numbers apply for packages soldered directly onto a PC board. 5V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units 0.1 ±2.5 ±2.8 mV VOS Input Offset Voltage VCM = 0.5V TC VOS Input Offset Average Drift VCM = 0.5V (4) IB Input Bias Current VCM = 0.5V (5) (6) IOS Input Offset Current VCM = 0.5V CMRR Common Mode Rejection Ratio 0 V ≤ VCM ≤ 3V 0.4 V ≤ VCM ≤ 2.3 V 83 70 98 PSRR Power Supply Rejection Ratio V+ = 5V to 24V, VCM = 0.5V 85 78 98 V = 4.5V to 25V, VCM = 0.5V 80 95 CMRR ≥ 65 dB CMRR ≥ 60 dB 0 0 + CMVR (1) (2) (3) (4) (5) (6) 2 Input Common-Mode Voltage Range μV/C 2 0.5 5 10 0.1 pA nA pA dB dB 3.3 2.4 V Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the Statistical Quality Control (SQC) method. Typical values represent the most likely parametric norm at the time of characterization. Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Input bias current is ensured by design. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 5V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol AVOL VO Large Signal Voltage Gain Output Swing High Output Swing Low IOUT Output Short Circuit Current IS Slew Rate GBW Gain Bandwidth Product en Input-Referred Voltage Noise in VO = 0.35V to 4.65, RL = 2 kΩ to V /2 82 80 110 VO = 0.25V to 4.75, RL = 10 kΩ to V+/2 85 82 110 + THD Total Harmonic Distortion Max (2) 50 150 165 RL = 10 kΩ to V+/2 20 85 90 RL = 2 kΩ to V+/2 39 150 170 RL = 10 kΩ to V+/2 13 85 90 Sourcing to V+/2 VID = 100 mV (7) 13 10 16 Sinking to V+/2 VID = −100 mV (7) 20 10 30 0.96 (8) 1.10 1.25 mA 17 MHz f = 1 kHz 6.0 AV = 2, RL = 600Ω to V /2 mA V/μs 5.5 + mV from rail 5.5 f = 10 kHz f = 1 kHz Units dB RL = 2 kΩ to V+/2 AV = +1, 10% to 90% Input-Referred Current Noise (8) Typ (3) Conditions Supply Current SR (7) Min (2) Parameter nV/√Hz 0.01 pA/√Hz 0.01 % The device is short circuit protected and can source or sink its limit currents continuously. However, care should be taken such that when the output is driving short circuit currents, the inputs do not see more than ±0.3V differential voltage. Slew rate is the average of the rising and falling slew rates. 24V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 24V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units 0.25 ±2.7 ±3.0 mV VOS Input Offset Voltage VCM = 0.5V TC VOS Input Offset Average Drift VCM = 0.5V (4) IB Input Bias Current VCM = 0.5V (5) IOS Input Offset Current VCM = 0.5V CMRR Common Mode Rejection Ratio 0 ≤ VCM ≤ 21V 0.4 ≤ VCM ≤ 20V 85 70 105 PSRR Power Supply Rejection Ratio V+ = 5V to 24V, VCM = 0.5V 85 78 98 V+ = 4.5V to 25V, VCM = 0.5V 80 98 CMRR ≥ 65 dB CMRR ≥ 60 dB 0 0 CMVR (1) (2) (3) (4) (5) (6) Input Common-Mode Voltage Range μV/C ±2 (6) 2 25 10 0.1 pA nA pA dB dB 21.5 20.5 V Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the Statistical Quality Control (SQC) method. Typical values represent the most likely parametric norm at the time of characterization. Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Input bias current is ensured by design. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 3 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com 24V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 24V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol AVOL VO Large Signal Voltage Gain Output Swing High Output Swing Low IOUT Min (2) Typ (3) VO = 1.5V to 22.5V, RL = 2 kΩ to V /2 82 77 120 VO = 1V to 23V, RL = 10 kΩ to V+/2 85 82 120 Parameter Output Short Circuit Current IS Supply Current SR Slew Rate GBW Gain Bandwidth Product en Input-Referred Voltage Noise Conditions + Max (2) dB RL = 2 kΩ to V+/2 212 400 520 RL = 10 kΩ to V+/2 48 150 165 RL = 2 kΩ to V+/2 150 350 420 RL = 10 kΩ to V+/2 38 150 170 Sourcing to V+/2 VID = 100 mV (7) 20 15 25 Sinking to V+/2 VID = −100 mV 30 20 38 (7) 1.05 Units mV from rail mA 1.25 1.40 mA AV = +1, VO = 18 VPP 10% to 90% (8) 5.6 V/μs 20 MHz f = 10 kHz 5.5 f = 1 kHz 6.0 nV/√Hz in Input-Referred Current Noise f = 1 kHz 0.01 pA/√Hz THD Total Harmonic Distortion AV = 2, RL = 2 kΩ to V+/2 0.01 % (7) (8) The device is short circuit protected and can source or sink its limit currents continuously. However, care should be taken such that when the output is driving short circuit currents, the inputs do not see more than ±0.3V differential voltage. Slew rate is the average of the rising and falling slew rates. Connection Diagram VOUT V - 5 1 2 + IN+ + V 3 4 IN- Figure 1. 5-Pin SOT-23 - Top View 4 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 Typical Performance Characteristics Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. Supply Current vs. Supply Voltage VOS vs. Supply Voltage 0.8 1.4 1.2 125°C 0.6 125°C 0.4 25°C 1.1 25°C 0.2 1 0.9 VOS (mV) SUPPLY CURRENT (mA) 1.3 -40°C 0.8 0 -40°C -0.2 0.7 -0.4 0.6 -0.6 0.5 5 7 11 13 15 17 19 21 23 25 9 5 7 11 13 15 17 19 21 23 25 9 VS (V) VS (V) Figure 2. Figure 3. VOS vs. VCM VOS vs. VCM 1 1 VS = 5V 0.8 125°C 0.8 0.6 125°C 0.6 0.2 25°C VOS (mV) VOS (mV) 0.4 0 -40°C -0.2 -0.4 25°C 0.4 0.2 -40°C 0 -0.2 -0.6 -0.4 -0.8 VS = 24V -0.6 -1 0 0.5 1 1.5 2 2.5 3 3.5 0 2 4 6 Figure 4. Figure 5. Input Bias Current vs. VCM Input Bias Current vs. VCM 1 2.5 VS = 5V VS = 5V 2 0.5 1.5 -40°C 1 IBIAS (nA) 0 IBIAS (pA) 8 10 12 14 16 18 20 22 VCM (V) VCM (V) -0.5 -1 0.5 0 -0.5 -1 25°C -1.5 -1.5 125°C -2 -2 0 0.5 1 1.5 2 2.5 3 3.5 4 VCM (V) -2.5 0 0.5 1 1.5 2 2.5 3 3.5 4 VCM (V) Figure 6. Figure 7. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 5 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. Input Bias Current vs. VCM Input Bias Current vs. VCM 4 2 VS = 24V VS = 24V 2 -40°C 0 IBIAS (nA) IBIAS (pA) 0 -2 25°C -4 125°C -2 -4 -6 -8 0 2 4 6 8 -6 10 12 14 16 18 20 22 0 4 6 8 10 12 14 16 18 20 22 VCM (V) Figure 8. Figure 9. Sourcing Current vs. Supply Voltage Sinking Current vs. Supply Voltage 30 50 25°C 45 25 -40°C 40 -40°C 35 20 ISINK (mA) ISOURCE (mA) 2 VCM (V) 125°C 15 10 30 25°C 25 125°C 20 15 10 5 5 0 0 4 6 8 10 12 14 16 18 20 22 24 4 10 12 14 16 18 20 22 24 VS (V) Figure 11. Positive Output Swing vs. Supply Voltage Negative Output Swing vs. Supply Voltage 60 RL = 10 k: RL = 10 k: 60 50 125°C 50 VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) 8 Figure 10. 70 25°C 40 30 -40°C 20 25°C 125°C 40 30 20 -40°C 10 10 0 0 4 6 8 10 12 14 16 18 20 22 24 VS (V) Figure 12. 6 6 VS (V) 4 6 8 10 12 14 16 18 20 22 24 VS (V) Figure 13. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. Positive Output Swing vs. Supply Voltage Negative Output Swing vs. Supply Voltage 350 250 RL = 2 k: RL = 2 k: VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) 300 250 125°C 25°C 200 150 100 125°C 25°C 150 100 -40°C 50 -40°C 50 200 0 0 4 6 8 4 10 12 14 16 18 20 22 24 6 8 10 12 14 16 18 20 22 24 VS (V) VS (V) Figure 14. Figure 15. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage 40 20 VS = 5V VS = 5V 18 35 -40°C 16 -40°C 30 25°C ISINK (mA) ISOURCE (mA) 14 12 125°C 10 8 25 25°C 20 125°C 15 6 10 4 5 2 0 0 0 1 2 3 4 5 0 2 3 4 VOUT (V) Figure 16. Figure 17. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage 30 5 50 VS = 24V VS = 24V 45 -40°C 25 25°C 40 -40°C 35 20 15 ISINK (mA) ISOURCE (mA) 1 VOUT (V) 125°C 10 30 25°C 25 125°C 20 15 10 5 5 0 0 0 4 8 12 16 20 24 0 4 8 12 VOUT (V) VOUT (V) Figure 18. Figure 19. 16 20 24 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 7 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. 180 160 160 160 140 140 120 120 100 100 PHASE 120 RL = 2k:, 10 k:, 10M: 100 80 80 60 60 40 GAIN 40 GAIN (dB) 180 160 PHASE (°) 180 140 GAIN (dB) Open Loop Gain and Phase with Capacitive Load 180 0 -40 100 1k 10k 100k 10M 1M GAIN 60 CL = 100 pF 40 40 20 20 0 -20 -20 -40 100M -40 100 80 CL = 50 pF 60 0 RL = 2k:, 10 k:, 10M: -20 120 CL = 20 pF 80 20 20 140 PHASE PHASE (°) Open Loop Gain and Phase with Resistive Load 0 CL = 20 pF, 50 pF, 100 pF 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Figure 21. Input Referred Voltage Noise vs. Frequency THD+N vs. Frequency -20 10M -40 100M 0.1 1000 0.01 100 RL = 600:, VS = 5V THD+N (%) VOLTAGE NOISE (nV/ Hz) VS = 5V, 24V RL = 600:, VS = 24V RL = 100 k:, VS = 5V 0.001 10 RL = 100 k:, VS = 24V 0.0001 10 1 1 1k 100 10 10k 100k 100 FREQUENCY (Hz) Figure 23. THD+N vs. Output Amplitude THD+N vs. Output Amplitude 100k 1 VS = 5V Vs = 24V 0.1 THD+N (%) 0.1 THD+N (%) 10k Figure 22. 1 0.01 RL = 600: 0.01 RL = 600: 0.001 0.001 RL = 100 k: RL = 100 k: 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 OUTPUT AMPLITUDE (V) OUTPUT AMPLITUDE (V) Figure 24. 8 1k FREQUENCY (Hz) Figure 25. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. Slew Rate vs. Supply Voltage Overshoot and Undershoot vs. Capacitive Load 6 OVERSHOOT AND UNDERSHOOT (%) 70 SLEW RATE (V/Ps) 5.8 5.6 FALLING EDGE 5.4 5.2 RISING EDGE 5 4.8 4.6 4.4 5 7 9 OVERSHOOT % 60 50 UNDERSHOOT % 40 30 11 13 15 17 19 21 23 25 15 25 35 45 55 VS (V) CAPACITIVE LOAD (pF) Figure 26. Figure 27. Small Signal Transient Response Large Signal Transient Response 6 0.015 VS = 24V CL = 10 pF 0.01 4 2 VOUT (V) VOUT (V) 0.005 0 0 -0.005 -2 -0.01 -4 -0.015 -6 0 1 2 3 4 5 6 7 8 9 10 VS = 24V CL = 10 pF 0 1 2 3 TIME (Ps) 4 5 6 7 Figure 29. Phase Margin vs. Capacitive Load (Stability) Phase Margin vs. Capacitive Load (Stability) VS = 24V 50 50 RL = 2 k: PHASE MARGIN (°) PHASE MARGIN (°) 10 60 VS = 5V 40 RL = 10 k: 30 RL = 10 M: 10 0 10 9 Figure 28. 60 20 8 TIME (Ps) RL = 2 k: 40 RL = 10 k: 30 RL = 10 M: 20 10 100 1000 0 10 100 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) Figure 30. Figure 31. 1000 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 9 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VS = 24V, V+ = VS, V− = 0 V, VCM = VS/2. Closed Loop Output Impedance vs. Frequency PSRR vs. Frequency 100 0 -20 10 VS = 5V, -PSRR PSRR (dB) ZOUT (:) -40 1 0.1 VS = 5V VS = 24V, -PSRR -60 -80 0.01 -100 VS = 24V 0.001 10 100 1k 10k 100k 1M -120 10 10M VS = 5V, +PSRR 100 1k 10k VS = 24V, +PSRR 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 32. Figure 33. CMRR vs. Frequency 0 -20 CMRR (dB) -40 -60 -80 VS = 5V -100 VS = 24V -120 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 34. 10 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 APPLICATION NOTES ADVANTAGES OF THE LM6211 High Supply Voltage, Low Power Operation The LM6211 has performance ensured at supply voltages of 5V and 24V. The LM6211 is ensured to be operational at all supply voltages between 5V and 24V. In this large range of operation, the LM6211 draws a fairly constant supply current of 1 mA, while providing a wide bandwidth of 20 MHz. The wide operating range makes the LM6211 a versatile choice for a variety of applications ranging from portable instrumentation to industrial control systems. Low Input Referred Noise The LM6211 has very low flatband input referred voltage noise, 5.5 nV/√Hz. The 1/f corner frequency, also very low, is about 400 Hz. The CMOS input stage allows for an extremely low input current (2 pA) and a very low input referred current noise (0.01 pA/√Hz). This allows the LM6211 to maintain signal fidelity and makes it ideal for audio, wireless or sensor based applications. Low Input Bias Current and High Input Impedance The LM6211 has a CMOS input stage, which allows it to have very high input impedance, very small input bias currents (2 pA) and extremely low input referred current noise (0.01 pA/√Hz). This level of performance is essential for op amps used in sensor applications, which deal with extremely low currents of the order of a few nanoamperes. In this case, the op amp is being driven by a sensor, which typically has a source impedance of tens of MΩ. This makes it essential for the op amp to have a much higher impedance. Low Input Capacitance The LM6211 has a comparatively small input capacitance for a high voltage CMOS design. Low input capacitance is very beneficial in terms of driving large feedback resistors, required for higher closed loop gain. Usually, high voltage CMOS input stages have a large input capacitance, which when used in a typical gain configuration, interacts with the feedback resistance to create an extra pole. The extra pole causes gain-peaking and can compromise the stability of the op amp. The LM6211 can, however, be used with larger resistors due to its smaller input capacitance, and hence provide more gain without compromising stability. This also makes the LM6211 ideal for wideband transimpedance amplifiers, which require a wide bandwidth, low input referred noise and low input capacitance. RRO, Ground Sensing and Current Limiting The LM6211 has a rail-to-rail output stage, which provides the maximum possible output dynamic range. This is especially important for applications requiring a large output swing, like wideband PLL synthesizers which need an active loop filter to drive a wide frequency range VCO. The input common mode range includes the negative supply rail which allows direct sensing at ground in a single supply operation. The LM6211 also has a short circuit protection circuit which limits the output current to about 25 mA sourcing and 38 mA sinking, and allows the LM6211 to drive short circuit loads indefinitely. However, while driving short circuit loads care should be taken to prevent the inputs from seeing more than ±0.3V differential voltage, which is the absolute maximum differential input voltage. Small Size The small footprint of the LM6211 package saves space on printed circuit boards, and enables the design of smaller and more compact electronic products. Long traces between the signal source and the op amp make the signal path susceptible to noise. By using a physically smaller package, the LM6211 can be placed closer to the signal source, reducing noise pickup and enhancing signal integrity Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 11 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com STABILITY OF OP AMP CIRCUITS Stability and Capacitive Loading GAIN The LM6211 is designed to be unity gain stable for moderate capacitive loads, around 100 pF. That is, if connected in a unity gain buffer configuration, the LM6211 will resist oscillation unless the capacitive load is higher than about 100 pF. For higher capacitive loads, the phase margin of the op amp reduces significantly and it tends to oscillate. This is because an op amp cannot be designed to be stable for high capacitive loads without either sacrificing bandwidth or supplying higher current. Hence, for driving higher capacitive loads, the LM6211 needs to be externally compensated. STABLE ROC ± 20 dB/decade UNSTABLE ROC = 40 dB/decade 0 FREQUENCY (Hz) Figure 35. Gain vs. Frequency for an Op Amp An op amp, ideally, has a dominant pole close to DC, which causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains at 20 dB/decade at the unity gain bandwidth of the op amp, the op amp is stable. If, however, a large capacitance is added to the output of the op amp, it combines with the output impedance of the op amp to create another pole in its frequency response before its unity gain frequency (Figure 35). This increases the ROC to 40 dB/decade and causes instability. In such a case a number of techniques can be used to restore stability to the circuit. The idea behind all these schemes is to modify the frequency response such that it can be restored to a ROC of 20 dB/decade, which ensures stability. In the Loop Compensation Figure 36 illustrates a compensation technique, known as ‘in the loop’ compensation, that employs an RC feedback circuit within the feedback loop to stabilize a non-inverting amplifier configuration. A small series resistance, RS, is used to isolate the amplifier output from the load capacitance, CL, and a small capacitance, CF, is inserted across the feedback resistor to bypass CL at higher frequencies. VIN + ROUT - RS CL RL CF RF RIN Figure 36. In the Loop Compensation 12 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 The values for RS and CF are decided by ensuring that the zero attributed to CF lies at the same frequency as the pole attributed to CL. This ensures that the effect of the second pole on the transfer function is compensated for by the presence of the zero, and that the ROC is maintained at 20 dB/decade. For the circuit shown in Figure 36 the values of RS and CF are given by Equation 1. Table 1 shows different values of RS and CF that need to be used for maintaining stability with different values of CL, as well as the phase margins to be expected. RF and RIN are assumed to be 10 kΩ, RL is taken as 2 kΩ, while ROUT is taken to be 60Ω. RS = ROUTRIN RF § RF + 2RIN © 2 RF § ¨ ¨ © CF = ¨¨ CLROUT (1) Table 1. CL (pF) RS (Ω) CF (pF) Phase Margin (°) 250 60 4.5 39.8 300 60 5.4 49.5 500 60 9 53.1 Although this methodology provides circuit stability for any load capacitance, it does so at the price of bandwidth. The closed loop bandwidth of the circuit is now limited by RS and CF. Compensation by External Resistor In some applications it is essential to drive a capacitive load without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation is shown in Figure 37. A resistor, RISO, is placed in series between the load capacitance and the output. T110his introduces a zero in the circuit transfer function, which counteracts the effect of the pole formed by the load capacitance, and ensures stability. Figure 37. Compensation By Isolation Resistor The value of RISO to be used should be decided depending on the size of CL and the level of performance desired. Values ranging from 5Ω to 50Ω are usually sufficient to ensure stability. A larger value of RISO will result in a system with lesser ringing and overshoot, but will also limit the output swing and the short circuit current of the circuit. Stability and Input Capacitance In certain applications, for example I-V conversion, transimpedance photodiode amplification and buffering the output of current-output DAC, capacitive loading at the input of the op amp can endanger stability. The capacitance of the source driving the op amp, the op amp input capacitance and the parasitic/wiring capacitance contribute to the loading of the input. This capacitance, CIN, interacts with the feedback network to introduce a peaking in the closed loop gain of the circuit, and hence causes instability. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 13 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com CF R2 R1 + VIN CIN + - + - VOUT Figure 38. Compensating for Input Capacitance This peaking can be eliminated by adding a feedback capacitance, CF, as shown in Figure 38. This introduces a zero in the feedback network, and hence a pole in the closed loop response, and thus maintains stability. An optimal value of CF is given by Equation 2. A simpler approach is to select CF = (R1/R2)CIN for a 90° phase margin. This approach, however, limits the bandwidth excessively. Typical Applications ACTIVE LOOP FILTER FOR PLLs A typical phase locked loop, or PLL, functions by creating a negative feedback loop in terms of the phase of a signal. A simple PLL consists of three main components: a phase detector, a loop filter and a voltage controlled oscillator (VCO). The phase detector compares the phase of the output of the PLL with that of a reference signal, and feeds the error signal into the loop filter, thus performing negative feedback. The loop filter performs the important function of averaging (or low-pass filtering) the error and providing the VCO with a DC voltage, which allows the VCO to modify its frequency such that the error is minimized. The performance of the loop filter affects a number of specifications of the PLL, like its frequency range, locking time and phase noise. Since a loop filter is a very noise sensitive application, it is usually suggested that only passive components be used in its design. Any active devices, like discrete transistors or op amps, would add significantly to the noise of the circuit and would hence worsen the in-band phase noise of the PLL. But newer and faster PLLs, like TI’s LMX2430, have a power supply voltage of less than 3V, which limits the phase-detector output of the PLL. If a passive loop filter is used with such circuits, then the DC voltage that can be provided to the VCO is limited to couple of volts. This limits the range of frequencies for which the VCO, and hence the PLL, is functional. In certain applications requiring a wider operating range of frequencies for the PLL, like set-top boxes or base stations, this level of performance is not adequate and requires active amplification, hence the need for active loop filters. An active loop filter typically consists of an op amp, which provides the gain, accompanied by a three or four pole RC filter. The non-inverting input of the op amp is biased to a fixed value, usually the mid-supply of the PLL, while a feedback network provides the gain as well as one, or two, poles for low pass filtering. Figure 39 illustrates a typical active loop filter. CHARGE PUMP OUTPUT VCO + INPUT VS_PLL 2 Figure 39. A Typical Active Loop Filter 14 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 Certain performance characteristics are essential for an op amp if it is to be used in a PLL loop filter. Low input referred voltage and current noise are essential, as they directly affect the noise of the filter and hence the phase noise of the PLL. Low input bias current is also important, as bias current affects the level of ‘reference spurs’, artifacts in the frequency spectrum of the PLL caused by mismatch or leakage at the output of the phase detector. A large input and output swing is beneficial in terms of increasing the flexibility in biasing the op amp. The op amp can then be biased such that the output range of the PLL is mapped efficiently onto the input range of the VCO. With a CMOS input, ultra low input bias currents (2 pA) and low input referred voltage noise (5.5 nV/√Hz), the LM6211 is an ideal op amp for using in a PLL active loop filter. The LM6211 has a ground sensing input stage, a rail-to-rail output stage, and an operating supply range of 5V - 24V, which makes it a versatile choice for the design of a wide variety of active loop filters. Figure 41 shows the LM6211 used with the LMX2430 to create an RF frequency synthesizer. The LMX2430 detects the PLL output, compares it with its internal reference clock and outputs the phase error in terms of current spikes. The LM6211 is used to create a loop filter which averages the error and provides a DC voltage to the VCO. The VCO generates a sine wave at a frequency determined by the DC voltage at its input. This circuit can provide output signal frequencies as high as 2 GHz, much higher than a comparative passive loop filter. Compared to a similar passive loop filter, the LM6211 doesn’t add significantly to the phase noise of the PLL, except at the edge of the loop bandwidth, as shown in Figure 40. A peaking of loop gain is expected, since the loop filter is deliberately designed to have a wide bandwidth and a low phase margin so as to minimize locking time. ADDED PHASE NOISE (dB) 4.0 ACTIVE LOOP FILTER WITH LM6211 3.0 2.0 1.0 0.0 PASSIVE LOOP FILTER -1.0 1k 10k 100k 1M OFFSET FREQUENCY (Hz) Figure 40. Effect of LM6211 on Phase Noise of PLL Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 15 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 C27 100 pF 18 GND OSC_EN D0_RF OSC_OUT/FL0_IF OSC_IN 8 IF_PLL I/O's GND 13 12 5 4 VCC 13 14 15 C6 100 pF C41 0.1 PF C1 C2 C4 R3 + R2 LM6211 VS_PLL R46 100 k: C14 100 pF C8 0.01 PF C9 100 pF 10 V586ME04 11 LMX2430 L2 12 V 6 R50 10: 9 8 C5 100 pF VS_OP AMP RFOUT 7 14 VS_PLL C13 0.01 PF C11 100 pF + 15 C10 0.01 PF 2 1 CLK FIN_RF D0_IF VS 7 FINB_RF CE 16 FL0_RF 6 VS 10 5 FIN_IF F0LD 4 LE 9 3 DATA VS 2 GND 17 VS_RF C38 3 19 20 C40 100 pF R47 RF_OUT R6 18: C39 VS_PLL 1 C7 100 pF R7 18: 11 C26 0.01 PF R5 18: RF_PLL PROGRAMMING INPUTS 16 VS_PLL www.ti.com R41 C3 C36 R45 100 k: C37 0.1 PF Figure 41. LM6211 in the Active Loop Filter for LMX2430 ADC INPUT DRIVER A typical application for a high performance op amp is as an ADC driver, which delivers the analog signal obtained from sensors and actuators to ADCs for conversion to the digital domain and further processing. Important requirements in this application are a slew rate high enough to drive the ADC input and low input referred voltage and current noise. If an op amp is used with an ADC, it is critical that the op amp noise does not affect the dynamic range of the ADC. The LM6211, with low input referred voltage and current noise, provides a great solution for this application. For example, the LM6211 can be used to drive an ADS121021, a 12-bit ADC from TI. If it provides a gain of 10 to a maximum input signal amplitude of 100 mV, for a bandwidth as wide as 100 kHz, the average noise seen at the input of the ADC is only 44.6 µVrms. Hence the dynamic range of the ADC, measured in Effective Number of Bits or ENOB, is only reduced by 0.3 bits, despite amplifying the input signal by a gain of 10. Low input bias currents and high input impedance also help as they prevent the loading of the sensor and allow the measurement system to function over a large range. Figure 42 shows a circuit for monitoring fluid pressure in a hydraulic system, in which the LM6211 is used to sense the error voltage from the pressure sensor. Two LM6211 amplifiers are used to make a difference amplifier which senses the error signal, amplifies it by a gain of 100, and delivers it to the ADC input. The ADC converts the error voltage into a pressure reading to be displayed and drives the DAC, which changes the voltage driving the resistance bridge sensor. This is used to control the gain of the pressure measurement circuit, such that the range of the sensor can be modified to obtain the best resolution possible. 16 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 4.096V 3 VOUT 1 C1 6 SYNC 5 SCLK 4 DOUT 120 pF 2 +5V 4 5 1,2 6 B1 0.1 PF 1 PF 7,8 +5V 3 5 + 4 - 180: 1 A2 2 100 k: 0.2 PF 2.048V VREF 1 470 pF 2 8 7 SCLK 6 DOUT +IN C2 2.02 k: AV = 100 +5V 3 5 CS -IN 4 +5V 3 1 A1 4 + 470 pF 0.2 PF 100 k: 5 - 180: 2 PRESSURE SENSOR 0.2 mV/Volt/PSI A1, A2 = LM6211 B1 = LM4140ACM-2.0 C1 = DAC081S101 C2 = ADC121S625 Figure 42. Hydraulic Pressure Monitoring System DAC OUTPUT AMPLIFIER Op amps are often used to improve a DAC's output driving capability. High performance op amps are required as I-V converters at the outputs of high resolution current output DACs. Since most DACs operate with a single supply of 5V, a rail-to-rail output swing is essential for this application. A low offset voltage is also necessary to prevent offset errors in the waveform generated. Also, the output impedance of DACs is quite high, more than a few kΩ in some cases, so it is also advisable for the op amp to have a low input bias current. An op amp with a high input impedance also prevents the loading of the DAC, and hence, avoids gain errors. The op amp should also have a slew rate which is fast enough to not affect the settling time of the DAC output. The LM6211, with a CMOS input stage, ultra low input bias current, a wide bandwidth (20 MHz) and a rail-to-rail output swing for a supply voltage of 24V is an ideal op amp for such an application. Figure 43 shows a typical circuit for this application. The op amp is usually expected to add another time constant to the system, which worsens the settling time, but the wide bandwidth of the LM6211 (20 MHz) allows the system performance to improve without any significant degradation of the settling time. VS 10 PF VS 3 SYNC 6 SCLK 5 - 0.1 PF LM6211 DAC081S101 DOUT 4 1 + 2 Figure 43. DAC Driver Circuit Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 17 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com AUDIO PREAMPLIFIER With low input referred voltage noise, low supply voltage and low supply current, and low harmonic distortion, the LM6211 is ideal for audio applications. Its wide unity gain bandwidth allows it to provide large gain over a wide frequency range and it can be used to design a preamplifier to drive a load of as low as 600Ω with less than 0.001% distortion. Two amplifier circuits are shown in Figure 44 and Figure 45. Figure 44 is an inverting amplifier, with a 10 kΩ feedback resistor, R2, and a 1 kΩ input resistor, R1, and hence provides a gain of −10. Figure 45 is a non-inverting amplifier, using the same values for R1 and R2, and provides a gain of 11. In either of these circuits, the coupling capacitor CC1 decides the lower frequency at which the circuit starts providing gain, while the feedback capacitor CF decides the frequency at which the gain starts dropping off. Figure 46 shows the frequency response of the circuit in Figure 44 with different values of CF. CF CC1 R1 1 k: R2 10 k: + VIN CC2 - - + RB1 V + + - VOUT RB2 R2 = -10 R1 AV = - Figure 44. Inverting Audio Amplifier + V CC2 RB1 + VIN - RB2 R1 1 k: CC1 + - + R2 10 k: - VOUT CF AV = 1 + R2 R1 = 11 Figure 45. Non-Inverting Audio Preamplifier 18 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 25 CF = 10 pF 20 15 CF = 1 nF GAIN (dB) 10 CF = 100 pF 5 0 -5 -10 -15 -20 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 46. Frequency Response of the Non-Inverting Preamplifier TRANSIMPEDANCE AMPLIFIER A transimpedance amplifier converts a small input current into a voltage. This current is usually generated by a photodiode. The transimpedance gain, measured as the ratio of the output voltage to the input current, is expected to be large and wide-band. Since the circuit deals with currents in the range of a few nA, low noise performance is essential. The LM6211, being a CMOS input op amp, provides a wide bandwidth and low noise performance while drawing very low input bias current, and is hence ideal for transimpedance applications. A transimpedance amplifier is designed on the basis of the current source driving the input. A photodiode is a very common capacitive current source, which requires transimpedance gain for transforming its miniscule current into easily detectable voltages. The photodiode and amplifier’s gain are selected with respect to the speed and accuracy required of the circuit. A faster circuit would require a photodiode with lesser capacitance and a faster amplifier. A more sensitive circuit would require a sensitive photodiode and a high gain. A typical transimpedance amplifier is shown in Figure 47. The output voltage of the amplifier is given by the equation VOUT = −IINRF. Since the output swing of the amplifier is limited, RF should be selected such that all possible values of IIN can be detected. The LM6211 has a large gain-bandwidth product (20 MHz), which enables high gains at wide bandwidths. A railto-rail output swing at 24V supply allows detection and amplification of a wide range of input currents. A CMOS input stage with negligible input current noise and low input voltage noise allows the LM6211 to provide high fidelity amplification for wide bandwidths. These properties make the LM6211 ideal for systems requiring wideband transimpedance amplification. CF RF IIN CCM CD VB + + VOUT CIN = CD + CCM VOUT = - RF IIN Figure 47. Photodiode Transimpedance Amplifier The following parameters are used to design a transimpedance amplifier: the amplifier gain-bandwidth product, A0; the amplifier input capacitance, CCM; the photodiode capacitance, CD; the transimpedance gain required, RF; and the amplifier output swing. Once a feasible RF is selected using the amplifier output swing, these numbers can be used to design an amplifier with the desired transimpedance gain and a maximally flat frequency response. The input common-mode capacitance with respect to VCM for the LM6211 is give in Figure 48. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 19 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com 20 VS = 5V CIN (pF) 15 10 VS = 24V 5 0 0 2 4 6 8 10 12 14 16 18 20 22 24 VCM (V) Figure 48. Input Common-Mode Capacitance vs. VCM An essential component for obtaining a maximally flat response is the feedback capacitor, CF. The capacitance seen at the input of the amplifier, CIN, combined with the feedback resistor, RF, generates a phase lag which causes gain-peaking and can destabilize the circuit. CIN is usually just the sum of CD and CCM. The feedback capacitor CF creates a pole, fP in the noise gain of the circuit, which neutralizes the zero in the noise gain, fZ, created by the combination of RF and CIN. If properly positioned, the noise gain pole created by CF can ensure that the slope of the gain remains at 20 dB/decade till the unity gain frequency of the amplifier is reached, thus ensuring stability. As shown in Figure 50, fP is positioned such that it coincides with the point where the noise gain intersects the op amp’s open loop gain. In this case, fP is also the overall 3 dB frequency of the transimpedance amplifier. The value of CF needed to make it so is given by Equation 2. A larger value of CF causes excessive reduction of bandwidth, while a smaller value fails to prevent gain peaking and maintain stability. CF = 1 + 1 + 4SRFCINA0 2SRFA0 (2) Calculating CF from Equation 2 can sometimes return unreasonably small values (<1 pF), especially for high speed applications. In these cases, it is often more practical to use the circuit shown in Figure 49 in order to allow more reasonable values. In this circuit, the capacitance CF' is (1+ RB/RA) times the effective feedback capacitance, CF. A larger capacitor can now be used in this circuit to obtain a smaller effective capacitance. RB RA CFc RF + IF RA < < RF RB § CF CFc = ¨1 + RA © § ¨ © Figure 49. Modifying CF For example, if a CF of 0.5 pF is needed, while only a 5 pF capacitor is available, RB and RA can be selected such that RB/RA = 9. This would convert a CF' of 5 pF into a CF of 0.5 pF. This relationship holds as long as RA << RF 20 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 LM6211 www.ti.com SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 GAIN OP AMP OPEN LOOP GAIN fZ = NOISE GAIN WITH NO CF 1 2S RFCIN NOISE GAIN WITH CF A0 fP = 2S RF(CIN+CF) fP fZ A0 FREQUENCY Figure 50. Method for CF selection SENSOR INTERFACES The low input bias current and low input referred noise of the LM6211 make it ideal for sensor interfaces. These circuits are required to sense voltages of the order of a few μV, and currents amounting to less than a nA, and hence the op amp needs to have low voltage noise and low input bias current. Typical applications include infrared (IR) thermometry, thermocouple amplifiers and pH electrode buffers. Figure 51 is an example of a typical circuit used for measuring IR radiation intensity, often used for estimating the temperature of an object from a distance. The IR sensor generates a voltage proportional to I, which is the intensity of the IR radiation falling on it. As shown in Figure 51, K is the constant of proportionality relating the voltage across the IR sensor (VIN) to the radiation intensity, I. The resistances RA and RB are selected to provide a high gain to amplify this voltage, while CF is added to filter out the high frequency noise. + IR SENSOR + VIN = KI - IR RADIATION INTENSITY, I - + RB VOUT RA CF VOUT RA I= K(RA + RB) Figure 51. IR Radiation Sensor Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 21 LM6211 SNOSAH2C – FEBRUARY 2006 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C • 22 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 21 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM6211 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) LM6211 MDC Package Type Package Pins Package Drawing Qty ACTIVE DIESALE Y 0 400 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 Device Marking (4/5) LM6211MF NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 AT1A LM6211MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AT1A LM6211MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AT1A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM6211MF SOT-23 DBV 5 1000 178.0 8.4 LM6211MF/NOPB SOT-23 DBV 5 1000 178.0 LM6211MFX/NOPB SOT-23 DBV 5 3000 178.0 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM6211MF SOT-23 DBV 5 1000 210.0 185.0 35.0 LM6211MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM6211MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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