Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 LM2936 Ultra-Low Quiescent Current LDO Voltage Regulator 1 Features 3 Description • • • The LM2936 ultra-low quiescent current regulator features low dropout voltage and low current in the standby mode. With less than 15-μA quiescent current at a 100-μA load, the LM2936 is ideally suited for automotive and other battery operated systems. The LM2936 retains all of the features that are common to low dropout regulators including a low dropout PNP pass device, short circuit protection, reverse battery protection, and thermal shutdown. The LM2936 has a 40-V maximum operating voltage limit, a −40°C to 125°C operating temperature range, and ±3% output voltage tolerance over the entire output current, input voltage, and temperature range. The LM2936 is available in a TO-92 through-hole package, as well as SOIC-8, VSSOP, SOT–223, and TO-252 surface mount packages. 1 • • • • • • • • • LM2936 Operating VIN range of 5.5 V to 40 V LM2936HV Operating VIN range of 5.5 V to 60 V Ultra Low Quiescent Current (IQ ≤ 15 μA for IOUT = 100 μA) Fixed 3-V, 3.3-V or 5-V with 50-mA Output ±2% Initial Output Tolerance ±3% Output Tolerance Over Line, Load, and Temperature Dropout Voltage Typically 200 mV at IOUT = 50 mA –24-V Input Voltage Protection –50-V Input Transient Protection Internal Short Circuit Current Limit Internal Thermal Shutdown Protection Shutdown Pin Available with LM2936BM Package Device Information(1) PART NUMBER 2 Applications • • • Automotive Industrial Controls Point of Load LM2936 PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm x 3.91 mm TO-252 (3) 6.10 mm x 6.58 mm VSSOP (8) 3.00 mm x 3.00 mm SOT-223 (4) 6.50 mm x 3.50 mm TO-92 (3) 4.30 mm x 4.30 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic IN VIN OUT VOUT GND CIN 100 nF * COUT 10 µF ** * Required if regulator is located more than 2″ from power supply filter capacitor. ** Required for stability. See Electrical Characteristics for 3-V LM2936 for required values. Must be rated over intended operating temperature range. Effective series resistance (ESR) is critical, see Typical Characteristics. Locate capacitor as close as possible to the regulator output and ground pins. Capacitance may be increased without bound. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 4 4 4 4 5 6 7 8 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics for 3-V LM2936................. Electrical Characteristics for 3.3-V LM2936.............. Electrical Characteristics for 5-V LM2936................. Typical Characteristics .............................................. Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 Functional Block Diagram ....................................... 12 7.3 Feature Description................................................. 12 7.4 Device Functional Modes........................................ 13 8 Application and Implementation ........................ 14 8.1 Application Information............................................ 14 8.2 Typical Application ................................................. 14 9 Power Supply Recommendations...................... 15 10 Layout................................................................... 16 10.1 Layout Guidelines ................................................. 16 10.2 Layout Examples................................................... 16 10.3 Thermal Considerations ........................................ 16 11 Device and Documentation Support ................. 18 11.1 11.2 11.3 11.4 Documentation Support ........................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 18 18 18 18 12 Mechanical, Packaging, and Orderable Information ........................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision N (March 2013) to Revision O • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Changes from Revision M (March 2013) to Revision N • 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 13 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 5 Pin Configuration and Functions LM2936DT TO-252 (NDP) Package 3-Pins Top View OUT 3 4 GND (TAB) GND 2 OUT 3 LM2936BM SOIC (D) Package 8-Pins Top View GND 2 GND 3 NC 4 8 IN OUT 1 7 GND GND 2 6 GND GND 3 IN 3 6 GND 5 NC OUT 1 NC 2 NC 3 NC 4 LM2936MM 2 7 GND LM2936MM VSSOP (DGK) Package 8-Pins Top View 1 GND 8 IN NC 4 5 SD LM2936Z TO-92 (LP) Package 3-Pins Bottom View OUT 4 GND (TAB) LM2936M SOIC (D) Package 8-Pins Top View LM2936M LM2936BM OUT 1 LM2936MP IN 1 LM2936DT IN 1 LM2936MP SOT-223 (DCY) Package 4-Pins Top View 8 IN 7 GND 6 NC 5 NC Pin Functions PIN NAME IN D (LM2936BM) D (LM2936M) NDP DGK DCY LP I/O DESCRIPTION 8 8 1 8 1 3 I GND 2, 3, 6, 7 2, 3, 6, 7 4 7 2, 4 2 — Ground. OUT 1 1 3 1 3 1 O Regulated output voltage. Requires a minimum output capacitance, with specific ESR, on this pin to maintain stability. Shutdown. LM2936BM only. Pull this pin HIGH (> 2 V) to turn the output OFF. If this pin is left open, pull ed low (< 0.6 V), or connected to GND, the output will be ON by default. Avoid having any voltage between 0.6 V and 2 V on this pin as the output status may not be predicable across the operating range. SD 5 — — — — — I NC 4 4, 5 — 2, 3, 4, 5, 6 — — — Unregulated input voltage. No internal connection, Connect to GND, or leave open. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 3 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) Input voltage (survival) Power dissipation (3) MIN MAX UNIT −50 60 V Internally limited Junction temperature (TJMAX) 150 −65 Storage temperature, Tstg (1) (2) (3) °C 150 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating ratings. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) − TA) / RθJA. If this dissipation is exceeded, the die temperature can rise above the TJ(MAX) of 150°C, and the LM2936 may go into thermal shutdown. 6.2 ESD Ratings V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) VALUE UNIT ±2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. . 6.3 Recommended Operating Conditions MIN MAX UNIT −40 125 °C Input voltage, VIN , LM2936 5.5 40 V Input voltage, VIN , LM2936HV only 5.5 60 V 0 40 V Temperature, TJ Shutdown pin voltage, VSD, LM2936BM only 6.4 Thermal Information LM2936 THERMAL METRIC (1) SOIC (D) TO-252 (NDP) VSSOP (DGK) SOT-223 (DCY) TO-92 (LP) 8 PINS 3 PINS 8 PINS 4 PINS 3 PINS RθJA Junction-to-ambient thermal resistance 111.4 50.5 173.4 62.8 156.8 RθJC(top) Junction-to-case (top) thermal resistance 56.3 52.6 65.9 44.2 80.4 RθJB Junction-to-board thermal resistance 51.9 29.7 94.9 11.7 n/a ψJT Junction-to-top characterization parameter 10.9 4.8 9.6 3.6 24.5 ψJB Junction-to-board characterization parameter 51.4 29.3 93.3 11.6 136.0 RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 1.6 n/a n/a n/a (1) 4 UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 6.5 Electrical Characteristics for 3-V LM2936 VIN = 14 V, IOUT = 10 mA, TJ = 25°C, unless otherwise specified. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) 2.91 3 3.09 10 30 2.94 3 3.06 2.91 3.000 3.09 UNIT 3-V LM2936HV ONLY Output voltage 5.5 V ≤ VIN ≤ 48 V, 100 µA ≤ IOUT ≤ 50 mA, (2) –40°C ≤ TJ ≤ 125°C Line regulation 6 V ≤ VIN ≤ 60 V, IOUT = 1 mA V mV ALL 3-V LM2936 Output voltage 4 V ≤ VIN ≤ 26 V, 100 µA ≤ IOUT ≤ 50 mA, (2) –40°C ≤ TJ ≤ 125°C Quiescent current IOUT = 100 μA, 8 V ≤ VIN ≤ 24 V 15 20 μA IOUT = 10 mA, 8 V ≤ VIN ≤ 24 V 0.2 0.5 mA IOUT = 50 mA, 8 V ≤ VIN ≤ 24 V 1.5 2.5 mA Line regulation Load regulation Dropout voltage 9 V ≤ VIN ≤ 16 V 5 10 6 V ≤ VIN ≤ 40 V, IOUT = 1 mA 10 30 100 μA ≤ IOUT ≤ 5 mA 10 30 5 mA ≤ IOUT ≤ 50 mA 10 30 V mV mV IOUT = 100 μA 0.05 0.1 V IOUT = 50 mA 0.20 0.40 V 120 250 Short-circuit current VOUT = 0 V Output impedance IOUT = 30 mAdc and 10 mArms, ƒ = 1000 Hz 65 450 Output noise voltage 10 Hz–100 kHz 500 μV 20 mV/1000 Hr −60 dB −80 V Long-term stability Ripple rejection Vripple = 1 Vrms, ƒripple = 120 Hz −40 Reverse polarity transient input voltage RL = 500 Ω, t = 1 ms −50 Output voltage with reverse polarity input VIN = −15 V, RL = 500 Ω Maximum Line Transient RL = 500 Ω, VOUT ≤ 3.3 V, T = 40 ms 60 Output bypass capacitance (COUT) ESR COUT = 22 µF, 0.1 mA ≤ IOUT ≤ 50 mA 0.3 0 mA mΩ −0.3 V V 8 Ω 0.01 V SHUTDOWN INPUT − 3-V LM2936BM ONLY Output voltage, VOUT Output off, VSD = 2.4 V, RLOAD = 500 Ω Shutdown high threshold voltage, VIH Output off, RLOAD = 500 Ω Shutdown low threshold voltage, VIL Output on, RLOAD = 500 Ω 1.1 Shutdown high current, IIH Output off, VSD = 2.4 V, RLOAD = 500Ω 12 μA Quiescent current Output off, VSD = 2.4 V, RLOAD = 500 Ω, includes IIH current 30 μA (1) (2) 0 2 1.1 V 0.6 V Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 5 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 6.6 Electrical Characteristics for 3.3-V LM2936 VIN = 14 V, IOUT = 10 mA, TJ = 25°C, unless otherwise specified. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) 3.201 3.300 3.399 10 30 3.234 3.300 3.366 3.201 3.300 3.399 UNIT 3.3-V LM2936HV ONLY Output voltage 5.5 V ≤ VIN ≤ 48 V, 100 µA ≤ IOUT ≤ 50 mA, (3) –40°C ≤ TJ ≤ 125°C Line regulation 6 V ≤ VIN ≤ 60 V, IOUT = 1 mA V mV ALL 3.3-V LM2936 Output voltage 4 V ≤ VIN ≤ 26 V, 100 µA ≤ IOUT ≤ 50 mA, (3) –40°C ≤ TJ ≤ 125°C Quiescent current IOUT = 100 μA, 8 V ≤ VIN ≤ 24 V 15 20 μA IOUT = 10 mA, 8 V ≤ VIN ≤ 24 V 0.2 0.5 mA IOUT = 50 mA, 8 V ≤ VIN ≤ 24 V 1.5 2.5 mA Line regulation Load regulation Dropout voltage 9 V ≤ VIN ≤ 16 V V 5 10 6 V ≤ VIN ≤ 40 V, IOUT = 1 mA 10 30 100 μA ≤ IOUT ≤ 5 mA 10 30 5 mA ≤ IOUT ≤ 50 mA 10 30 IOUT = 100 μA 0.05 0.10 V IOUT = 50 mA 0.2 0.4 V 120 250 65 mV mV Short-circuit current VOUT = 0 V Output impedance IOUT = 30 mAdc and 10 mArms, ƒ = 1000 Hz 450 Output noise voltage 10 Hz–100 kHz 500 μV 20 mV/1000 Hr −60 dB −80 V Long-term stability Ripple rejection Vripple = 1 Vrms, ƒripple = 120 Hz −40 Reverse polarity transient input voltage RL = 500 Ω, T = 1 ms −50 Output voltage with reverse polarity input VIN = −15 V, RL = 500 Ω maximum line transient RL = 500 Ω, VOUT ≤ 3.63 V, T = 40 ms 60 Output bypass capacitance (COUT) ESR COUT = 22 µF, 0.1 mA ≤ IOUT ≤ 50 mA 0.3 0 mA mΩ −0.3 V V 8 Ω 0.01 V SHUTDOWN INPUT − 3.3-V LM2936BM ONLY Output voltage, VOUT Output off, VSD = 2.4 V, RLOAD = 500 Ω Shutdown high threshold voltage, VIH Output off, RLOAD = 500 Ω Shutdown low threshold voltage, VIL Output on, RLOAD = 500 Ω 1.1 Shutdown high current, IIH Output off, VSD = 2.4V, RLOAD = 500 Ω 12 μA Quiescent current Output off, VSD = 2.4V, RLOAD = 500 Ω, includes IIH current 30 μA (1) (2) (3) 6 0 2 1.1 V 0.6 V Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm. To ensure constant junction temperature, pulse testing is used. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 6.7 Electrical Characteristics for 5-V LM2936 VIN = 14 V, IOUT = 10 mA, TJ = 25°C, unless otherwise specified. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) 4.85 5 5.15 15 35 UNIT 5-V LM2936HV ONLY Output voltage 5.5 V ≤ VIN ≤ 48 V, 100 µA ≤ IOUT ≤ 50 mA, (3) –40°C ≤ TJ ≤ 125°C Line regulation 6 V ≤ VIN ≤ 60 V, IOUT = 1 mA V mV ALL 5-V LM2936 4.9 5 5.1 4.85 5 5.15 Output voltage 5.5 V ≤ VIN ≤ 26 V, 100 µA ≤ IOUT ≤ 50 mA, (3) –40°C ≤ TJ ≤ 125°C Quiescent current IOUT = 100 μA, 8 V ≤ VIN ≤ 24 V 9 15 μA IOUT = 10 mA, 8 V ≤ VIN ≤ 24 V 0.2 0.5 mA IOUT = 50 mA, 8 V ≤ VIN ≤ 24 V 1.5 2.5 mA Line regulation Load regulation Dropout voltage 9 V ≤ VIN ≤ 16 V V 5 10 6 V ≤ VIN ≤ 40 V, IOUT = 1 mA 10 30 100 μA ≤ IOUT ≤ 5 mA 10 30 5 mA ≤ IOUT ≤ 50 mA 10 30 IOUT = 100 μA 0.05 0.1 V IOUT = 50 mA 0.2 0.4 V 120 250 65 mV mV Short-circuit current VOUT = 0 V Output impedance IOUT = 30 mAdc and 10 mArms, ƒ = 1000 Hz 450 Output noise voltage 10 Hz–100 kHz 500 μV 20 mV/1000 Hr −60 dB −80 V Long-term stability Ripple rejection Vripple = 1 Vrms, ƒripple = 120 Hz −40 Reverse polarity transient input voltage RL = 500 Ω, T = 1 ms −50 Output voltage with reverse polarity input VIN = −15 V, RL = 500 Ω Maximum line transient RL = 500 Ω, VOUT ≤ 5.5 V, T = 40 ms 60 Output bypass capacitance (COUT) ESR COUT = 10 µF, 0.1 mA ≤ IOUT ≤ 50 mA 0.3 0 mA mΩ −0.3 V V 8 Ω 0.01 V SHUTDOWN INPUT − 5-V LM2936BM ONLY Output voltage, VOUT Output off, VSD = 2.4 V, RLOAD = 500 Ω Shutdown high threshold voltage, VIH Output off, RLOAD = 500 Ω Shutdown low threshold voltage, VIL Output on, RLOAD = 500 Ω 1.1 Shutdown high current, IIH Output off, VSD = 2.4 V, RLOAD = 500 Ω 12 μA Quiescent current Output off, VSD = 2.4 V, RLOAD = 500Ω, includes IIH current 30 μA (1) (2) (3) 0 2 1.1 V 0.6 V Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm. To ensure constant junction temperature, pulse testing is used. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 7 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 6.8 Typical Characteristics 8 Figure 1. Maximum Power Dissipation (TO-92) Figure 2. Dropout Voltage Figure 3. Dropout Voltage Figure 4. Quiescent Current Figure 5. Quiescent Current Figure 6. Quiescent Current Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 Typical Characteristics (continued) Figure 8. Quiescent Current Figure 7. Quiescent Current 50 Figure 9. 5-V LM2936 COUT ESR Figure 10. 3-V LM2936 COUT ESR Figure 11. 3.3-V LM2936 COUT ESR Figure 12. Peak Output Current Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 9 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com Typical Characteristics (continued) 10 Figure 13. Peak Output Current Figure 14. 5-V LM2936 Current Limit Figure 15. 5-V LM2936 Line Transient Response Figure 16. 5-V LM2936 Output at Voltage Extremes Figure 17. 5-V LM2936 Ripple Rejection Figure 18. 5-V LM2936 Load Transient Response Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 Typical Characteristics (continued) Figure 19. 5-V LM2936 Low Voltage Behavior Figure 20. 5-V LM2936 Output Impedance Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 11 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 7 Detailed Description 7.1 Overview The LM2936 ultra-low quiescent current regulator features low dropout voltage and low current in the standby mode. With less than 15 μA quiescent current at a 100-μA load, the LM2936 is ideally suited for automotive and other battery operated systems. The LM2936 retains all of the features that are common to low dropout regulators including a low dropout PNP pass device, short circuit protection, reverse battery input protection, and thermal shutdown. The LM2936 has a 40-V maximum operating voltage limit, a −40°C to 125°C operating temperature range, and ±3% output voltage tolerance over the entire output current, input voltage, and temperature range. 7.2 Functional Block Diagram IN OUT Current Limit Thermal Shutdown PNP + Bandgap Reference LM2936 GND 7.3 Feature Description 7.3.1 High Input Operating Voltage Unlike namy other PNP low dropout regulators, the LM2936 remains fully operational with VIN = 40 V, and the LM2936HV remains fully operational with VIN = 60 V . Owing to power dissipation characteristics of the available packages, full output current cannot be ensured for all combinations of ambient temperature and input voltage. While the LM2936HV maintains regulation to 60 V, it will not withstand a short circuit to ground on the output when VIN is above 40 V because of safe operating area limitations in the internal PNP pass device. Above 60V the LM2936 will break down with catastrophic effects on the regulator and possibly the load as well. Do not use this device in a design where the input operating voltage may exceed 40 V, or where transients are likely to exceed 60 V. 7.3.2 Thermal Shutdown (TSD) The TSD circuitry of the LM2936 has been designed to protect the device against temporary thermal overload conditions. The TSD circuitry is not intended to replace proper heat-sinking. Continuously running the LM2936 device at TSD may degrade device reliability as the junction temperature will be exceeding the absolute maximum junction temperature rating. If the LM2936 goes into TSD mode, the output current will be shut off until the junction temperature falls approximately 10°C, then the output current will automatically be restored. The LM2936 will continuously cycle in and out of TSD until the condition is corrected. The LM2936 TSD junction temperature is typically 160°C. 12 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 Feature Description (continued) 7.3.3 Short-Circuit Current Limit The output current limiting circuitry of the LM2936 has been designed to limit the output current in cases where the load impedance is unusually low. This includes situations where the output may be shorted directly to ground. Continuous operation of the LM2936 at the current limit will typically result in the LM2936 transitioning into TSD mode. 7.3.4 Shutdown (SD) Pin The LM2936BM has a pin for shutting down the regulator output. Applying a Logic Level High (> 2 V) to the SD pin will cause the output to turn off. Leaving the SD pin open, connecting it to Ground, or applying a Logic Level Low (< 0.6 V) will allow the regulator output to turn on. 7.4 Device Functional Modes The LM2936 design does not include any undervoltage lockout (UVLO), or overvoltage shutdown (OVSD) functions. Generally, the output voltage will track the input voltage until the input voltage is greater than VOUT + 1 V. When the input voltage is greater than VOUT + 1 V the LM2936 will be in linear operation, and the output voltage will be regulated; however, the device will be sensitive to any small perturbation of the input voltage. Device dynamic performance is improved when the input voltage is at least 2 V greater than the output voltage. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 13 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM2936 ultra-low quiescent current regulator features low dropout voltage and low current in the standby mode. The LM2936 has a 40-V maximum operating voltage limit, a −40°C to 125°C operating temperature range, –24-V input voltage protection and ±3% output voltage tolerance over the entire output current, input voltage, and temperature range This following section presents a simplified discussion of the design process. Also the WEBENCH® software may be used to generate complete designs. When generating a design, WEBENCH utilizes iterative design procedure and accesses comprehensive databases of components. Please go to www.ti.com for more details. 8.2 Typical Application Figure 21 shows the typical application circuit for the LM2936. For the LM2936 5-V option, the output capacitor, COUT, must have a capacitance value of at least 10 µF with an equivalent series resistance (ESR) of at least 300 mΩ, but no more than 8 Ω. For the LM2936 3.3-V and 3-V options, the output capacitor, COUT, must have a capacitance value of at least 22 µF with an ESR of at least 300 mΩ, but no more than 8 Ω. The minimum capacitance value and the ESR requirements apply across the entire expected operating ambient temperature range. IN VIN OUT VOUT GND CIN 100 nF * COUT 10 µF ** * CIN is required only if the regulator is located more than 3 inches from the power-supply-filter capacitors. ** Required for stability. COUT must be at least 10 µF for the LM2936 5-V option, and at least 22 µF for the 3.3-V and 3-V options. Capacitance must be maintained over entire expected operating temperature range, and located as close as possible to the regulator. The ESR, of the COUT capacitor must at least 300 mΩ, but no more than 8 Ω. Figure 21. LM2936 Typical Application 8.2.1 Design Requirements Table 1. Design Parameters DESIGN PARAMETER 14 EXAMPLE VALUE Output voltage 5V Input voltage 10 V to 26 V Output current requirement 1 mA to 50 mA Input capacitor 0.1 µF Output capacitance 10 µF minimum Output capacitor ESR value 300 mΩ to 8 Ω Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 8.2.2 Detailed Design Procedure 8.2.2.1 External Capacitors The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both ESR and minimum amount of capacitance. 8.2.2.1.1 Minimum Capacitance The minimum output capacitance required to maintain stability is at least 10 µF for the LM2936 5-V option, and at least 22 µF for the 3.3-V and 3-V options. This value may be increased without limit. Larger values of output capacitance will give improved transient response. 8.2.2.1.2 ESR Limits The ESR of the output capacitor will cause loop instability if it is too high, or too low. ESR, of the COUT capacitor must at least 300 mΩ, but no more than 8 Ω. 8.2.2.2 Output Capacitor ESR It is essential that the output capacitor meet the capacitance and ESR requirements, or oscillations can result. The ESR is used with the output capacitance in Ceramic capacitors (MLCC) can be used for COUT only if a series resistor is added to simulate the ESR requirement. The ESR is not optional, it is mandatory. Typically, a 500-mΩ to 1-Ω series resistor is used for this purpose. When using ceramic capacitors, due diligence must be given to initial tolerances, capacitance derating due to applied DC voltage, and capacitance variations due to temperature. Dielectric types X5R and X7R are preferred. 8.2.3 Application Curve Figure 22. LM2936 VOUT vs. VIN 9 Power Supply Recommendations This device is designed to operate from an input supply voltage from at least VOUT + 1 V up to a maximum of 40 V. The input supply should be well regulated and free of spurious noise. To ensure that the LM2936 output voltage is well regulated the input supply should be at least VOUT + 2 V. A capacitor at the IN pin may not be specifically required if the bulk input supply filter capacitors are within three inches of the IN pin, but adding one will not be detrimental to operation. While the LM2936 maintains regulation to VIN = 60 V, it will not withstand a short circuit on the output with VIN above 40 V because of safe operating area limitations in the internal PNP pass device. With VIN above 60 V the LM2936 will break down with catastrophic effects on the regulator and possibly the load as well. Do not use this device in a design where the input operating voltage, including transients, is likely to exceed 60 V. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 15 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 10 Layout 10.1 Layout Guidelines The dynamic performance of the LM2936 is dependent on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the LM2936. Best performance is achieved by placing CIN and COUT on the same side of the PCB as the LM2936, and as close as is practical to the package. The ground connections for CIN and COUT should be back to the LM2936 ground pin using as wide, and as short, of a copper trace as is practical. Connections using long trace lengths, narrow trace widths, and/or connections through vias should be avoided as these will add parasitic inductances and resistances that will give inferior performance, especially during transient conditions 10.2 Layout Examples 6 3 7 2 8 1 VIN 5 GND CIN 4 VSD COUT GND VOUT Figure 23. LM2936BM SOIC (D) Layout 5 6 3 7 2 8 1 VIN 4 GND GND VOUT Figure 24. LM2936M SOIC (D) Layout Thermal Vias 4 GND CIN GND 1 3 COUT VIN VOUT Figure 25. LM2936 TO-252 (NDP) Layout 10.3 Thermal Considerations Due to the power dissipation characteristics of the available packages (RθJA), full output current cannot be ensured for all combinations of ambient temperature and input voltage. Exceeding the maximum allowable power dissipation as defined by the final package RθJA will cause excessive die junction temperature, and the regulator may go into thermal shutdown. Power dissipation, PD, is calculated from the following formula: PD = ((VIN – VOUT) × IOUT) + (VIN × IGND) 16 (1) Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 LM2936 www.ti.com SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 Thermal Considerations (continued) space VIN IIN = IGND + IOUT VOUT IOUT IN OUT GND CIN IGND LOAD COUT Figure 26. Current Paths for Power Dissipation Calculation Knowing the power dissipation (PD), the thermal resistance of the package (RθJA), and the ambient temperature (TA), the junction temperature (TJ) can be estimated using the following formula: TJ = (PD × RθJA) + TA (2) Knowing the thermal resistance of the package (RθJA), the ambient temperature (TA), and the maximum allowed operating junction temperature (TJ) of 125°C, the maximum power dissipation can be estimated using the following formula: PD(MAX) = (125°C – TA) / RθJA (3) Alternately, solving for the required thermal resistance (RθJA): RθJA = (125°C – TA) / PD(MAX) (4) The maximum allowed PD information from Equation 3 can be used to estimate the maximum allowed load current (IOUT), or the maximum allowed VIN: VIN(MAX) = (PD(MAX) / IOUT) + VOUT IOUT(MAX) = (PD(MAX) / (VIN – VOUT)) (5) (6) As an example, an application requires : VIN = 14 V, VOUT = 5 V, IOUT = 25 mA, and TA = 85°C. Find the maximum RθJA to keep the junction temperature under 125°C. RθJA RθJA RθJA RθJA ≤ (125°C – TA) / PD(MAX) ≤ (125°C – 85°C) / ((14 V – 5 V) × 0.025 A) ≤ 40°C / 0.225W ≤ 177°C/W (7) (8) (9) (10) The EIA/JEDEC standard (JESD51-2) provides methodologies to estimate the junction temperature from external measurements (ΨJB references the temperature at the PCB, and ΨJT references the temperature at the top surface of the package) when operating under steady-state power dissipation conditions. These methodologies have been determined to be relatively independent of the copper thermal spreading area that may be attached to the package DAP when compared to the more typical RθJA. Refer to Texas Instruments Application Report Semiconductor and IC Package Thermal Metrics (SPRA953), for specifics. On the 8-pin SOIC (D) package, the four ground pins are thermally connected to the backside of the die. Adding approximately 0.04 square inches of 2 oz. copper pad area to these four pins will improve the JEDEC RθJA rating from 111.4°C/W to approximately 100°C/W. If this extra copper area is placed directly beneath the SOIC package there should not be any impact on board density. The LM2936 has an internally set thermal shutdown point of typically 160°C. Thermal shutdown is outside the ensured operating temperature range and is intended as a safety feature only. Continuous operation near the thermal shutdown temperature should be avoided as it may have a negative affect on the life of the device. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 17 LM2936 SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: Texas Instruments Application Report Semiconductor and IC Package Thermal Metrics (SPRA953) 11.2 Trademarks WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2936 PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM2936BM-3.3/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6B3.3 LM2936BM-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6B5.0 LM2936BMX-3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6B3.3 LM2936BMX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6B5.0 LM2936DT-3.0/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LM2936D T-3.0 LM2936DT-3.3/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LM2936D T-3.3 LM2936DT-5.0 NRND TO-252 NDP 3 75 TBD Call TI Call TI -40 to 125 LM2936D T-5.0 LM2936DT-5.0/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LM2936D T-5.0 LM2936DTX-3.3/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LM2936D T-3.3 LM2936DTX-5.0 NRND TO-252 NDP 3 2500 TBD Call TI Call TI -40 to 125 LM2936D T-5.0 LM2936DTX-5.0/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LM2936D T-5.0 LM2936HVBMA-3.3 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2936H BM3.3 LM2936HVBMA-3.3/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2936H BM3.3 LM2936HVBMA-5.0 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2936H BM5.0 LM2936HVBMA-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2936H BM5.0 LM2936HVBMAX3.3 NRND SOIC D 8 2500 TBD Call TI Call TI 2936H BM3.3 LM2936HVBMAX3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 2936H BM3.3 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM2936HVBMAX5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM2936HVMA-5.0 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2936H M-5.0 LM2936HVMA-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2936H M-5.0 LM2936HVMAX-5.0 NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 2936H M-5.0 LM2936HVMAX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2936H M-5.0 LM2936M-3.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6M-3 LM2936M-3.3 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 LM293 6-3.3 LM2936M-3.3/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6-3.3 LM2936M-5.0 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 LM293 6M-5 LM2936M-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6M-5 LM2936MM-3.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KBC LM2936MM-3.3 NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 125 KBB LM2936MM-3.3/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KBB LM2936MM-5.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KBA LM2936MMX-3.3/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KBB LM2936MMX-5.0 NRND VSSOP DGK 8 3500 TBD Call TI Call TI -40 to 125 KBA LM2936MMX-5.0/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KBA LM2936MP-3.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM2936MP-3.3 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI Addendum-Page 2 2936H BM5.0 KACA -40 to 125 KABA Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 16-Oct-2015 Status (1) LM2936MP-3.3/NOPB Package Type Package Pins Package Drawing Qty ACTIVE SOT-223 DCY 4 1000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KABA (4/5) LM2936MP-5.0 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI -40 to 125 KAAA LM2936MP-5.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KAAA LM2936MPX-3.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KACA LM2936MPX-3.3/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KABA LM2936MPX-5.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 KAAA LM2936MX-3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6-3.3 LM2936MX-5.0 NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 LM293 6M-5 LM2936MX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM293 6M-5 LM2936Z-3.0/NOPB LIFEBUY TO-92 LP 3 1800 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 LM2936 Z-3 LM2936Z-3.3/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 LM2936 Z-3.3 LM2936Z-5.0/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type LM293 6Z-5 LM2936Z-5.0/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type LM293 6Z-5 LM2936Z-5.0/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type LM293 6Z-5 LM2936Z-5.0/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 3 -40 to 125 LM293 6Z-5 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM2936BMX-3.3/NOPB Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) D 8 2500 330.0 12.4 6.5 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 5.4 2.0 8.0 12.0 Q1 LM2936BMX-5.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936DTX-3.3/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LM2936DTX-5.0 TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LM2936DTX-5.0/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LM2936HVBMAX3.3 SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936HVBMAX3.3/NOP B SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936HVBMAX5.0/NOP B SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936MM-3.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MM-3.3 VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MM-3.3/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MM-5.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MMX-3.3/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MMX-5.0 VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936HVMAX-5.0 LM2936HVMAX-5.0/NOP B Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM2936MMX-5.0/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM2936MP-3.0/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MP-3.3 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MP-3.3/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MP-5.0 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MP-5.0/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MPX-3.0/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MPX-3.3/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MPX-5.0/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LM2936MX-3.3/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936MX-5.0 SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM2936MX-5.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2936BMX-3.3/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM2936BMX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM2936DTX-3.3/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 LM2936DTX-5.0 TO-252 NDP 3 2500 367.0 367.0 35.0 LM2936DTX-5.0/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2936HVBMAX3.3 SOIC D 8 2500 367.0 367.0 35.0 LM2936HVBMAX3.3/NOP B SOIC D 8 2500 367.0 367.0 35.0 LM2936HVBMAX5.0/NOP B SOIC D 8 2500 367.0 367.0 35.0 LM2936HVMAX-5.0 SOIC D 8 2500 367.0 367.0 35.0 LM2936HVMAX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM2936MM-3.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM2936MM-3.3 VSSOP DGK 8 1000 210.0 185.0 35.0 LM2936MM-3.3/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM2936MM-5.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM2936MMX-3.3/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM2936MMX-5.0 VSSOP DGK 8 3500 367.0 367.0 35.0 LM2936MMX-5.0/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM2936MP-3.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0 LM2936MP-3.3 SOT-223 DCY 4 1000 367.0 367.0 35.0 LM2936MP-3.3/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0 LM2936MP-5.0 SOT-223 DCY 4 1000 367.0 367.0 35.0 LM2936MP-5.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0 LM2936MPX-3.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0 LM2936MPX-3.3/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0 LM2936MPX-5.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0 LM2936MX-3.3/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM2936MX-5.0 SOIC D 8 2500 367.0 367.0 35.0 LM2936MX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 3 MECHANICAL DATA NDP0003B TD03B (Rev F) www.ti.com MECHANICAL DATA MPDS094A – APRIL 2001 – REVISED JUNE 2002 DCY (R-PDSO-G4) PLASTIC SMALL-OUTLINE 6,70 (0.264) 6,30 (0.248) 3,10 (0.122) 2,90 (0.114) 4 0,10 (0.004) M 3,70 (0.146) 3,30 (0.130) 7,30 (0.287) 6,70 (0.264) Gauge Plane 1 2 0,84 (0.033) 0,66 (0.026) 2,30 (0.091) 4,60 (0.181) 1,80 (0.071) MAX 3 0°–10° 0,10 (0.004) M 0,25 (0.010) 0,75 (0.030) MIN 1,70 (0.067) 1,50 (0.059) 0,35 (0.014) 0,23 (0.009) Seating Plane 0,08 (0.003) 0,10 (0.0040) 0,02 (0.0008) 4202506/B 06/2002 NOTES: A. B. C. D. All linear dimensions are in millimeters (inches). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC TO-261 Variation AA. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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