AKM AK4185 Low power touch screen controller with spiâ ¢ interface Datasheet

[AK4185]
AK4185
Low Power Touch Screen Controller with SPI™ Interface
GENERAL DESCRIPTION
The AK4185 is a 4-wire/ 5-wire resistive touch screen controller that incorporates 12bit SAR A/D
converter. The AK4185 operates down to 1.6V supply voltage in order to connect a low voltage
microprocessor. The AK4185 has both an automatic continuous measurement and a measurement data
calculation function. The functions that normally require external processing, such as calculating the
average screen input value, are processed by the AK4185. In addition, a new sequential mode achieves
short coordinate measurement time while greatly reducing the microprocessor overhead. The AK4185
can detect the pressed screen location by performing two A/D conversions and it can also measure touch
pressure. The AK4185 is the best fit for cellular phone, DSC, DVC, smart phone, or other portable
devices.
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FEATURES
4-wire or 5-wire Touch Screen Interface
SPITM Serial Interface
12bit SAR A/D Converter with S/H circuit
Sampling Rate: 300Ksps
Pen Pressure Measurement (4-wire)
Continuous Read Function (External Clock Mode)
Integrated Internal Osc (Sequence Mode)
Integrated Median Averaging Filter
Low Voltage Operation: VDD = 1.6V ~ 3.6V
PENIRQN Buffer Output
Low Power Consumption: 240μA at 1.8V
Auto Power Down
Package: 12pin CSP (1.96mm x 1.46mm, pitch 0.5mm)
Software Compatible with AK4182A
VDD
CSN
XP/BR
YP/TR
XN/TL
4/5wire
Touch
Screen
Drivers
Interface
SPI
Serial I/F
&
Control
Logic
VREF+
AIN+
SAR
MUX
ADC
AIN-
YN/BL
DIN
SCLK
DOUT
VREF-
IN/
WIPER
PENIRQN
TEMP
Internal
Osc
VSS
Figure 1. Block Diagram
SPITM is a registered trademark of Motorola, Inc.
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[AK4185]
■ Ordering Guide
AK4185ECB −40 ∼ +85°C
12pin CSP (1.96mm x 1.46mm, 0.5mm pitch)
AKD4185
AK4185 Evaluation Board
Black Type
■ Pin Layout
3
Top View
2
1
A
B
C
D
3
XP/BR
YP/TR
XN/TL
YN/BL
2
VDD
CSN
DIN
VSS
1
IN/WIPER
PENIRQN
DOUT
SCLK
A
B
C
D
TOP View
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[AK4185]
PIN/FUNCTION
No.
C2
Pin Name
DIN
I/O
I
Function
Serial Data Input
Data is clocked on the rising edge of SCLK. Must keep “L” while not issuing
command.
B2 CSN
I
Chip Select Input
Enables writing data to registers when CSN = “L”.
D1 SCLK
I
Serial Clock Input
A2 VDD
Power Supply and External Reference Input: 1.6V ~ 3.6V
A3 XP
I/O Touch Panel X+ Input (4-wire, PANEL bit = “0”)
BR
I/O Touch Panel Bottom Right Input (5-wire, PANEL bit = “1”)
B3 YP
I/O Touch Panel Y+ Input (4-wire, PANEL bit = “0”)
TR
I/O Touch Panel Top Right Input (5-wire, PANEL bit = “1”)
C3 XN
I/O Touch Panel X- Input (4-wire, PANEL bit = “0”)
TL
I/O Touch Panel Top Left Input (5-wire, PANEL bit = “1”)
D3 YN
I/O Touch Panel Y- Input (4-wire, PANEL bit = “0”)
BL
I/O Touch Panel Bottom Right Input (5-wire, PANEL bit = “1”)
D2 VSS
Ground
A1 IN
I
Auxiliary Analog Input (4-wire, PANEL bit = “0”)
WIPER
I
Top Touch Panel Input (5-wire, PANEL bit = “1”)
B1 PENIRQN
O Pen Interrupt Output (CMOS output)
The PENIRQN pin is “L” when touch-screen press is detected and CSN = “H”. This
pin is always “H” irrespective of touch-screen press when pen interrupt is not
enabled.
C1 DOUT
O Serial A/D Data Output
Data is clocked at SCLK falling edge. This pin is Hi-Z when CSN keeps “H”.
Note 1. All digital input pins (DIN, CSN, SCLK) must not be left floating.
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[AK4185]
■ Handling of Unused Pin
The unused I/O pin must be processed appropriately as below.
Classification
Analog
Pin Name
IN/WIPER
Setting
This pin must be open.
ABSOLUTE MAXIMUM RATINGS
(VSS = 0V (Note 2))
Parameter
Symbol
min
max
Units
Power Supply
VDD
-0.3
4.6
V
Input Current, Any Pins except for supply
IIN
mA
±10
Touch Panel Drive Current
IOUTDRV
50
mA
Input Voltage (Note 3)
VIN
VDD+0.3 or 4.6
V
−0.3
Ambient Temperature (power applied)
Ta
-40
85
°C
Storage Temperature
Tstg
-65
150
°C
Note 2. All voltages with respect to ground.
Note 3. XP/BR, XN/TL, YP/TR, YN/TL, IN/WIPER, CSN, DIN and SCLK pins. The maximum value is smaller value
between (VDD+0.3)V and 4.6V.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMEND OPERATING CONDITIONS
(VSS = 0V (Note 2))
Parameter
Symbol
min
typ
Power Supply
VDD
1.6
1.8
Note 2. All voltages with respect to ground.
max
3.6
Units
V
WARNING: AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
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[AK4185]
ANALOG CHARACTERISTICS
(Ta = -40°C to 85°C, VDD = 1.8V, fSCLK = fs x 16=5.0MHz, 12bit mode)
Parameter
min
typ
max
Units
A/D Converter
Resolution
12
Bits
No Missing Codes
11
12
Bits
Integral Nonlinearity (INL) Error
±2
LSB
Differential Nonlinearity (DNL) Error
-2
±1
+3
LSB
Offset Error
±6
LSB
Gain Error
±4
LSB
Touch Panel Drivers Switch On-Resistance
XP, YP (RL=300Ω)
2.5
5
15
Ω
XN, YN (RL=300Ω)
2.5
5
15
Ω
PENIRQ Pull Up Resistor RIRQ
30
50
70
kΩ
Auxiliary IN Input
Input Voltage Range
0
VDD
V
Temperature Measurement
Temperature Range
-40
85
°C
Resolution (Note 4)
1.2
°C
Accuracy (Note 5)
±3
°C
Power Supply Current
Normal Mode (Internal Oscillator mode) (Note 6)
VDD=18V
240
μA
VDD=3.6V
550
μA
Normal Mode (Bus clock mode) PD0 = “0” (Note 7)
VDD=1.8V
340
μA
VDD=3.6V
800
μA
Full Power Down (when writing control command with PD0 = “0”)
0
3
μA
Note 4. “Ideal” value derived from a theory when VDD = 1.8V. This value according to the supplied VDD voltage is
0.6466 x VDD.
Note 5. The typical value has +6°C(typ) offset.
Note 6. The signal of 1kHz, 1.6Vpp (-1dB) is input to the IN/WIPER pin, when COUNT bit = “0”, INTERVAL = 0µs and
command cycle is 50µs. DOUT CL = 0pF, the current of touch panel drivers is excluded.
Note 7. The signal of 1kHz, 1.6Vpp (-1dB) is input to the IN/WIPER pin, when Single Mode for external clock
(CONTINUE bit = “0”) and 15 SCLK clock cycles. DOUT CL = 0pF, the current of touch panel drivers is
excluded.
DC CHARACTERISTTICS (Logic I/O)
(Ta=-40°C to 85°C, VDD =1.6V to 3.6V)
Parameter
Symbol
min
Digital Input (CSN, SCLK, DIN)
“H” level input voltage
VIH
0.8xVDD
“L” level input voltage
VIL
Input Leakage Current.
IILK
-10
Digital Output (DOUT, PENIRQN)
VOH
VDD-0.4
“H” level output voltage (@ Iout = -250μA)
VOL
“L” level output voltage (@ Iout = 250μA)
Tri-state Leakage Current
IOLK
All pins except for XP, YP, XN, YN pins
-3
XP, YP, XN, YN pins
-3
MS0954-E-05
typ
max
Units
-
0.2xVDD
10
V
V
μA
-
0.4
V
V
-
3
3
μA
μA
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[AK4185]
SWITCHING CHARACTERISTICS
(Ta=-40°C to 85°C, VDD=1.6V to 3.6V, CL=50pF)
Parameter
Symbol
min
Internal OSCILLATOR
Clock Frequency
fOSC
2.5
Touch Panel (A/D Converter)
Throughput Rate
fs
SCLK
frequency
fSCLK
30
duty
duty
40
Sampling Time (Rin = 600Ω) (Note 8)
tTRK
0.6
Conversion Time
tCONV
CSN edge to First SCLK “↑”
tCSS
50
CSN edge to DOUT Tri-State Disabled
tDCD
SCLK High Pulse Width
tCKH
80
SCLK Low Pulse Width
tCKL
80
Data Setup Time
tDS
40
Data Valid to SCLK Hold Time
tDH
40
Data Output Delay after SCLK “↓”
tDOD
CSN “↑” to SCLK Ignored
tCSI
50
CSN “↑” to DOUT Hi-Z state
tCCZ
CSN Hold Time
tCSW
150
Note 8. The actual tracking periods are 3tSCLK. (tSCLK = 1/fSCLK)
typ
max
Units
3.6
5.1
MHz
300
-
kHz
50
-
5000
60
12
50
70
90
-
KHz
%
μs
1/fSCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCSW
CSN
50%VDD
tCKL
tCSS
tCSI
tDOD
tCKH
SCLK
50%VDD
tDH
tDS
PD0
50%VDD
DIN
tCCZ
tDCD
DOUT
D11
D10
D0
VOH
VOL
Figure 2. Timing Diagram
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OPERATION OVERVIEW
■ Function Overview
The AK4185 consists of the following blocks:
● 1.6V Successive Approximation Resister (SAR) A/D converter
● 4-wire or 5-wire resistive touch screen controller interface
● Single or Continuous A/D conversion
● Integrated Median Averaging Filter
● SAR A/D Converter conversion clock select function
- External Clock (SCLK)
- Internal Clock
● SPITM I/F
■ A/D Converter for Touch Screen
The AK4185 incorporates a 12bit successive approximation resistor (SAR) A/D converter for position measurement,
temperature, and auxiliary input. The architecture is based on capacitive redistribution algorithm, and an internal
capacitor array functions as the sample/hold (S/H) circuit.
The SAR A/D converter output is a straight binary format as shown below:
Input Voltage
Output Code
FFFH
(ΔVREF-1.5LSB)~ ΔVREF
FFEH
(ΔVREF-2.5LSB) ~ (ΔVREF-1.5LSB)
----------------0.5LSB ~ 1.5LSB
001H
0 ~ 0.5LSB
000H
ΔVREF: (VREF+) – (VREF-)
Table 1. Output Code
The AK4185 can select SCLK of the digital interface and internal clock within oscillator for A/D conversion clock. The
full scale (ΔVREF) of the A/D converter depends on the input mode. Position and pen pressure is actually measured by
differential mode, then IN and temperature is actually measured by single-ended mode. The AK4185 is controlled by the
8bit serial command on the DIN pin. A/D conversion result is 12bit data output on the DOUT pin.
■ Analog Inputs
Analog input is selected via the A2, A1, and A0 bits in the converter register. If the analog inputs are selected to the X, Y,
or Z-axis, at differential mode, the full scale (ΔVREF) is the voltage difference between the non-inverting terminal and
the inverting terminal of the measured axis (e.g. X-axis measurement: (XP) - (XN)). Analog non-inverting input to A/D
converter is the non-inverting terminal of the non-measured axis while the inverting input is the inverting terminal of the
measured axis. At single-ended mode, the full scale of A/D converter (ΔVREF) is the external reference voltage (VDD).
The analog input of A/D converter (ΔAIN) is the voltage difference between the selected channel (IN, TEMP) and the
VSS. In case of external clock mode, tracking time is the period from the falling edge of 5th SCLK to that of 8th SCLK
after the detection of START bit during CSN = “L”.
If the source impedance of analog input is larger than 600Ω, longer tracking time is required. Then A/D conversion should
be started.
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■ Position Detection of Touch Screen
1. The Position Detection for 4-wire Touch Screen
The position on the touch screen is detected by taking the voltage of one axis when the voltage is supplied between the two
terminals of another axis. At least two A/D conversions are needed to get the two-dimensions (X/Y-axis) position.
VDD
VDD
X-Plate
XP-Driver SW ON
XP
VREF+
AIN+
VREF
XP
Y-Plate
VREF+
YP
ADC
X-Plate
YP-Driver SW ON
AIN+
YP
ADC
AIN-
Y-Plate
VREF-
AIN-
XN
XN
XN-Driver SW ON
YN
YN
Touch Screen
YN-Driver SW ON
a)
X-Position Measurement Differential Mode
b)
Y-Position Measurement Differential Mode
The X-plate and Y-plate are connected on the dotted line when the panel is touched.
X+
X-Plate (Top side)
X-
Y-Plate (Bottom side)
Y-
Y+
c)
4-wire Touch Screen Construction
Figure 3. Axis Measurements for 4-wire Touch Screen
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[AK4185]
2. The Position Detection for 5-wire Touch Screen
A 5-wire touch panel consists of one transparent resistive layer and a top metal contact area separated by insulating
spacers. The top layer acts only as a voltage measuring probe, the position detection uses the bottom resistive layer that
had metal contacts at the 4 corners. When the top layer is pressed by a pen or stylus, the top layer contacts with the bottom
layer. Then the X and Y coordinates is detected. The 5-wire touch screen works properly even with damages or scratches
on the top layer, therefore the 5-wire touch panel has higher durability than the 4-wire touch panel. Connect the metal
contact of the top layer to the WIPER pin, which connected inside of the AK4185, to AIN+ to measure the Y-axis of
current position. The top right and top left contacts at the 4 corners are connected to VDD and the bottom right and bottom
left contacts connected to VSS. Then the AK4185 initiates A/D conversion of AIN+ input voltage, and Y-axis position is
determined.
Terminal
X-axis
Y-axis
SW
TL
VSS
VDD
Switch
VDD/VSS
TR
VDD
VDD
VDD
ON/OFF
BL
VSS
VSS
VSS
ON/OFF
BR
VDD
VSS
Switch
VDD/VSS
Table 2. Driver SW configuration
VDD
VDD
VDD
TR SW ON
VDD
TL SW ON
BR SW ON
VREF+
BR
TR
TR SW ON
WIPER
AIN+
VREF+
ADC
AIN+
WIPER
ADC
TL
AIN-
VREF
TL
TR
AIN-
VREF-
BL
TL SW ON
BR
BL SW ON
BL
BL SW ON
BR SW ON
a) X-Position Measurement Differential Mode
b) Y-Position Measurement Differential Mode
The Top layer and Bottom layer are connected on the dotted line when the panel is touched.
Detection side (Top layer)
ADC
WIPER
TL
BL
TR
Drive side (Bottom Layer)
BR
5-wire Touch Screen Construction
Figure 4. Axis Measurements for 5-wire Touch Screen
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[AK4185]
■ Pen Pressure Measurement (Only 4-wire Touch Screen)
The touch screen pen pressure can be derived from the measurement of the contact resistor between two plates. The
contact resistance depends on the size of the depressed area and the pressure. The area of the spot is proportional to the
contact resistance.
This resistance (Rtouch) can be calculated using two different methods. The first method is that when the total resistance
of the X-plate sheet is already known. The resistance, Rtouch, is calculated from the results of three conversions,
X-position, Z1-position, and Z2-position, and then using following formula:
R TOUCH = R X -plate ⋅
X Position
4096
⎛ Z2 ⎞
⎜⎜ − 1⎟⎟
⎝ Z1 ⎠
The second method is that when both the resistances of the X-plate and Y-plate are known. The resistance, Rtouch, is
calculated from the results of three conversions, X-position, Y-position, and Z1-position, and then using the following
formula:
R X-plate ⋅ X Position ⎛ 4096 ⎞
⎛ Y
⎞
⎜⎜
− 1⎟⎟ − R Y -plate ⋅ ⎜1 - Position ⎟
4096
⎝ 4096 ⎠
⎝ Z1
⎠
R TOUCH =
VDD
VDD
ON
ON
YP
YP
XP
VREF+
AIN+
VREF-
AIN-
touch
ADC
XP
VREF+
AIN+
VREF-
AIN-
touch
ADC
XN
XN
ON
ON
YN
a)
YN
b)
Z1-Position Measurement Differential Mode
Z2-Position Measurement Differential Mode
Figure 5. Pen Pressure Measurements
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[AK4185]
■ Temperature Measurement
Equation <1> describes the forward characteristics of the diode.
i D = I0
( )
⋅e
VD
VT
(VT =
kT
)
q
<1>
I0: reverse saturation current
q: 1.602189×10-19 (electron charge)
k: 1.38054×10-23 (Boltzmann’s constant)
VD: voltage across diode
T: absolute temperature K
The diode characteristic is approximately shown as a diode junction voltage. That is theoretically to the temperature; the
ambient temperature can be predicated by knowing this voltage.
Temp.
Sensor
I
80
1
TEMP0
TEMP1
Figure 6. Temperature Measurement
As the AK4185 has two different fixed current circuits and a diode (temperature sensor), the temperature can be measured
by using two different methods.
The first method needs two conversions, but can derive the temperature directly without knowing the voltage at a specific
temperature.
From equation <1>
⎧ ( V (1)− V (80 ) ) ⎫
⎛ I ⎞
⎪
⎪
⎨
⎬
VT
⎛ i D1 ⎞ ⎜ 1 ⎟
⎪⎩
⎪⎭
⎜⎜ ⎟⎟ = ⎜ ⎟ = 80 = e
I
⎝ i D0 ⎠ ⎜⎜ ⎟⎟
⎝ 80 ⎠
q
T[ °C ] = ΔVbe ⋅
− 273
k ⋅ In(80)
ΔVbe = V(1) − V(80)
T[° C ] = 2.648 × 10 3 × ΔVbe − 273
The second method needs only one conversion as the following equation, but requires knowing the junction voltage at the
specific temperature.
⎛ k ⎞ VD
T = ⎜⎜ ⎟⎟ ⋅
⎝ q ⎠ In⎛⎜ i D ⎞⎟
⎝ I0 ⎠
<2>
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[AK4185]
■ Digital I/F
The AK4185 operates with the microprocessor via SPITM bus. The microprocessor starts to transmit data synchronized
with serial clock. The AK4185 operates off of supply voltage down to 1.6V in order to connect a low voltage
microprocessor.
VDD=1.6V – 3.6V
CSN
SCLK
AK4185
Micro-
DIN
Processor
DOUT
PENIRQN
4/5-wire touch panel
Figure 7. Digital I/F
1. A/D Data Measurement (External Clock Mode)
(1) Single Read (CONTINUE bit = “0”)
DDLY bit = “0” (LSB justified)
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2122 23 24
SCLK
S
DIN
“L”
Command Byte
DOUT
(DDLY bit=0,
MODE bit =0)
12bit A/D Data (1) (MSB First)
Hi-Z
DOUT
(DDLY bit=0,
MODE bit =1)
8bit A/D Data (1)
(MSB First)
Hi-Z
Hi-Z
Hi-Z
Figure 8. Single Read (External clock mode: DDLY bit = “0”)
DDLY bit = “1” (MSB justified)
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
SCLK
S
DIN
Command Byte
“L”
DOUT
(DDLY bit=1,
MODE bit =0)
12bit A/D Data (1) (MSB First)
Hi-Z
DOUT
(DDLY bit=1,
MODE bit =1)
8bit A/D Data (1)
(MSB First)
Hi-Z
Hi-Z
Hi-Z
Figure 9. Single Read (External clock mode: DDLY bit = “1”)
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[AK4185]
(2) Continuous Read (CONTINUE bit = “1”)
DDLY bit = “0” (LSB justified)
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2122 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
··· 104
SCLK
S
DIN
“L”
Command Byte
DOUT
(DDLY bit=0,
MOD E bit =0)
12bit A/D D ata (1) (MSB First)
Hi-Z
DOUT
(DDLY bit=0,
MOD E bit =1)
12bit A/D Data (2) (MSB First)
8bit A/D Data (1)
(MSB First)
Hi-Z
12bit A/D Data (6) (MSB First)
8bit A/D Data (2)
(MSB First)
Hi-Z
8bit A/D Data (6)
(MSB First)
Hi-Z
Figure 10. Continuous Read (External clock mode: DDLY bit = “0”, COUNT bit = “0”)
DDLY bit = “1” (MSB justified)
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2122 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
··· 101
SCLK
S
DIN
“L”
Command Byte
DOUT
(DDLY bit=1,
MODE bit =0)
12bit A/D Data (1) (MSB First)
Hi-Z
DOUT
(DDLY bit=1,
MODE bit =1)
12bit A/D Data (2) (MSB First)
8bit A/D Data (1)
(MSB First)
Hi-Z
12bit A/D Data (6) (MSB First)
8bit A/D Data (2)
(MSB First)
8bit A/D Data (6)
(MSB First)
Hi-Z
Hi-Z
Figure 11. Continuous Read (External clock mode: DDLY bit = “1”, COUNT bit = “0”)
2. A/D Data Measurement (Internal clock mode)
(1) Sequential Mode Start Command
CSN
1 2 3 4 5 6 7 8
SCLK
R/W=“0”
Command Byte
DIN
S
01 0
1 11
D7
D0
Figure 12. Sequence Mode Start Command
(2) A/D Data Read for Sequential Mode
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2122 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
··· 72
SCLK
R/W=“1”
Command Byte
DIN
S
D7
DOUT
(DDLY bit=0)
Hi-Z
01 0
“L”
11 1
D0
12bit A/D Data (X) (MSB First)
12bit A/D Data (Y) (MSB First)
12bit A/D Data (Z1) (MSB First)
12bit A/D Data (Z2) (MSB First)
Hi-Z
DOUT
(DDLY bit=1)
Hi-Z
12bit A/D Data (X) (MSB First)
12bit A/D Data (Y) (MSB First)
12bit A/D Data (Z1) (MSB First)
12bit A/D Data (Z2) (MSB First)
Hi-Z
Figure 13. A/D Data Read for Sequential Mode (SEQM bit = “000”)
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[AK4185]
3. Setup Command
(1) Setup Command Write
CSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SCLK
R/W=“0”
D3
Command Byte
DIN
S
01 0
Addr
D7
DOUT
D0
“L”
Data
D0
Hi-Z
Hi-Z
* DIN must keep low state between 13th SCLK and 15th SCLK after data is sent on the DIN.
When the SCLK is input over 16th SCLK, DIN must keep low state.
Figure 14. Setup Command Write
(2) Setup Command Read
CSN
1 2 3 4 5 6 7 8 9 10 11 12
SCLK
R/W=“1”
Command Byte
DIN
S
0 10
DOUT
“L”
Addr
D0 D3
D7
D0
Data
Hi-Z
Hi-Z
* DIN must keep low state between 9th SCLK and 12th SCLK after command is sent on the DIN.
When the SCLK is input over 13th SCLK, DIN must keep low state.
Figure 15. Setup Command Read
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[AK4185]
■ Control Command
This command can select the touch panel and ADC conversion clock. This 8bit control command includes channel
selection, resolution, and power-down mode, and outputs in synchronization of the falling edge of SCLK after CSN = “L”.
The AK4185 latches the serial command at the rising edge of SCLK.
Refer to the control command of the AK4185 as shown in Table 4.
D7
S
D6
A2
D5
A1
D4
A0
D3
MODE
D2
x1
D1
x2
D0
PD0
Table 3. Command Byte definition (x1, x2: Don’t care)
BIT
D7
Name
S
D6-D4
A2-A0
D3
MODE
D2
D1
D0
x1
x2
PD0
Function
Start Bit.
This bit must be “H” because the AK4185 initiates the command recognition.
Channel Selection bit.
Analog inputs to the A/D converter, the activated driver switches, and the reference voltage
are selected.
Resolution of A/D converter.
0: 12bit output
1: 8bt output
Don’t care
Don’t care
Power-down Mode. (reference to “„ Power-down Control”)
Table 4. Control Command definition
(1) 4-wire touch panel configuration
Channel
Selection
A2 A1
0
0
0
0
0
1
0
1
1
1
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
Status of
Driver Switch
X-Driver Y-Driver
OFF
OFF
OFF
ON
XN-ON
XN-ON
ON
OFF
OFF
YP-ON
YP-ON
OFF
OFF
OFF
ADC input
(ΔAIN)
AIN+
AINTEMP0
VSS
XP
YN
XP
YN
YP
IN
TEMP1
XN
XN
XN
VSS
VSS
Reference Voltage
(ΔVREF)
VREF+ VREFVREF
VSS
YP
YN
YP
YP
XP
VREF
VREF
XN
XN
XN
VSS
VSS
Note
TEMP0
Y-axis
Setup Command
(Table 7)
Z1 (Pressure)
Z2 (Pressure)
X-axis
AIN
TEMP1
Ref. Mode
SER
DFR
DFR
DFR
DFR
SER
SER
Table 5. Control Command List (4-wire)
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[AK4185]
(2) 5-wire touch panel configuration
TR: VDD ON/OFF, BL: VSS ON/OFF
Channel
Status of
ADC input
Driver Switch
Selection
(ΔAIN)
A2 A1 A0 TR-Driver BL-Driver
AIN+
AIN0
0
0
OFF
OFF
TEMP0
VSS
0
0
1
ON
ON
WIPER
BL
0
1
0
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
Reference Voltage
(ΔVREF)
VREF+
VREFVREF
VSS
TR
BL
-
ON
ON
WIPER
BL
TR
BL
OFF
OFF
TEMP1
VSS
VREF
VSS
Note
Ref. Mode
TEMP0
Y-axis
Setup Command
(Table 7)
Reserved
Reserved
X-axis
Reserved
TEMP1
SER
DFR
DFR
SER
Table 6. Control Command List (5-wire) (The combination other than above is invalid.)
(3) Setup Command configuration
BIT
D7
Name
S
D6-D4
D3-D1
A2-A0
Addr
D0
R/W
Description
Start Bit.
This bit must be “H” because the AK4185 initiates the command recognition.
Setup command. must write “010”
Addr Selection (Table 8)
“000”: Function 1 (Table 9)
“001”: Function 2 (Table 10)
“010”: Function 3 (Table 11)
“011”: Function 4 (Table 12)
“111”: Command of internal clock mode
READ/ WRITE
0: Write (When Addr bits = “111”, Sequential Mode is started.)
1: Read (When Addr bits = “111”, A/D data is read out.)
Table 7. Setup Command description
Setup Command Function
Addr
NAME
D3
D2
00H
Function 1
PANEL
CONTINUE
01H
Function 2
SEQM[2:0]
02H
Function 3
INTERVAL[2:0]
03H
Function 4
SLEEP[1:0]
04H
Reserved
0
0
05H
Reserved
0
0
06H
Reserved
0
0
07H
Command
x
x
Note 9. Do not write “1” data to the bits named “0”.
D1
COUNT
D0
DDLY
0
0
SEQST[1:0]
0
0
0
0
0
0
x
x
Table 8. Setup Command List (x: Don’t care.)
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[AK4185]
Function 1 [R/W]: External Clock Mode and Internal Clock Mode
BIT
Name
Description
D3
PANEL
Panel type selection.
0: 4-wire (default)
1: 5-wire
D2
CONTINUE Read Mode selection. (only External Clock Mode)
0: Single (default)
1: Continuous
D1
COUNT
ADC Conversion count.
0: 6 times AD conversion (default)
1: 10 times AD conversion
D0
DDLY
A/D output data format
0: LSB justified. (default)
1: MSB justified.
Table 9. Setup Function 1 description
Function 2 [R/W]: only Internal Clock Mode
BIT
Name
Description
D3-D1
SEQM
Sequence Mode
000: X → Y → Z1 → Z2 Scan (only 4-wire Touch Screen) (default)
001: X → Y Scan
010: X Scan
011: Y Scan
100: Z1 → Z2 Scan (only 4-wire Touch Screen)
101: TEMP0 → TEMP1
110: A-IN (only 4-wire Touch Screen)
111: Reserved
D0
Reserved
Table 10. Setup Function 2 description
Function 3 [R/W]: only Internal Clock Mode
BIT
Name
Description
D3-D1 INTERVAL Sampling interval times.
000: 0μs (default)
001: 5μs
010: 10μs
011: 20μs
100: 50μs
101: 100μs
110: 200μs
111: 500μs
D0
Reserved
Table 11. Setup Function 3 description
Function 4 [R/W]: External Clock Mode and Internal Clock Mode
BIT
Name
Description
D3-D2
SLEEP
Sleep Command (Sleep mode is valid after CSN = “H”.)
00: Normal Mode (default)
01: Sleep Mode 1 (PENIRQN disabled and output “H”. Touch Panel is open.)
10: Sleep Mode 2 (PENIRQN disabled and open. Touch Panel is open.)
11: Reserved
D1-D0
SEQST
Status Bits
[Read only]
00: Not Busy
01: Sampling Wait
10: Sequence Busy
11: Data Available
Table 12. Setup Function 4 description
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[AK4185]
■ Power on Sequence
The AK4185 has a Power on Reset circuit. When power up the AK4185, the power supply voltage must reach 80% VDD
in less than 2ms after holding low state (under 0.1V) for 20ms (min). To fix the internal register, send the control
command when first power up. It initiates all registers such as PD0 bit and sequence register. The sequence is that 1)
Power On with CSN= “H” or “L” then CSN = “H”. 2) Send control command after CSN = “L”. 3) CSN = “H” again. Once
sending command to fix the internal register after first power up, the state of the AK4185 is held on the same condition as
last command issued.
80%VDD
0.1V
VDD
20ms
(min)
2ms (max)
CSN
50ms
DIN
C ontrol Command
Setup F unction1
Setup Function2
Setup Function3
Setup Func tion4
Figure 16. Power on Sequence
■ Power-down Control
Power-down and pen interrupt function are controlled by PD0 bit. In order to achieve minimum current, it is
recommended to set PD0 bit = “0” for automatic power down of the A/D converter after A/D conversion. It is possible to
reduce the variation in data by setting PD0 bit = “1” during measurements. A/D converter keeps power up after every
measurement complete.
PD0
0
1
Function
Auto Power-down Mode
A/D converter is automatically powered up at the start of the conversion, and powered down
automatically at the end of the conversion. The AK4185 is always powered down at this mode if CSN
= “H”. All touch screen driver switches except YN or BL switch are turned off and relative pins are
open state. Only YN or BL driver switch is turned ON and forced to VSS in this case. PEN interrupt
function is enabled except when in the sampling time and conversion time.
ADC ON Mode
A/D converter is always powered up while CSN = “L”. If X-axis or Y-axis is selected as analog input,
touch screen driver switches are always turned ON and the current flows through the touch plate if
CSN = “L”. This is effective if more settling time is required to suppress the electrical bouncing of
touch plate. If CSN = “H”, A/D converter is always powered down and touch screen driver switches
are always off. (Only YN or BL driver switch is turned ON and forced to VSS.) And while CSN =
“H”, PEN interrupt function is enabled. When CSN state sets from “H” to “L”, the input channel and
driver switches is set to the last setting.
Table 13. Power-down Control
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[AK4185]
■ Sleep Mode
The AK4185 supports sleep mode that puts touch panel to open state and disables pen interrupt function, effective for
reducing power consumption caused by unnecessary pen touch.
The AK4185 changes to sleep mode when the micro-controller writes to SLEEP1-0 bits of AK4185’s register. After
writing the sleep command, this sleep mode starts when the CSN pin is “H”. The AK4185 returns to normal operation out
of sleep mode when the CSN pin is “L” and receives the normal control command.
00
CSN = “L”
PENIRQN
Touch Panel
Normal Operation Normal Operation
01
Normal Operation
Normal Operation
10
Normal Operation
Normal Operation
SLEEP[1:0]
11
N/A
CSN = “H”
PENIRQN
Touch Panel
Normal Operation
Normal Operation
Disable
Open
(PENIRQN=H)
Disable
Open
(PENIRQN=Hi-z)
N/A
Table 14. Sleep Mode
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[AK4185]
CONTROL SEQUENCE
■ Touch Screen Controller Control Sequence (External Clock Mode)
In external clock mode, the AK4185 starts A/D conversion, synchronizing with the external clock (DCLK), and outputs
the real data without calculating the average value, discarding the minimum and maximum values.
(1) Single Mode (CONTINUE bit = “0”)
The timing of sampling and A/D conversion is shown in Figure 17 and Figure 18. The AK4185 is controlled via 4-wire
serial interface (CSN, SCLK, DIN, and DOUT pins). The DOUT pin changes to “L” from Hi-Z state at the falling edge of
CSN. The AK4185 latches the 8bit control word serially via the DIN pin at the rising edge of SCLK. The DIN pin must
keep low state for minimum 7SCLK times (9th-15th SCLK) after command is sent on the DIN pin. As the AK4185 starts
the command decoding at the first “H” bit after CSN = “↓”, MSB (S bit) of the command must be “H”. Tracking time is
the period from the falling edge of 5th SCLK to the falling edge of 8th SCLK. The SAR A/D conversion is synchronized
with SCLK. The AK4185 outputs 12bit or 8bit A/D data with MSB first via the DOUT pin from the falling edge of 9th
SCLK. The AK4185 can output one A/D data per 15 SCLK clock cycles for the fastest way as shown in the dotted line.
Please see “Switching Characteristics” for the detail.
CSN
1
2
3
4
5
A0
MO
6
8
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SCLK
S
DIN
A2
A1
X1
X2
PD0
Hi-Z
11
10
9
8
7
6
S
A2
A1
5
4
3
A0
2
MO
X1
1
0
X2
PD0
11
10
DOUT
Touch Screen Driver SW (Internal Node)
(DFR Mode, PD0 =”0”)
Figure 17. External Clock Mode Control Sequence (Single12bit Mode)
CSN
1
2
3
4
5
A0
MO
6
8
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SCLK
S
DIN
A2
A1
Hi-Z
X1
X2
0
7
6
5
4
3
2
S
A2
1
0
A1
A0
MO
X1
X2
PD0
7
6
DOUT
Touch Screen Driver SW (Internal Node)
(DFR Mode, PD0 =”0”)
Figure 18. External Clock Mode Control Sequence (Single 8bit Mode)
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[AK4185]
(2) Continuous Mode (CONTINUE bit = “1”)
The timing of sampling and A/D conversion is shown in Figure 19 and Figure 20. The DOUT pin changes to “L” from
Hi-Z state at the falling edge of CSN. The AK4185 latches the 8bit control word serially via the DIN pin at the rising edge
of SCLK. Tracking time is the period from the falling edge of the 5th SCLK to the falling edge of the 8th SCLK. The SAR
A/D conversion is synchronized with SCLK from the falling edge of the 9th SCLK.
If DDLY bit = “0”, the AK4185 outputs 12bit A/D data with MSB first from the falling edge of the 12th SCLK. In this
mode, the AK4185 continuously outputs A/D data according to the number of times by COUNT bit (6 or 10 times A/D
conversion) from the falling edge of the 8th SCLK per 16SCLK cycles. (12bit MSB first, LSB justified)
CSN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
9
8
7
6
5
20
21
22
23
2
1
24
25
26
27
28
29
37
38
39
40
41
42
SCLK
S
DIN
A2
A1
A0
MO
X1
X2
PD0
Hi-Z
11
10
4
3
0
11
3
2
1
0
11
10
9
8
7
6
5
4
3
2
1
0
DOUT
Data 1
Data 2
Data n
Touch Screen Driver SW (Internal Node)
(DFR Mode, PD0 =”0”)
16SCLK
16SCLK
Figure 19. External Clock Mode Control Sequence (Continuous Mode: DDLY bit = “0”)
If DDLY bit = “1”, the AK4185 outputs MSB first 12bit A/D data from the falling edge of the 9th SCLK. In this mode, the
AK4185 continuously outputs A/D data according to the number of times by COUNT bit (6 or 10 times A/D conversion)
from the falling edge of the 9th SCLK per 16SCLK cycles. (12bit MSB first, MSB justified) The A/D data output timing
is the same as Single Mode.
CSN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
9
8
7
6
5
17
18
19
20
2
1
21
22
23
24
25
26
27
28
29
37
8
0
38
39
40
41
42
SCLK
S
DIN
A2
Hi-Z
A1
A0
MO
X1
X2
PD0
11
10
4
3
0
11
10
9
11
10
9
8
7
6
5
4
3
2
1
0
DOUT
Data 1
Data 2
Data n
Touch Screen Driver SW (Internal Node)
(DFR Mode, PD0 =”0”)
16SCLK
16SCLK
Figure 20. External Clock Mode Control Sequence (Continuous Mode: DDLY bit = “1”)
If PD0 bit sets to “1” in continuous mode, A/D converter is powered up between A/D conversions. It helps A/D data
variation to decrease.
In continuous mode, when the AK4185 is executing the operation, the AK4185 ignores all control commands. The
AK4185 can receive the next control command from the rising edge of the 96th SCLK (COUNT bit = “0”) or the 160th
SCLK (COUNT bit = “1”). When the next control command is sent at the rising edge of the 97th SCLK (COUNT bit =
“0”) or the 161st SCLK (COUNT bit = “1”), the AK4185 can output one A/D data per 16 SCLK clock cycles as well as
the continuous mode.
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[AK4185]
■ Touch Screen Controller Control Sequence (Internal Clock Mode)
In internal clock mode, the AK4185 starts A/D conversion, synchronizing with the internal clock (OSCLK). The AK4185
calculates the average value, discarding the minimum and maximum values by a median averaging filter, and outputs the
results.
When the micro-processor sends the sequence start command (10101110b), the AK4185 starts the internal clock mode.
The AK4185 sets the PENIRQN pin to “L” and automatically powers up the internal oscillator. Then the AK4185
executes the sequence that selected by SEQM2-0 bits one by one. When the sequence is finished, the AK4185 sets the
PENIRQN pin to “H” and notifies that sequence is ended. After 2.8μs (typ.) is passed from the rising edge of the
PENIRQN pin, the internal oscillator is powered down and PEN interrupt function is enabled.
The micro-controller can confirm that the A/D conversion data is available by checking the PENIRQN pin or reading the
status register (SEQST1-0 bits). The micro-processor sends the read command (10101111b) to read the A/D conversion
data. Then the AK4185 outputs the A/D data in order of the register selected by SEQM1-0 bits. When the micro-processor
reads data as many as more than the actual data number, the AK4185 outputs a zero data. The A/D data is cleared after
reading all the A/D data.
Must read the A/D conversion data after confirming the PENIRQN pin turns to “H” or a register status SEQST1-0 =
“11”(Data Available). Do not read the A/D conversion data when the data is not available.
Pen
Touch
Sequence Start
Set PENIRQN Low
Start Clock
Driver Set
Wait Timer
ADC
No
Count End?
Yes
Sequence
End?
No
Yes
Set PENIRQN High
Stop Clock & PenTouch Enable
Done
Figure 21. Internal Clock Mode Control Flowchart
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[AK4185]
PENIRQN
2.8us
CSN
SCLK
S Sequent ial Mode W
DIN
S=1
DOUT
= “010111”
W=0
Hi-Z
OSCLK
Internal Sequence
(SEQM2-0 bits=“001”,
X - Y Scan)
PEN Touch
Wait
Tracking, Conversion
(X-axis 1st)
Tracking, Conversion
(X-axis 2nd)
Tracking, Conversion
(X-axis nth)
20 OSCLK
20 OSCLK
20 OSCLK
Tracking, Conversion
(Y-axis 1st)
Tracking, Conversion
(Y-axis nth)
20 OSCLK
20 OSCLK
Wait
PENIRQN
Enable
Data Available
Figure 22. Internal Clock Mode Control Sequence (X-Y Scan: SEQM bits = “001”)
(Sequence Mode Start → Internal Sequence Processing → Data Available)
PENIRQN
2.8us (typ)
CSN
SCLK
S Sequential Mode R
DIN
DOUT
(DDLY bit=0)
DOUT
(DDLY bit=1)
S=1
Hi-Z
Hi-Z
= “010111”
R=1
0 00 0
0
X-axis 12bit A/D-data
X-axis 12bit A/D-data
0000
000 0
Y-axis 12bit A/D-data
Y-axis 12bit A/D-data
000
Data Available
16 SCLK
16 SCLK
Figure 23. Internal Clock Mode Control Sequence (X-Y Scan: SEQM bits = “001”)
(Data Available → A/D Data Read)
The AK4185 can only accept the Register Read and control commands of A2-0, MODE and PD0 bits for the external
clock mode, during executing this sequence. The other commands are ignored. The micro-processor can set CSN = “H”
during the sequence. However, the AK4185 can accept sequence commands even if the AK4185 is in the sleep mode.
When the sleep mode is selected, the AK4185 goes to the sleep mode after the sequence is finished and CSN = “H”.
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[AK4185]
■ Pen Interrupt
The AK4185 has pen interrupt function to detect the pen touch. Pen interrupt function is enabled at power-down state. The
YN pin (4-wire) or BL pin (5-wire) is connected to VSS at the PEN interrupt enabled state. And the XP pin (4-wire) or
WIPER pin (5-wire) is pulled up via an internal resistor (RIRQ: typ.50kΩ). PENIRQN is connected the XP pin (4-wire) or
WIPER pin (5-wire) inside. If touch plate is pressed by a pen, the current flows via <VDD> - <Ri> - <X+> - <Y->
(4-wire). If 5-wire, via <VDD> - <Ri> - <WIPER> - <BL>. The resistance of the plate is generally 1kΩ or less,
PENIRQN is forced to “L” level. If the pen is released, PENIRQN returns “H” level because two plates are disconnected,
and the current does not flow via two plates.
If the plate is touched with a pen or finger, PENIRQN changes to “L” at CSN = “H” that PENIRQN is normality enable.
PENIRQN is disabled during executing internal sequence (please see “■ Touch Screen Controller Control Sequence
(Internal Clock Mode)”) and sleep mode is available (please see “■ Sleep Mode”).
The operation of PENIRQN is related to PD0 bit. PD0 bit is updated at the rising edge of 8th SCLK (please see “■
Power-down Control” for the detail). Therefore, the last PD0 bit is valid until this timing and during setting the setup
command. When CSN is “L”, PENIRQN is disabled during executing internal sequence (please see “■ Touch Screen
Controller Control Sequence (Internal Clock Mode)”).
i.
The period from CSN↓ to the 5th SCLK↓
The behavior of PENIRQN is related to the combination of the last selected analog input channel, and the last PD0 bit. If
the last PD0 bit was set to “0”, PENIRQN is “H” while the plate is not pressed and “L” while the plate is pressed
regardless of the last analog input. If the last PD0 bit was set to “1”, the last analog input decides the level of PENIRQN.
If the last analog input channel is touch screen (X, Y, Z1, Z2 or WIPER), PENIRQN is “L” for all the time in this period
regardless of the touched/non-touched state. On the other hand, if the last analog input channel is not touch screen
(temperature or auxiliary), PENIRQN is “H” for all the time in this period regardless of the touched/non-touched state.
ii.
The period from the 5th SCLK↓ to the 20th SCLK↓ on CSN = “L” (8bit Mode: to the 16th SCLK↓)
The behavior of PENIRQN is related to the selected analog input and the last PD0 bit. If the current PD0 bit is set to “0”
and the touch screen is selected as analog input, PENIRQN is forced to “L” regardless of the touched/non-touched state. If
the temperature or auxiliary input is selected as the input channel, PENIRQN is forced to “H” regardless of the
touched/non-touched state. If the current PD0 bit is set to “1”, PENIRQN is forced to “H” regardless of the analog input
and the touched/non-touched state.
iii.
The period from the 20th SCLK↓ to CSN↑ (8bit Mode: from the 16th SCLK↓ to CSN↑)
The behavior of PENIRQN is related to the combination of the current selected analog input channel, and the current PD0
bit. If the current PD0 bit set “0”, PENIRQN is “H” while the plate is not pressed and “L” while the plate is pressed
regardless of the current selected analog input. If the current PD0 bit set “1”, the current analog input decides the
operation of PENIRQN. If the current analog input channel is touch screen, PENIRQN is “L” for all the time in this period
regardless of the touched/non-touched state. On the other hand, if the current analog input is temperature or auxiliary
input, PENIRQN is “H” for all the time in this period regardless of the touched/non-touched state.
It is recommended that the micro controller mask the pseudo-interrupts while the control command is issued or A/D data
is output.
In continuous mode, AK4185 repeats behavior the period from the 5th SCLK↓ to the 21st SCLK↓ after output command.
Therefore, it must be noted that PENIRQN is valid only 1SCLK (equivalent the period from the 20th SCLK↓ to the 21st
SCLK↓) when PD0 bit is “0”. Generally recommend to execute continuous mode after PD0 bit is set “1”.
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[AK4185]
PENIRQN
VDD
VDD
RIRQ =
VDD
EN2
50kΩ
XP/WIPER
Driver OFF
EN1
YN/BL
Driver ON
Figure 24. PENIRQN Functional Block Diagram (WIPER does not have a driver.)
i
ii
iii
CSN
1
2
3
4
5
A0
MO
6
7
8
9
10
11
12
13
14
15
16
9
8
7
6
5
17
18
19
20
21
22
23
24
SCLK
DIN
S
A2
A1
X1
X2
PD0
11
10
4
3
2
1
0
DOUT
CONV
Internal
Figure 25. PENIRQN Functional Timing Chart
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[AK4185]
SYSTEM DESIGN
Figure 26, Figure 27 shows the system connection diagram for the AK4185. The evaluation board [AKD4185]
demonstrates the optimum layout, power supply arrangements and measurement results.
<4-wire Touch Screen Input>
4-wire
Analog Ground
Touch Screen
Digital Ground
0.01µ *
0.01µ *
0.01µ *
0.01µ *
XP
YP
XN
YN
Top View
Analog Supply
1.6∼3.6V
10µ
+
0.1µ
VDD
IN
CSN
DIN
VSS
PENIRQN
DOUT
SCLK
Auxiliary Analog Input
µP
Figure 26. Typical Connection Diagram
Notes:
- VSS of the AK4185 should be distributed separately from the ground of external controllers.
- All digital input pins (CSN, SCLK, DIN pins) must not be left floating.
- The DOUT pin is floating except when communicating with the micro-controller. Therefore, a pull-up or
pull-down resistor around 100kΩ must be connected to the DOUT pin of the AK4185.
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[AK4185]
<5-wire Touch Screen Input>
5-wire
Analog Ground
Touch Screen
Digital Ground
0.01µ *
0.01µ *
0.01µ *
0.01µ *
BR
TR
TL
BL
Top View
Analog Supply
1.6∼3.6V
10µ
+
VDD
CSN
DIN
VSS
WIPER
PENIRQN
DOUT
SCLK
0.1µ
0.01µ *
µP
Figure 27. Typical Connection Diagram
Notes:
- VSS of the AK4185 should be distributed separately from the ground of external controllers.
- All digital input pins (CSN, SCLK, DIN pins) must not be left floating.
- The DOUT pin is floating except when communicating with the micro-controller. Therefore, a pull-up or
pull-down resistor around 100kΩ must be connected to the DOUT pin of the AK4185.
1. Grounding and Power Supply Decoupling
The AK4185 requires careful attention to power supply and grounding arrangements. VDD is usually supplied from the
system’s analog supply. VSS of the AK4185 must be connected to the analog ground plane. System analog ground and
digital ground should be connected together near to where the supplies are brought onto the printed circuit board.
Decoupling capacitors should be as near to the AK4185 as possible, with the small value ceramic capacitor being the
nearest.
2. Analog Inputs
When an EMI source is close to the touch panel analog signal line, EMI noise affects analog characteristics performance.
Connect noise canceling capacitors as close as possible to each pin (XP, XN, YP, YN pins) of the AK4185 to avoid this
noise. (Figure 26, Figure 27)
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[AK4185]
PACKAGE
12pin CSP: 1.96mm x 1.46mm
Top View
Bottom View
1.96 ± 0.05
A
0.5
3
4185
XXXX
2
1
A
B
C
B
3
1.46 ± 0.05
2
1
D
D
C
B
A
0.65 ± 0.05
φ 0.3 ± 0.05
φ 0.05
M S AB
0.25 ± 0.05
S
0.08 S
■ Material & Lead finish
Package molding compound: Epoxy resin, Halogen (bromine and chlorine) free
Solder ball material: SnAgCu
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[AK4185]
MARKING
4185
XXXX
A1
XXXX: Date code identifier (4 digit)
Pin #A1 indication
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[AK4185]
REVISION HISTORY
Date (YY/MM/DD)
08/05/09
10/01/25
Revision
00
01
Reason
First Edition
Description
Addition
10/04/22
02
Specification
Addition
10/05/31
03
Specification
Addition
10/10/01
04
Description
Addition
Specification
Change
10/10/19
05
Description
Addition
Page
Contents
12, 13, 14 Digital I/F
Figure 8~15 was added.
18
Power on Sequence
Description for Power on Reset was added.
Figure 16 was added.
1, 20, 22 Description for Integrated Median Averaging Filter
was added.
5
ANALOG CHARACTERISTICS
Touch panel drivers switch on-resistance were
added: 2.5Ω (min), 15Ω (max)
5
ANALOG CHARACTERISTICS
PENIRQ pull up resistor (RIRQ) were added:
30kΩ (min), 70kΩ (max)
5
ANALOG CHARACTERISTICS
Load condition for the touch panel drivers switch
on-resistance was added: RL=300Ω
5
DC CHARACTERISTICS
Tri-state Leakage Current was changed.
max: 10μA → 3μA
min: -10μA → -3μA
28
PACKAGE
Height tolerance was added.
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice. When you consider any use or
application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM)
or authorized distributors as to current status of the products.
z Descriptions of external circuits, application circuits, software and other related information contained in this
document are provided only to illustrate the operation and application examples of the semiconductor products. You
are fully responsible for the incorporation of these external circuits, application circuits, software and other related
information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third
parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent,
intellectual property, or other rights in the application or use of such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange,
or strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or
other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use
approved with the express written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform
may reasonably be expected to result in loss of life or in significant injury or damage to person or property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places
the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer
or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all
claims arising from the use of said product in the absence of such notification.
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