MC10E111, MC100E111 5VECL 1:9 Differential Clock Driver Description The MC10E/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. It accepts one signal input, which can be either differential or else single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q outputs HIGH. The device is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within-device, and empirical modeling is used to determine process control limits that ensure consistent t pd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. The lowest TPD delay time results from terminating only one output pair, and the greatest TPD delay time results from terminating all the output pairs. This shift is about 10 – 20 pS in TPD. The skew between any two output pairs within a device is typically about 25 nS. If other output pairs are not terminated, the lowest TPD delay time results from both output pairs and the skew is typically 25 nS. When all outputs are terminated, the greatest TPD (delay time) occurs and all outputs display about the same 10 – 20 pS increase in TPD, so the relative skew between any two output pairs remains about 25 nS. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation. Features • • • • • • • • http://onsemi.com PLCC−28 FN SUFFIX CASE 776 MARKING DIAGRAM* 1 MCxxxE111G AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Guaranteed Skew Spec Differential Design VBB Output PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V Internal Input 50 KW Pulldown Resistors ESD Protection: Human Body Model; > 3 kV Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. • Moisture Sensitivity Level: • • • Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 178 devices Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 16 1 Publication Order Number: MC10E111/D MC10E111, MC100E111 Q0 Q0 Q1 VCCO Q1 Q2 Q2 25 24 23 20 19 22 21 Table 1. PIN DESCRIPTION PIN VEE 26 18 Q3 EN 27 17 Q3 IN 28 16 Q4 15 VCCO Pinout: 28-Lead PLCC (Top View) VCC 1 IN 2 14 Q4 VBB 3 13 Q5 NC 4 12 Q5 5 6 7 8 Q8 Q8 Q7 VCCO 9 10 11 Q7 Q6 Q6 IN, IN EN Q0, Q0−Q8, Q8 VBB VCC, VCCO VEE NC * All VCC and VCCO pins are tied together on the die. Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. 28−Lead Pinout Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 IN Q4 IN Q4 Q5 EN Q5 Q6 Q6 Q7 Q7 Q8 Q8 VBB Figure 2. Logic Symbol http://onsemi.com 2 FUNCTION ECL Differential Input Pair ECL Enable ECL Differential Outputs Reference Voltage Output Positive Supply Negative Supply No Connect MC10E111, MC100E111 Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit 8 V 6 −6 V V 50 100 mA mA $0.5 mA −40 to +85 °C VCC PECL Mode Power Supply VEE = 0 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V Iout Output Current Continuous Surge IBB VBB Sink/Source TA Operating Temperature Range Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm PLCC−28 PLCC−28 63.5 43.5 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board PLCC−28 22 to 26 °C/W Tsol Wave Solder 265 265 °C Pb Pb−Free VI v VCC VI w VEE Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 3 MC10E111, MC100E111 Table 3. 10E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 1) −40°C Symbol Characteristic Min 25°C Typ Max 41 60 Min 85°C Typ Max 42 60 Min Typ Max Unit 43 60 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) 3920 4030 4110 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 2) 3050 3230 3350 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage (Single−Ended) 3870 4030 4190 3870 4030 4190 3940 4110 4280 mV VIL Input LOW Voltage (Single−Ended) 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV VBB Output Voltage Reference 3.6 3.73 3.65 3.75 3.69 3.90 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) 3.4 4.6 3.4 4.6 3.4 4.6 V IIH Input HIGH Current 150 mA IIL Input LOW Current 150 0.5 150 0.5 0.25 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 3. VIHCMR min and max vary 1:1 with VCC. Table 4. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 4) −40°C Symbol Characteristic Min 25°C Typ Max 41 60 Min 85°C Typ Max 42 60 Min Typ Max Unit 43 60 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 5) −1080 −970 −890 −980 −895 −810 −910 −815 −720 mV VOL Output LOW Voltage (Note 5) −1950 −1770 −1650 −1950 −1790 −1630 −1950 −1773 −1595 mV VIH Input HIGH Voltage (Single−Ended) −1130 −970 −810 −1130 −970 −810 −1060 −890 −720 mV VIL Input LOW Voltage (Single−Ended) −1950 −1715 −1480 −1950 −1715 −1480 −1950 −1698 −1445 mV VBB Output Voltage Reference −1.40 −1.27 −1.35 −1.25 −1.31 −1.19 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 6) −1.6 −0.4 −1.6 −0.4 −0.4 V IIH Input HIGH Current 150 mA IIL Input LOW Current 150 0.5 1.6 150 0.5 0.065 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 5. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 6. VIHCMR min and max vary 1:1 with VCC. http://onsemi.com 4 MC10E111, MC100E111 Table 5. 100E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 7) −40°C Typ Max 40 60 3975 4020 4120 Output LOW Voltage (Note 8) 3190 3300 VIH Input HIGH Voltage (Single−Ended) 3835 VIL Input LOW Voltage (Single−Ended) 3190 VBB Output Voltage Reference 3.64 VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 9) 3.4 IIH Input HIGH Current IIL Input LOW Current Symbol Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Note 8) VOL Min 25°C Min 85°C Typ Max 45 60 3975 4020 4120 3380 3190 3300 3975 4120 3835 3355 3525 3190 3.75 3.62 4.6 3.4 Typ Max Unit 50 69 mA 3975 4020 4120 mV 3380 3190 3300 3380 mV 3975 4120 3835 3975 4120 mV 3355 3525 3190 3355 3525 mV 3.74 3.62 3.74 V 4.6 3.4 4.6 V 150 mA 150 0.5 Min 150 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 8. Outputs are terminated through a 50 W resistor to VCC − 2.0 V 9. VIHCMR min and max vary 1:1 with VCC. Table 6. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 10) −40°C Symbol Characteristic Min 25°C Typ Max 40 60 Min 85°C Typ Max 45 60 Min Typ Max Unit 50 69 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 11) −1025 −980 −880 −1025 −980 −880 −1025 −980 −880 mV VOL Output LOW Voltage (Note 11) −1810 −1700 −1620 −1810 −1700 −1620 −1810 −1700 −1620 mV VIH Input HIGH Voltage (Single−Ended) −1165 −1025 −880 −1165 −1025 −880 −1165 −1025 −880 mV VIL Input LOW Voltage (Single−Ended) −1810 −1645 −1475 −1810 −1645 −1475 −1810 −1645 −1475 mV VBB Output Voltage Reference −1.38 −1.25 −1.38 −1.26 −1.38 −1.26 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 12) −1.6 −0.4 −1.6 −0.4 −1.6 −0.4 V IIH Input HIGH Current 150 mA IIL Input LOW Current 150 0.5 150 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 11. Outputs are terminated through a 50 W resistor to VCC − 2.0 V 12. VIHCMR min and max vary 1:1 with VCC. http://onsemi.com 5 MC10E111, MC100E111 Table 7. AC CHARACTERISTICS VCCx = 5.0 V; VEE= 0.0 V or VCCx = 0.0 V; VEE= −5.0 V (Note 13) −40°C Symbol Min Characteristic 25°C Typ Max Min 800 Typ 85°C Max Min 800 Typ Max 800 Unit fMAX Maximum Toggle Frequency MHz tPLH tPHL Propagation Delay to Output IN (Diff) (Note 14) IN (SE) (Note 15) Enable (Note 16) Disable (Note 16) 430 380 400 400 ts Setup Time (Note 17) EN to IN 250 0 200 0 200 0 ps tH Hold Time (Note 18) IN to EN 50 −200 0 −200 0 −200 ps tR Release Time (Note 19) EN to IN 350 100 300 100 300 100 tskew Within-Device Skew (Note 20) 25 75 25 50 25 50 ps tJITTER Random Clock Jitter (RMS) <1 <2 <1 <2 <1 <2 ps VPP Minimum Input Swing 50 tr, tf Rise/Fall Time 250 ps 630 680 900 900 430 380 450 450 630 680 850 850 50 450 650 275 430 380 450 450 630 680 850 850 ps 50 375 600 275 mV 375 600 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 / +0.8 V. 14. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals. 15. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. 16. Enable is defined as the propagation delay from the 50% point of a negative transition on EN to the 50% point of a positive transition on Q (or a negative transition on Q). Disable is defined as the propagation delay from the 50% point of a positive transition on EN to the 50% point of a negative transition on Q (or a positive transition on Q). 17. The setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than $75 mV to that IN/IN transition (Figure 3). 18. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response greater than $75 mV to that IN/IN transition (Figure 4). 19. The release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified IN to Q propagation delay and output transition times (Figure 5). 20. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device. IN IN IN IN IN ts EN 50% ≤ 75mV EN Q Q Q Q 50% ≤ 75mV EN tr 50% Q Q ≤ 75mV Figure 3. Setup Time IN th ≤ 75mV Figure 4. Hold Time http://onsemi.com 6 Figure 5. Release Time 900 9 800 8 700 7 600 6 500 5 400 4 300 3 JITTER OUT ps (RMS) VOUTpp (mV) MC10E111, MC100E111 ÉÉ ÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ 200 2 (JITTER) 100 0 1 0 300 600 900 1200 1500 1800 2100 2400 FREQUENCY (MHz) Figure 6. Fmax/Jitter Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 7. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 7 MC10E111, MC100E111 ORDERING INFORMATION Package Shipping † MC10E111FN PLCC−28 37 Units / Rail MC10E111FNG PLCC−28 (Pb−Free) 37 Units / Rail MC10E111FNR2 PLCC−28 500 / Tape & Reel MC10E111FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel MC100E111FN PLCC−28 37 Units / Rail MC100E111FNG PLCC−28 (Pb−Free) 37 Units / Rail MC100E111FNR2 PLCC−28 500 / Tape & Reel MC100E111FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 8 MC10E111, MC100E111 PACKAGE DIMENSIONS PLCC−28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776−02 ISSUE E −N− 0.007 (0.180) B Y BRK T L−M M 0.007 (0.180) U M N S T L−M S S N S D Z −M− −L− W 28 D X V 1 A 0.007 (0.180) R 0.007 (0.180) C M M T L−M T L−M S S N S N S 0.007 (0.180) H N S S G J 0.004 (0.100) −T− SEATING T L−M S N T L−M S N S K PLANE F VIEW S G1 M K1 E S T L−M S VIEW D−D Z 0.010 (0.250) 0.010 (0.250) G1 VIEW S S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10_ 0.410 0.430 0.040 −−− http://onsemi.com 9 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10_ 10.42 10.92 1.02 −−− 0.007 (0.180) M T L−M S N S MC10E111, MC100E111 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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