TI CDC208DWG4 Dual 1-line to 4-line clock driver with 3-state output Datasheet

CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
D
D
D
D
D
D
D
DW PACKAGE
(TOP VIEW)
Low-Skew Propagation Delay
Specifications for Clock-Driver
Applications
TTL-Compatible Inputs and
CMOS-Compatible Outputs
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise
EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (DW)
1Y2
1Y3
1Y4
GND
GND
GND
GND
2Y1
2Y2
2Y3
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
1Y1
1A
1OE1
1OE2
VCC
VCC
2A
2OE1
2OE2
2Y4
description
The CDC208 contains dual clock-driver circuits that fanout one input signal to four outputs with minimum skew
for clock distribution (see Figure 2). The device also offers two output-enable (OE1 and OE2) inputs for each
circuit that can force the outputs to be disabled to a high-impedance state or to a high- or low-logic level
independent of the signal on the respective A input.
Skew parameters are specified for a reduced temperature and voltage range common to many applications.
The CDC208 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLES
INPUTS
OUTPUTS
1OE1
1OE2
1A
1Y1
1Y2
1Y3
L
L
L
L
L
L
1Y4
L
L
L
H
H
H
H
H
L
H
X
L
L
L
L
H
L
X
H
H
H
H
H
H
X
Z
Z
Z
Z
INPUTS
OUTPUTS
2OE1
2OE2
2A
2Y1
2Y2
2Y3
2Y4
L
L
L
L
L
L
L
L
L
H
H
H
H
H
L
H
X
L
L
L
L
H
L
X
H
H
H
H
H
H
X
Z
Z
Z
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
logic symbol†
X/Y
1OE1
18
17
1OE2
1
2
1
1
V4
2
G5
3
EN
4, 5
20
1
1A
19
4, 5
4, 5
4, 5
2OE1
3
13
8
12
9
2OE2
2A
2
10
11
14
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1OE1
18
20
1OE2
17
1
2
3
1A
2OE1
19
9
11
2
1Y3
1Y4
2Y1
12
10
2A
1Y2
13
8
2OE2
1Y1
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2Y2
2Y3
2Y4
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology
Data Book, literature number SCBD002B.
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
VCC
– 24
mA
Low-level output current
24
mA
∆t / ∆v
Input transition rise or fall rate
10
ns / V
fclock
TA
Input clock frequency
60
MHz
85
°C
High-level input voltage
2
V
0.8
Input voltage
0
0
Operating free-air temperature
– 40
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
V
V
3
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
4.5 V
IOH = – 50 µA
VOH
IOH = – 24 mA
IOH = – 75 mA†
II
IOZ
ICC
TA = 25°C
TYP
MAX
IOL = 75 mA†
VI = VCC or GND
MIN
4.4
4.4
5.5 V
5.4
5.4
4.5 V
3.94
3.8
5.5 V
4.94
∆ICC‡
One input at 3.4 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
VO = VCC or GND
0.1
0.1
0.1
0.1
4.5 V
0.36
0.44
5.5 V
0.36
0.44
V
1.65
5.5 V
± 0.1
±1
µA
5.5 V
± 0.5
±5
µA
5.5 V
8
80
µA
5.5 V
0.9
1
mA
5V
POST OFFICE BOX 655303
V
5.5 V
4
Co
5V
10
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
4
UNIT
4.8
5.5 V
IO = 0
MAX
3.85
4.5 V
IOL = 24 mA
VO = VCC or GND
VI = VCC or GND,
MIN
5.5 V
IOL = 50 µA
VOL
VCC
• DALLAS, TEXAS 75265
pF
pF
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
1A and 2A
Any Y
tPLH
tPHL
1OE1,, 1OE2,, and
2OE1, 2OE2
Any Y
tPZH
tPZL
1OE2 or 2OE2
tPHZ
tPLZ
1OE2 or 2OE2
MIN
Any Y
1OE1 or 2OE1
Any Y
1OE1 or 2OE1
TA = 25°C
TYP
MAX
MIN
MAX
5.3
8.5
10.9
5.3
11.7
3.6
7.7
11
3.6
11.5
4.7
8.5
11.7
4.7
12.8
4.4
8.4
11.3
4.4
12.4
4.4
8.1
11.3
4.4
12.4
5
9.6
13.3
5
14.9
4.2
7.4
9.3
4.2
10.2
5.4
7.5
9.2
5.4
9.9
UNIT
ns
ns
ns
ns
switching characteristics, VCC = 5 V ± 0.25 V, TA = 25°C to 70°C (see Note 3 and Figures 1 and 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
1A and 2A
Any Y
MIN
MAX
6.6
10.2
6.6
9.8
tsk(o)
1A and 2A
Any Y
NOTE 3: All specifications are valid only for all outputs switching simultaneously and in phase.
1
UNIT
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
d
Power dissipation capacitance per bank
TEST CONDITIONS
Outputs enabled
Outputs disabled
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CL = 50 pF,
pF
f = 1 MHz
TYP
96
12
UNIT
pF
5
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
2 × VCC
From Output
Under Test
500 Ω
3V
Output
Control
(low-level
enabling)
LOAD CIRCUIT FOR OUTPUTS
1.5 V
3V
1.5 V
1.5 V
0V
tPLH
Output
tPHL
VOH
50% VCC
VOL
50% VCC
tPLZ
≈ VCC
Output
Waveform 1
S1 at 2 × VCC
(see Note C)
Output
Waveform 2
S1 at 2 × VCC
(see Note C)
1.5 V
0V
tPZL
Input
(see Note B)
S1
Open
2 × VCC
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
GND
CL = 50 pF
(see Note A)
(see Note A)
S1
500 Ω
50% VCC
tPZH
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
20% VCC
VOL
tPHZ
50% VCC
80% VCC
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
Figure 1. Load Circuit and Voltage Waveforms
6
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• DALLAS, TEXAS 75265
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
1A, 2A
1Y1
tPLH1
tPHL1
tPLH2
tPHL2
tPLH3
tPHL3
tPLH4
tPHL4
tPLH5
tPHL5
tPLH6
tPHL6
tPLH7
tPHL7
tPLH8
tPHL8
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
NOTE A: Output skew, tsk(o), is calculated as the greater of:
– The difference between the fastest and slowest of tPLHn (n = 1, 2, . . . , 8)
– The difference between the fastest and slowest of tPHLn (n = 1, 2, . . . , 8)
Figure 2. Waveforms for Calculation of tsk(o)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
CDC208
DUAL 1-LINE TO 4-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS109F – APRIL 1990 – REVISED OCTOBER 1998
MECHANICAL INFORMATION
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
16
0.010 (0,25) M
9
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.293 (7,45)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
A
0.050 (1,27)
0.016 (0,40)
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
0.004 (0,10)
PINS **
16
20
24
A MAX
0.410
(10,41)
0.510
(12,95)
0.610
(15,49)
A MIN
0.400
(10,16)
0.500
(12,70)
0.600
(15,24)
DIM
4040000 / D 02/98
NOTES: A.
B.
C.
D.
8
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
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PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
CDC208DBLE
OBSOLETE
SSOP
DB
20
TBD
Call TI
CDC208DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CDC208DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CDC208DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CDC208DWRG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CDC208N
OBSOLETE
PDIP
N
20
Package
Drawing
Pins Package Eco Plan (2)
Qty
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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