STMicroelectronics M27C512-25F1 512 kbit (64k x8) uv eprom and otp eprom Datasheet

M27C512
512 Kbit (64K x8) UV EPROM and OTP EPROM
FEATURES SUMMARY
■
■
■
■
■
■
■
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
ACCESS TIME: 45ns
LOW POWER “CMOS” CONSUMPTION:
– Active Current 30mA
– Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIMES of AROUND 6sec.
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 3Dh
PACKAGES
– Lead-Free Versions
Figure 1. Packages
28
1
FDIP28W (F)
28
1
PDIP28 (B)
PLCC32 (C)
TSOP28 (N)
8 x 13.4 mm
November 2004
1/22
M27C512
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2.
Table 1.
Figure 3.
Figure 4.
Figure 5.
Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
LCC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DEVICE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Electronic Signature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Programming Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
PRESTO IIB Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ERASURE OPERATION (APPLIES FOR UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Testing Input Output Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Margin Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10.Margin Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 12. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11.Programming and Verify Modes AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/22
M27C512
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12.FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline. . . . . . . . . . . . 16
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data . . . . 16
Figure 13.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . 17
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . 17
Figure 14.PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . 18
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data . . . . . . . . . . 18
Figure 15.TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline . . . . . . . . 19
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data 19
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 17. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 18. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3/22
M27C512
SUMMARY DESCRIPTION
The M27C512 is a 512 Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applications where fast turn-around and pattern experimentation are important requirements and is
organized as 65536 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
In addition to the standard versions, the packages
are also available in Lead-free versions, in compliance with JEDEC Std J-STD-020B, the ST ECOPACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
Figure 2. Logic Diagram
VCC
16
8
A0-A15
E
Q0-Q7
M27C512
GVPP
VSS
AI00761B
Table 1. Signal Names
4/22
A0-A15
Address Inputs
Q0-Q7
Data Outputs
E
Chip Enable
GVPP
Output Enable / Program Supply
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
DU
Don’t Use
M27C512
Figure 3. DIP Connections
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
Figure 5. TSOP Connections
1
28
2
27
3
26
4
25
5
24
6
23
7
22
M27C512
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
A14
A13
A8
A9
A11
GVPP
A10
E
Q7
Q6
Q5
Q4
Q3
AI00762
GVPP
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
22
28
1
7
21
M27C512
15
14
8
A10
E
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
A1
A2
AI00764B
A7
A12
A15
DU
VCC
A14
A13
Figure 4. LCC Connections
1 32
M27C512
9
25
A8
A9
A11
NC
GVPP
A10
E
Q7
Q6
VSS
DU
Q3
Q4
Q5
17
Q1
Q2
A6
A5
A4
A3
A2
A1
A0
NC
Q0
AI00763
5/22
M27C512
DEVICE OPERATION
The modes of operations of the M27C512 are listed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPP and 12V on A9 for
Electronic Signature.
Read Mode
The M27C512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been stable for at least tAVQV-tGLQV.
Standby Mode
The M27C512 has a standby mode which reduces
the active current from 30mA to 100µA The
M27C512 is placed in the standby mode by applying a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high impedance state, independent of the GVPP input.
Table 2. Operating Modes
E
GVPP
A9
Q7-Q0
Read
VIL
VIL
X
Data Out
Output Disable
VIL
VIH
X
Hi-Z
VIL Pulse
VPP
X
Data In
Program Inhibit
VIH
VPP
X
Hi-Z
Standby
VIH
X
X
Hi-Z
Electronic Signature
VIL
VIL
VID
Codes
Mode
Program
Note: X = VIH or VIL, VID = 12V ± 0.5V.
Table 3. Electronic Signature
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer’s Code
VIL
0
0
1
0
0
0
0
0
20h
Device Code
VIH
0
0
1
1
1
1
0
1
3Dh
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power
dissipation,
b. complete assurance that output bus
contention will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
6/22
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addi-
M27C512
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devices. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Figure 6. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
SET MARGIN MODE
n=0
E = 100µs Pulse
NO
++n
= 25
YES
FAIL
NO
VERIFY
++ Addr
YES
Last
Addr
NO
YES
RESET MARGIN MODE
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
AI00738B
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C512 are in the '1'
state. Data is introduced by selectively programming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposure to ultraviolet
light (UV EPROM). The M27C512 is in the programming mode when VPP input is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V ±
0.25V. The M27C512 can use PRESTO IIB Programming Algorithm that drastically reduces the
programming time (typically less than 6 seconds).
Nevertheless to achieve compatibility with all programming equipments, PRESTO Programming
Algorithm can be used as well.
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 6.5 seconds. This can
be achieved with STMicroelectronics M27C512
due to several design innovations described in the
M27C512 datasheet to improve programming efficiency and to provide adequate margin for reliability. Before starting the programming the internal
MARGIN MODE circuit is set in order to guarantee
that each cell is programmed with enough margin.
Then a sequence of 100µs program pulses are applied to each byte until a correct verify occurs. No
overprogram pulses are applied since the verify in
MARGIN MODE provides the necessary margin.
Program Inhibit
Programming of multiple M27C512s in parallel
with different data is also easily accomplished. Except for E, all like inputs including GVPP of the parallel M27C512 may be common. A TTL low level
pulse applied to a M27C512's E input, with VPP at
12.75V, will program that M27C512. A high level E
input inhibits the other M27C512s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G
at VIL. Data should be verified with tELQV after the
falling edge of E.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27C512. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C512. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device
identifier code. For the STMicroelectronics
M27C512, these two identifier bytes are given in
Table 3. and can be read-out on outputs Q7 to Q0.
7/22
M27C512
ERASURE OPERATION (APPLIES FOR UV EPROM)
The erasure characteristics of the M27C512 is
such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range.
Research shows that constant exposure to room
level fluorescent lighting could erase a typical
M27C512 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C512 is to be
exposed to these types of lighting conditions for
extended periods of time, it is suggested that
8/22
opaque labels be put over the M27C512 window to
prevent unintentional erasure. The recommended
erasure procedure for the M27C512 is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 15 W-sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating.
The M27C512 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
M27C512
MAXIMUM RATING
Stressing the device outside the ratings listed in
Table 4. may cause permanent damage to the device. These are stress ratings only, and operation
of the device at these, or any other conditions outside those indicated in the Operating sections of
this specification, is not implied. Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability. Refer also to
the STMicroelectronics SURE Program and other
relevant quality documents.
Table 4. Absolute Maximum Ratings
Symbol
TA
Parameter
Ambient Operating Temperature
(3)
Value
Unit
–40 to 125
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
Storage Temperature
–65 to 150
°C
TLEAD
Lead Temperature during Soldering
(note 1)
°C
VIO (2)
Input or Output Voltage (except A9)
–2 to 7
V
Supply Voltage
–2 to 7
V
–2 to 13.5
V
–2 to 14
V
VCC
VA9 (2)
VPP
A9 Voltage
Program Supply Voltage
ECOPACK®
Note: 1. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assermbly), the ST
7191395 specification,
and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.
9/22
M27C512
DC AND AC PARAMETERS
This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC
and AC Characteristic tables that follow are derived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parameters.
Table 5. AC Measurement Conditions
High Speed
Standard
Input Rise and Fall Times
≤ 10ns
≤ 20ns
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
1.5V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 7. Testing Input Output Waveform
Figure 8. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
Standard
2.4V
OUT
CL
2.0V
0.8V
0.4V
AI01822
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
AI01823B
Table 6. Capacitance
Symbol
CIN
COUT
Parameter
Input Capacitance
Output Capacitance
Note: 1. TA = 25°C, f = 1MHz
2. Sampled only, not 100% tested.
10/22
Test Condition (1,2)
Min
Max
Unit
VIN = 0V
6
pF
VOUT = 0V
12
pF
M27C512
Table 7. Read Mode DC Characteristics
Symbol
Test Condition (1)
Max
Unit
0V ≤ VIN ≤ VCC
±10
µA
0V ≤ VOUT ≤ VCC
±10
µA
E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz
30
mA
E = VIH
1
mA
E > VCC – 0.2V
100
µA
VPP = VCC
10
µA
Parameter
Min
ILI
Input Leakage Current
ILO
Output Leakage Current
ICC
Supply Current
ICC1
Supply Current (Standby) TTL
ICC2
Supply Current (Standby) CMOS
IPP
Program Current
VIL
Input Low Voltage
–0.3
0.8
V
VIH (2)
Input High Voltage
2
VCC + 1
V
VOL
Output Low Voltage
IOL = 2.1mA
0.4
V
Output High Voltage TTL
IOH = –1mA
3.6
V
IOH = –100µA
VCC – 0.7V
V
VOH
Output High Voltage CMOS
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Table 8. Read Mode AC Characteristics
M27C512
Symbol
Alt
Parameter
Test Condition (1)
-45 (3)
Min
tAVQV
tACC
Address Valid to
Output Valid
tELQV
tCE
tGLQV
Max
-60
Min
-70
Max
Min
Unit
-80
Max
Min
Max
E = VIL, G = VIL
45
60
70
80
ns
Chip Enable Low to
Output Valid
G = VIL
45
60
70
80
ns
tOE
Output Enable Low
to Output Valid
E = VIL
25
30
35
40
ns
tEHQZ (2)
tDF
Chip Enable High
to Output Hi-Z
G = VIL
0
25
0
25
0
30
0
30
ns
tGHQZ (2)
tDF
Output Enable
High to Output Hi-Z
E = VIL
0
25
0
25
0
30
0
30
ns
tAXQX
tOH
Address Transition
to Output Transition
E = VIL, G = VIL
0
0
0
0
ns
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
11/22
M27C512
Table 9. Read Mode AC Characteristics
M27C512
Symbol
Alt
Parameter
Test Condition (1)
Min
tAVQV
tACC
Address Valid to
Output Valid
tELQV
tCE
tGLQV
-10
-90
Max
Min
-12
Max
Min
-15/-20/-25
Max
Min
Unit
Max
E = VIL, G = VIL
90
100
120
150
ns
Chip Enable Low to
Output Valid
G = VIL
90
100
120
150
ns
tOE
Output Enable Low
to Output Valid
E = VIL
40
40
50
60
ns
tEHQZ (2)
tDF
Chip Enable High
to Output Hi-Z
G = VIL
0
30
0
30
0
40
0
50
ns
tGHQZ (2)
tDF
Output Enable
High to Output Hi-Z
E = VIL
0
30
0
30
0
40
0
50
ns
tAXQX
tOH
Address Transition
to Output Transition
E = VIL, G = VIL
0
0
0
0
ns
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Figure 9. Read Mode AC Waveforms
A0-A15
VALID
tAVQV
VALID
tAXQX
E
tGLQV
tEHQZ
G
tELQV
Q0-Q7
tGHQZ
Hi-Z
AI00735B
12/22
M27C512
Table 10. Programming Mode DC Characteristics
Symbol
Parameter
Test Condition (1,2)
Min
VIL ≤ VIN ≤ VIH
Max
Unit
±10
µA
50
mA
50
mA
ILI
Input Leakage Current
ICC
Supply Current
IPP
Program Current
VIL
Input Low Voltage
–0.3
0.8
V
VIH
Input High Voltage
2
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.1mA
0.4
V
VOH
Output High Voltage TTL
IOH = –1mA
VID
A9 Voltage
E = VIL
3.6
11.5
V
12.5
V
Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
13/22
M27C512
Table 11. Margin Mode AC Characteristics
Test Condition (1,2)
Symbol
Alt
Parameter
Min
Max
tA9HVPH
tAS9
VA9 High to VPP High
2
µs
tVPHEL
tVPS
VPP High to Chip Enable Low
2
µs
tA10HEH
tAS10
VA10 High to Chip Enable High (Set)
1
µs
tA10LEH
tAS10
VA10 Low to Chip Enable High (Reset)
1
µs
tEXA10X
tAH10
Chip Enable Transition to VA10 Transition
1
µs
tEXVPX
tVPH
Chip Enable Transition to VPP Transition
2
µs
tVPXA9X
tAH9
VPP Transition to VA9 Transition
2
µs
Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Figure 10. Margin Mode AC Waveforms
VCC
A8
A9
tA9HVPH
tVPXA9X
GVPP
tVPHEL
tEXVPX
E
tA10HEH
tEXA10X
A10 Set
A10 Reset
tA10LEH
AI00736B
Note: A8 High level = 5V; A9 High level = 12V.
14/22
Unit
M27C512
Table 12. Programming Mode AC Characteristics
Test Condition (1,2)
Symbol
Alt
tAVEL
tAS
Address Valid to Chip Enable Low
2
µs
tQVEL
tDS
Input Valid to Chip Enable Low
2
µs
tVCHEL
tVCS
VCC High to Chip Enable Low
2
µs
tVPHEL
tOES
VPP High to Chip Enable Low
2
µs
tVPLVPH
tPRT
VPP Rise Time
50
ns
tELEH
tPW
Chip Enable Program Pulse Width (Initial)
95
tEHQX
tDH
Chip Enable High to Input Transition
2
µs
tEHVPX
tOEH
Chip Enable High to VPP Transition
2
µs
tVPLEL
tVR
VPP Low to Chip Enable Low
2
µs
tELQV
tDV
Chip Enable Low to Output Valid
tEHQZ (3)
tDFP
Chip Enable High to Output Hi-Z
0
tEHAX
tAH
Chip Enable High to Address Transition
0
Parameter
Min
Max
105
Unit
µs
1
µs
130
ns
ns
Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
3. Sampled only, not 100% tested.
Figure 11. Programming and Verify Modes AC Waveforms
A0-A15
VALID
tAVEL
tEHAX
DATA IN
Q0-Q7
DATA OUT
tQVEL
tEHQX
VCC
tEHQZ
tELQV
tVCHEL
tEHVPX
GVPP
tVPLEL
tVPHEL
E
tELEH
PROGRAM
VERIFY
AI00737
15/22
M27C512
PACKAGE MECHANICAL
Figure 12. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline
A2
A3
A1
B1
B
A
L
α
e
eA
D2
C
eB
D
S
N
∅
E1
E
1
FDIPW-a
Note: Drawing is not to scale.
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data
Symbol
millimeters
Typ
Min
A
Typ
Min
5.72
Max
0.225
A1
0.51
1.40
0.020
0.055
A2
3.91
4.57
0.154
0.180
A3
3.89
4.50
0.153
0.177
B
0.41
0.56
0.016
0.022
–
–
–
–
B1
1.45
0.057
C
0.23
0.30
0.009
0.012
D
36.50
37.34
1.437
1.470
D2
33.02
–
–
1.300
–
–
E
15.24
–
–
0.600
–
–
E1
13.06
13.36
0.514
0.526
e
2.54
–
–
0.100
–
–
eA
14.99
–
–
0.590
–
–
16.18
18.03
0.637
0.710
eB
L
3.18
4.10
0.125
0.161
S
1.52
2.49
0.060
0.098
–
–
–
–
α
4°
11°
4°
11°
N
28
∅
16/22
inches
Max
7.11
0.280
28
M27C512
Figure 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline
A2
A1
B1
B
A
α
L
e1
eA
D2
C
eB
D
S
N
E1
E
1
PDIP
Note: Drawing is not to scale.
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data
millimeters
inches
Symbol
Typ
Min
Max
Typ
A
4.445
0.1750
A1
0.630
0.0248
A2
3.810
B
0.450
0.0177
B1
1.270
0.0500
C
3.050
4.570
0.230
0.310
0.1500
Min
Max
0.1201
0.1799
0.0091
0.0122
D
36.830
36.580
37.080
1.4500
1.4402
1.4598
D2
33.020
–
–
1.3000
–
–
E
15.240
E1
13.720
12.700
14.480
0.5402
0.5000
0.5701
e1
2.540
–
–
0.1000
–
–
eA
15.000
14.800
15.200
0.5906
0.5827
0.5984
15.200
16.680
0.5984
0.6567
eB
L
0.6000
3.300
0.1299
S
1.78
2.08
0.070
0.082
α
0°
10°
0°
10°
N
28
28
17/22
M27C512
Figure 14. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline
D
D1
A1
A2
1 N
B1
E2
E3
e
E1 E
F
B
0.51 (.020)
E2
1.14 (.045)
A
D3
R
D2
CP
D2
PLCC-A
Note: Drawing is not to scale.
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data
Symbol
millimeters
Typ
Max
Min
Max
A
3.18
3.56
0.125
0.140
A1
1.53
2.41
0.060
0.095
A2
0.38
–
0.015
–
B
0.33
0.53
0.013
0.021
B1
0.66
0.81
0.026
0.032
D
12.32
12.57
0.485
0.495
D1
11.35
11.51
0.447
0.453
D2
4.78
5.66
0.188
0.223
–
–
–
–
E
14.86
15.11
0.585
0.595
E1
13.89
14.05
0.547
0.553
E2
6.05
6.93
0.238
0.273
CP
D3
Typ
0.10
7.62
0.004
0.300
E3
10.16
–
–
0.400
–
–
e
1.27
–
–
0.050
–
–
0.00
0.13
0.000
0.005
–
–
–
–
F
R
N
18/22
inches
Min
0.89
32
0.035
32
M27C512
Figure 15. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline
A2
N
1
e
E
B
N/2
D1
A
CP
D
DIE
C
A1
TSOP-a
α
L
Note: Drawing is not to scale
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data
millimeters
Symbol
Typ
Min
inches
Max
Typ
Min
Max
A
1.250
0.0492
A1
0.200
0.0079
A2
0.950
1.150
0.0374
0.0453
B
0.170
0.270
0.0067
0.0106
C
0.100
0.210
0.0039
0.0083
CP
0.100
0.0039
D
13.200
13.600
0.5197
0.5354
D1
11.700
11.900
0.4606
0.4685
–
–
–
–
E
7.900
8.100
0.3110
0.3189
L
0.500
0.700
0.0197
0.0276
α
0°
5°
0°
5°
N
28
e
0.550
0.0217
28
19/22
M27C512
PART NUMBERING
Table 17. Ordering Information Scheme
Example:
M27C512
-70 X
C
1
TR
Device Type
M27
Supply Voltage
C = 5V
Device Function
512 = 512 Kbit (64Kb x8)
Speed
-45 (1) = 45 ns
-60 = 60 ns
-70 = 70 ns
-80 = 80 ns
-90 = 90 ns
-10 = 100 ns
-12 = 120 ns
-15 = 150 ns
-20 = 200 ns
-25 = 250 ns
VCC Tolerance
blank = ± 10%
X = ± 5%
Package
F = FDIP28W
B = PDIP28
C = PLCC32
N = TSOP28: 8 x 13.4 mm
Temperature Range
1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C
Options
Blank = Standard Packing
TR = Tape and Reel Packing
E = Lead-free and RoHS Package, Standard Packing
F = Lead-free and RoHS Package, Tape and Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (speed, package,
etc.) or for further information on any aspect of this
20/22
device, please contact your nearest ST Sales Office.
M27C512
REVISION HISTORY
Table 18. Revision History
Date
Version
Revision Details
November 1998
1.0
First Issue
25-Sep-2000
1.1
AN620 Reference removed
02-Apr-2001
1.2
FDIP28W mechanical dimensions changed (Table 13.)
29-Aug-2002
1.3
Package mechanical data clarified for PDIP28 (Table 14.),
PLCC32 (Table 15., Figure 14.) and TSOP28 (Table 16., Figure 15.)
08-Nov-2004
2.0
Details of ECOPACK lead-free package options added.
Additional Burn-in option removed
21/22
M27C512
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
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22/22