Philips Semiconductors Product specification HEF4012B gates Dual 4-input NAND gate DESCRIPTION The HEF4012B provides the positive dual 4-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. Fig.2 Pinning diagram. Fig.1 Functional diagram. HEF4012BP(N): 14-lead DIL; plastic HEF4012BD(F): 14-lead DIL; ceramic (cerdip) (SOT27-1) (SOT73) HEF4012BT(D): 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS category GATES see Family Specifications January 1995 2