MGSF3454XT1 Product Preview Low RDS(on) Small-Signal MOSFETs Single N-Channel Field Effect Transistors These miniature surface mount MOSFETs utilize the High Cell Density, HDTMOS® process. Low RDS(on) assures minimal power loss and conserves energy, making this device ideal for use in small power management circuitry. Typical applications are dc−dc converters, power management in portable and battery−powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. • Low RDS(on) Provides Higher Efficiency and Extends Battery Life • Miniature TSOP−6 Surface Mount Package Saves Board Space http://onsemi.com N−CHANNEL ENHANCEMENT−MODE MOSFET RDS(on) = 50 mW (TYP) D D D D S CASE 318G−02, Style 1 TSOP 6 PLASTIC G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 30 Vdc Gate−to−Source Voltage − Continuous VGS Rating ± 20 Vdc Drain Current − Continuous @ TA = 25°C Drain Current − Pulsed Drain Current (tp ≤ 10 ms) ID A IDM 1.75 20 Total Power Dissipation @ TA = 25°C PD 950 mW Operating and Storage Temperature Range TJ, Tstg −55 to 150 °C Thermal Resistance − Junction−to−Ambient RqJA 250 °C/W TL 260 °C Maximum Lead Temperature for Soldering Purposes, for 10 seconds Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Device Marking = 3G ORDERING INFORMATION Device Reel Size Tape Width Quantity MGSF3454XT1 7″ 8 mm embossed tape 3000 MGSF3454XT3 13″ 8 mm embossed tape 10,000 This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. © Semiconductor Components Industries, LLC, 2013 May, 2013 − Rev. 1 1 Publication Order Number: MGSF3454XT1/D MGSF3454XT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 30 − − − − − − 1.0 25 − − ±100 1.0 − − − − 0.05 0.07 0.065 0.095 OFF CHARACTERISTICS V(BR)DSS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = 10 mA) Zero Gate Voltage Drain Current (VDS = 30 Vdc, VGS = 0 Vdc) (VDS = 30 Vdc, VGS = 0 Vdc, TJ = 70°C) IDSS Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) IGSS Vdc mAdc nAdc ON CHARACTERISTICS(1) Gate Threshold Voltage (VDS = VGS, ID = 250 mAdc) VGS(th) Static Drain−to−Source On−Resistance (VGS = 10 Vdc, ID = 1.75 A) (VGS = 4.5 Vdc, ID = 1.5 A) rDS(on) Vdc Ohms DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 5.0 V) Ciss − 345 − Output Capacitance (VDS = 5.0 V) Coss − 215 − pF Transfer Capacitance (VDG = 5.0 V) Crss − 140 − td(on) − 10 − tr − 15 − td(off) − 20 − tf − 10 − QT − − 15 nC IS − − 1.0 A ISM − − 5.0 A VSD − − 1.2 V SWITCHING CHARACTERISTICS(2) Turn−On Delay Time Rise Time (VDD = 10 Vdc, ID = 1.0 A, VGEN = 10 V, RL = 10 W) Turn−Off Delay Time Fall Time Gate Charge ns SOURCE−DRAIN DIODE CHARACTERISTICS Continuous Current Pulsed Current Forward Voltage(2) (1) Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. (2) Switching characteristics are independent of operating junction temperature. TYPICAL ELECTRICAL CHARACTERISTICS 7.0 0.12 R DS(on) , ON-RESISTANCE (W) VGS = 4.5 V ID , DRAIN CURRENT (AMPS) 6.0 4.0 V 5.0 4.0 3.5 V 3.0 2.0 3.0 V 1.0 2.5 V 2.25 V TJ = 150°C 0.10 VGS = 10 V 0.08 25°C 0.06 -55°C 0.04 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.02 9.0 10 1.0 0 2.0 3.0 4.0 5.0 6.0 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 1. Output Characteristics Figure 2. On−Resistance versus Drain Current http://onsemi.com 2 7.0 MGSF3454XT1 TYPICAL ELECTRICAL CHARACTERISTICS 1000 0.14 TJ = 150°C C, CAPACITANCE (pF) R DS(on) , ON-RESISTANCE (W) 0.16 0.12 VGS = 4.5 V 0.10 25°C 0.08 -55°C Ciss Coss Crss 100 VGS = 0 V f = 1.0 MHz TJ = 25°C 0.06 0.04 10 0.5 1.0 1.5 2.5 2.0 0 3.0 8.0 12 16 20 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 3. On−Resistance versus Drain Current Figure 4. Capacitance 10 24 1.4 VDS = 24 V TJ = 25°C ID = 10 A 8.0 6.0 4.0 2.0 0 0 2.0 4.0 6.0 1.3 ID = 1.5 A VGS = 4.5 V 1.2 1.1 1.0 0.9 0.8 0.7 0.6 10 8.0 -5.0 -55 45 95 145 QG, TOTAL GATE CHARGE (nC) TJ, JUNCTION TEMPERATURE (°C) Figure 5. Gate Charge Figure 6. On−Resistance versus Junction Temperature 1.6 10 ID = 6.4 A VGS = 10 V 1.5 1.4 IS, SOURCE CURRENT (AMPS) R DS(on) , ON-RESISTANCE (NORMALIZED) 4.0 ID, DRAIN CURRENT (AMPS) R DS(on) , ON-RESISTANCE (NORMALIZED) VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) 0 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 1.0 TJ = 150°C 25°C -55°C 0.1 0.01 0.001 -55 -5.0 45 95 145 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 TJ, JUNCTION TEMPERATURE (°C) VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 7. On−Resistance versus Junction Temperature Figure 8. Source−Drain Diode Forward Voltage http://onsemi.com 3 1.0 MGSF3454XT1 TYPICAL ELECTRICAL CHARACTERISTICS 2.0 1.8 0.4 1.6 V GS(th) (VOLTS) R DS(on) , ON-RESISTANCE (W) 0.5 0.3 0.2 ID = 1.75 A ID = 250 mA 1.4 1.2 1.0 0.1 0.8 0 0.6 0 1.0 2.0 3.0 4.0 6.0 5.0 7.0 8.0 9.0 10 -25 -50 0 25 50 75 100 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 9. On−Resistance versus Gate−to−Source Voltage Figure 10. Threshold Voltage 125 150 20 POWER (WATTS) 16 12 8.0 4.0 0 0.1 0.01 1.0 10 100 TIME (sec) Figure 11. Single Pulse Power NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE 1.0 DUTY CYCLE = 0.5 0.2 0.1 0.1 P(pk) 0.05 0.02 t1 t2 DUTY CYCLE, D = t1/t2 0.01 SINGLE PULSE RqJA(t) = r(t) RqJA D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TA = P(pk) RqJA(t) 0.01 0.0001 0.001 0.01 0.1 1.0 10 SQUARE WAVE PULSE DURATION (sec) Figure 12. Normalized Thermal Transient Impedance, Junction−to−Ambient http://onsemi.com 4 100 1.0 k MGSF3454XT1 INFORMATION FOR USING THE TSOP−6 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.094 2.4 0.037 0.95 0.074 1.9 0.037 0.95 0.028 0.7 0.039 1.0 inches mm TSOP−6 TSOP−6 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the TSOP−6 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max) , the maximum rated junction temperature of the die, RqJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the TSOP−6 package, PD can be calculated as follows: PD = The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. TJ(max) − TA RqJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 500 milliwatts. PD = 150°C − 25°C 250°C/W = 500 milliwatts The 250°C/W for the TSOP−6 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 500 milliwatts. There are other alternatives to achieving higher power dissipation from the TSOP−6 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 5 MGSF3454XT1 PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE V D H ÉÉÉ ÉÉÉ 6 E1 1 NOTE 5 5 2 L2 4 GAUGE PLANE E 3 L b C DETAIL Z e 0.05 M A SEATING PLANE c A1 DETAIL Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. DIM A A1 b c D E E1 e L L2 M MIN 0.90 0.01 0.25 0.10 2.90 2.50 1.30 0.85 0.20 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 2.75 3.00 1.50 1.70 0.95 1.05 0.40 0.60 0.25 BSC 10° − STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN HDTMOS is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). Thermal Clad is a registered trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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