LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 LP2954/LP2954A 5V and Adjustable Micropower Low-Dropout Voltage Regulators Check for Samples: LP2954, LP2954A FEATURES DESCRIPTION • The LP2954 is a 5V micropower voltage regulator with very low quiescent current (90 μA typical at 1 mA load) and very low dropout voltage (typically 60 mV at light loads and 470 mV at 250 mA load current). 1 2 • • • • • • • • • • 5V Output within 1.2% Over Temperature (A Grade) Adjustable 1.23 to 29V Output Voltage Available (LP2954IM and LP2954AIM) Ensured 250 mA Output Current Extremely Low Quiescent Current Low Dropout Voltage Reverse Battery Protection Extremely Tight Line and Load Regulation Very Low Temperature Coefficient Current and Thermal Limiting Pin Compatible with LM2940 and LM340 (5V Version Only) Adjustable Version Adds Error Flag to Warn of Output Drop and a Logic-Controlled Shutdown APPLICATIONS • • High-Efficiency Linear Regulator Low Dropout Battery-Powered Regulator The quiescent current increases only slightly at dropout (120 μA typical), which prolongs battery life. The LP2954 with a fixed 5V output is available in the three-lead TO-220 and DDPAK/TO-263 packages. The adjustable LP2954 is provided in an 8-lead surface mount, small outline package. The adjustable version also provides a resistor network which can be pin strapped to set the output to 5V. Reverse battery protection is provided. The tight line and load regulation (0.04% typical), as well as very low output temperature coefficient make the LP2954 well suited for use as a low-power voltage reference. Output accuracy is ensured at both room temperature and over the entire operating temperature range. Package Outline and Ordering Information Figure 1. TO-220 3–Lead Plastic Package (Front View) Figure 2. SO-8 Small Outline Surface Mount (Top View) Figure 3. TO-263 3-Lead Plastic Surface-Mount Package (Top View) Figure 4. TO-263 3-Lead Plastic Surface-Mount Package (Side View) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) Operating Junction Temperature Range LP2954AI/LP2954I −40°C to +125°C −65°C to +150°C Storage Temperature Range Lead Temperature (Soldering, 5 seconds) 260°C Power Dissipation (3) Internally Limited Input Supply Voltage −20V to +30V ESD Rating (4) (1) (2) (3) (4) 2 2 kV Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: . Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown. The junction-to-ambient thermal resistance of the TO-220 (without heatsink) is 60°C/W, 73°C/W for the DDPAK/TO-263, and 160°C/W for the SOIC-8. If the DDPAK/TO-263 package is used, the thermal resistance can be reduced by increasing the P.C. board copper area thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJA is 37°C/W; and with 1.6 or more square inches of copper area, θJA is 32°C/W. The junction-to-case thermal resistance is 3°C/W. If an external heatsink is used, the effective junction-to-ambient thermal resistance is the sum of the junction-to-case resistance (3°C/W), the specified thermal resistance of the heatsink selected, and the thermal resistance of the interface between the heatsink and the LP2954. Some typical values are listed for interface materials used with TO-220: Human body model, 200pF discharged through 1.5kΩ. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 Electrical Characteristics Limits in standard typeface are for TJ = 25°C, bold typeface applies over the −40°C to +125°C temperature range. Limits are specified by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise noted: VIN = 6V, IL = 1 mA, CL = 2.2 μF. Symbol Parameter Conditions VO 5.0 Output Voltage (1) Output Voltage Temp. Coefficient (1) Line Regulation Load Regulation VIN–VO ILIMIT Current Limit Thermal Regulation (1) (2) (3) (4) (5) (6) (7) Output Noise Voltage (10 Hz to 100 kHz) IL = 100 mA 4.975 5.025 4.950 5.050 4.940 5.060 4.900 5.100 4.930 5.070 4.880 5.120 100 150 0.03 0.10 0.20 0.20 0.40 VIN = 6V to 30V IL = 1 to 250 mA IL = 0.1 to 1 mA (3) 0.16 0.20 0.04 0.20 0.30 60 100 100 150 150 300 300 420 420 400 400 520 520 600 600 800 800 150 150 180 180 IL = 50 mA 240 IL = 100 mA 310 470 90 IL = 100 mA IL = 250 mA Ground Pin Current at Dropout (5) Max 20 IL = 50 mA IGND Min See (2) IL = 1 mA Ground Pin Current (5) 2954I Max 5.0 IL = 250 mA IGND 2954AI Min 1 mA ≤ IL ≤ 250 mA IL = 1 mA Dropout Voltage (4) en Typical 1.1 4.5 21 VIN = 4.5V VOUT = 0V 2 2 2.5 2.5 6 6 8 8 28 28 33 33 170 170 120 210 210 380 500 500 530 530 0.2 0.2 See (6) 0.05 CL = 2.2 μF 400 CL = 33 μF 260 CL=33μF (7) 80 Units V ppm/°C % % mV μA mA μA mA %/W μV RMS When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped to ground. Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested separately for load regulation in the load ranges 0.1 mA–1 mA and 1 mA–250 mA. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential. Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the load current plus the ground pin current. Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for 200 mA load pulse at VIN = 20V (3W pulse) for T = 10 ms. Connect a 0.1μF capacitor from the output to the feedback pin. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 3 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) Limits in standard typeface are for TJ = 25°C, bold typeface applies over the −40°C to +125°C temperature range. Limits are specified by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise noted: VIN = 6V, IL = 1 mA, CL = 2.2 μF. Symbol Parameter Conditions Typical 2954AI Min 2954I Max Min Max 1.245 1.255 1.205 1.190 1.255 1.270 Units Additional Specifications for the Adjustable Device (LP2954AIM and LP2954IM) VREF ΔVREF/ VREF ΔVREF/ΔT IB(FB) IGND IO(SINK) Reference Voltage Reference Voltage Line Regulation Reference Voltage Temperature Coefficient See (8) 1.230 VIN=2.5V to VO(NOM)+1V 0.03 VIN=2.5V to VO(NOM)+1V to 30V (9) See (2) VSHUTDOWN≤1.1V Output "OFF" Pulldown See Current 0.1 0.2 0.2 0.4 20 Feedback Pin Bias Current Ground Pin Current at Shutdown (5) 1.215 1.205 V % % ppm/°C 20 40 60 40 60 nA 105 140 140 μA (10) 30 20 30 20 mA Dropout Detection Comparator IOH Output "HIGH" Leakage Current VOH=30V 0.01 1 2 1 2 μA VOL Output "LOW" Voltage VIN=VO(NOM)−0.5V IO(COMP)=400μA 150 250 400 250 400 mV (11) VTHR(MAX) Upper Threshold Voltage See VTHR(MIN) See (12) HYST Lower Threshold Voltage Hysteresis See (12) −60 −80 −95 −35 −25 −80 −95 −35 −25 mV −85 −110 −160 −55 −40 −110 −160 −55 −40 mV 15 mV Shutdown Input VOS HYST IB Input Offset Voltage (Referred to VREF) Hysteresis Input Bias Current ±3 −7.5 −10 7.5 10 −7.5 −10 7.5 10 6 VIN(S/D)=0V to 5V 10 mV mV −30 −50 30 50 −30 −50 30 50 nA VREF≤VOUT≤(VIN−1V), 2.3V≤VIN≤30V, 100μA≤IL≤250mA. Two seperate tests are performed, one covering VIN=2.5V to VO(NOM)+1V and the other test for VIN=2.5V to VO(NOM)+1V to 30V. VSHUTDOWN≤1.1V, VOUT=VO(NOM). Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at VIN=VO(NOM)+1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VOUT/VREF=(R1+R2)/R2. (12) Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at VIN=VO(NOM)+1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VOUT/VREF=(R1+R2)/R2. (8) (9) (10) (11) 4 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 Table 1. Typical Values of Case-to-Heatsink Thermal Resistance (°C/W) (Data from AAVID Eng.) Silicone grease 1.0 Dry interface 1.3 Mica with grease 1.4 Table 2. Typical Values of Case-to-Heatsink Thermal Resistance (°C/W) (Data from Thermalloy) Thermasil III 1.3 Thermasil II 1.5 Thermalfilm (0.002) with grease 2.2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 5 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 6 Quiescent Current Quiescent Current Figure 5. Figure 6. Ground Pin Current vs Load Ground Pin Current Figure 7. Figure 8. Ground Pin Current Output Noise Voltage Figure 9. Figure 10. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Ripple Rejection Ripple Rejection Figure 11. Figure 12. Ripple Rejection Line Transient Response Figure 13. Figure 14. Line Transient Response Output Impedance Figure 15. Figure 16. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 7 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) 8 Load Transient Response Load Transient Response Figure 17. Figure 18. Dropout Characteristics Thermal Response Figure 19. Figure 20. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) (1) Short-Circuit Output Current and Maximum Output Current Maximum Power Dissipation (DDPAK/TO-263) (1) Figure 21. Figure 22. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: . Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown. The junction-to-ambient thermal resistance of the TO-220 (without heatsink) is 60°C/W, 73°C/W for the DDPAK/TO-263, and 160°C/W for the SOIC-8. If the DDPAK/TO-263 package is used, the thermal resistance can be reduced by increasing the P.C. board copper area thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJA is 37°C/W; and with 1.6 or more square inches of copper area, θJA is 32°C/W. The junction-to-case thermal resistance is 3°C/W. If an external heatsink is used, the effective junction-to-ambient thermal resistance is the sum of the junction-to-case resistance (3°C/W), the specified thermal resistance of the heatsink selected, and the thermal resistance of the interface between the heatsink and the LP2954. Some typical values are listed for interface materials used with TO-220: Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 9 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com APPLICATION HINTS EXTERNAL CAPACITORS A 2.2 μF (or greater) capacitor is required between the output pin and the ground to assure stability (refer to Figure 23). Without this capacitor, the part may oscillate. Most types of tantalum or aluminum electrolytics will work here. Film types will work, but are more expensive. Many aluminum electrolytics contain electrolytes which freeze at −30°C, which requires the use of solid tantalums below −25°C. The important parameters of the capacitor are an ESR of about 5Ω or less and a resonant frequency above 500 kHz (the ESR may increase by a factor of 20 or 30 as the temperature is reduced from 25°C to −30°C). The value of this capacitor may be increased without limit. At lower values of output current, less output capacitance is required for stability. The capacitor can be reduced to 0.68 μF for currents below 10 mA or 0.22 μF for currents below 1 mA. A 1 μF capacitor should be placed from the input pin to ground if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery input is used. Programming the output for voltages below 5V runs the error amplifier at lower gains requiring more output capacitance for stability. At 3.3V output, a minimum of 4.7 μF is required. For the worst case condition of 1.23V output and 250 mA of load current, a 6.8 μF (or larger) capacitor should be used. Stray capacitance to the Feedback terminal can cause instability. This problem is most likely to appear when using high value external resistors to set the output voltage. Adding a 100 pF capacitor between the Output and Feedback pins and increasing the output capacitance to 6.8 μF (or greater) will cure the problem. MINIMUM LOAD When setting the output voltage using an external resistive divider, a minimum current of 1 μA is recommended through the resistors to provide a minimum load. It should be noted that a minimum load current is specified in several of the electrical characteristic test conditions, so this value must be used to obtain correlation on these tested limits. The part is parametrically tested down to 100 μA, but is functional with no load. DROPOUT VOLTAGE The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the output voltage to stay within 100 mV of the output voltage measured with a 1V differential. The dropout voltages for various values of load current are listed under Electrical Characteristics. If the regulator is powered from a rectified AC source with a capacitive filter, the minimum AC line voltage and maximum load current must be used to calculate the minimum voltage at the input of the regulator. The minimum input voltage, including AC ripple on the filter capacitor, must not drop below the voltage required to keep the LP2954 in regulation. It is also advisable to verify operating at minimum operating ambient temperature, since the increasing ESR of the filter capacitor makes this a worst-case test for dropout voltage due to increased ripple amplitude. HEATSINK REQUIREMENTS A heatsink may be required with the LP2954 depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible operating conditions, the junction temperature must be within the range specified under Absolute Maximum Ratings. To determine if a heatsink is required, the maximum power dissipated by the regulator, P(max), must be calculated. It is important to remember that if the regulator is powered from a transformer connected to the AC line, the maximum specified AC input voltage must be used (since this produces the maximum DC input voltage to the regulator). Figure 23 shows the voltages and currents which are present in the circuit. The formula for calculating the power dissipated in the regulator is also shown in Figure 23. 10 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 *See EXTERNAL CAPACITORS PTotal = (VIN −5) IL+ (VIN) IG Figure 23. Basic 5V Regulator Circuit The next parameter which must be calculated is the maximum allowable temperature rise, TR(max). This is calculated by using the formula: TR(max) = TJ(max) − TA(max) where • • TJ(max) is the maximum allowable junction temperature TA(max) is the maximum ambient temperature (1) Using the calculated values for TR(max) and P(max), the required value for junction-to-ambient thermal resistance, θ(J-A), can now be found: θ(J-A) = TR(max)/P(max) (2) If the calculated value is 60° C/W or higher , the regulator may be operated without an external heatsink. If the calculated value is below 60° C/W, an external heatsink is required. The required thermal resistance for this heatsink can be calculated using the formula: θ(H-A) = θ(J-A) − θ(J-C) − θ(C-H) where • • • θ(J-C) is the junction-to-case thermal resistance, which is specified as 3° C/W maximum for the LP2954 θ(C-H) is the case-to-heatsink thermal resistance, which is dependent on the interfacing material (if used). For details and typical values (2) θ(H-A) is the heatsink-to-ambient thermal resistance. It is this specification (listed on the heatsink manufacturers data sheet) which defines the effectiveness of the heatsink. The heatsink selected must have a thermal resistance which is equal to or lower than the value of θ(H-A) calculated from the above listed formula (3) PROGRAMMING THE OUTPUT VOLTAGE The regulator may be pin-strapped for 5V operation using its internal resistive divider by tying the Output and Sense pins together and also tying the Feedback and 5V Tap pins together. Alternatively, it may be programmed for any voltage between the 1.23V reference and the 30V maximum rating using an external pair of resistors (see Figure 24). The complete equation for the output voltage is: (4) (2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: . Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown. The junction-to-ambient thermal resistance of the TO-220 (without heatsink) is 60°C/W, 73°C/W for the DDPAK/TO-263, and 160°C/W for the SOIC-8. If the DDPAK/TO-263 package is used, the thermal resistance can be reduced by increasing the P.C. board copper area thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJA is 37°C/W; and with 1.6 or more square inches of copper area, θJA is 32°C/W. The junction-to-case thermal resistance is 3°C/W. If an external heatsink is used, the effective junction-to-ambient thermal resistance is the sum of the junction-to-case resistance (3°C/W), the specified thermal resistance of the heatsink selected, and the thermal resistance of the interface between the heatsink and the LP2954. Some typical values are listed for interface materials used with TO-220: Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 11 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com where VREF is the 1.23V reference and IFB is the Feedback pin bias current (−20 nA typical). The minimum recommended load current of 1 μA sets an upper limit of 1.2 MΩ on the value of R2 in cases where the regulator must work with no load (see MINIMUM LOAD). IFB will produce a typical 2% error in VOUT which can be eliminated at room temperature by trimming R1. For better accuracy, choosing R2 = 100 kΩ will reduce this error to 0.17% while increasing the resistor program current to 12 μA. Since the typical quiescent current is 120 μA, this added current is negligible. * See Application Hints ** Drive with TTL-low to shut down Figure 24. Adjustable Regulator DROPOUT DETECTION COMPARATOR This comparator produces a logic “LOW” whenever the output falls out of regulation by more than about 5%. This figure results from the comparator's built-in offset of 60 mV divided by the 1.23V reference. The 5% low trip level remains constant regardless of the programmed output voltage. An out-of-regulation condition can result from low input voltage, current limiting, or thermal limiting. Figure 25 gives a timing diagram showing the relationship between the output voltage, the ERROR output, and input voltage as the input voltage is ramped up and down to a regulator programmed for 5V output. The ERROR signal becomes low at about 1.3V input. It goes high at about 5V input, where the output equals 4.75V. Since the dropout voltage is load dependent, the input voltage trip points will vary with load current. The output voltage trip point does not vary. The comparator has an open-collector output which requires an external pull-up resistor. This resistor may be connected to the regulator output or some other supply voltage. Using the regulator output prevents an invalid “HIGH” on the comparator output which occurs if it is pulled up to an external voltage while the regulator input voltage is reduced below 1.3V. In selecting a value for the pull-up resistor, note that while the output can sink 400 μA, this current adds to battery drain. Suggested values range from 100 kΩ to 1 MΩ. This resistor is not required if the output is unused. When VIN ≤ 1.3V, the error flag pin becomes a high impedance, allowing the error flag voltage to rise to its pullup voltage. Using VOUT as the pull-up voltage (rather than an external 5V source) will keep the error flag voltage below 1.2V (typical) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors (10 kΩ suggested) to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal operation. 12 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 * In shutdown mode, ERROR will go high if it has been pulled up to an external supply. To avoid this invalid response, pull up to regulator output. ** Exact value depends on dropout voltage. (See Application Hints) Figure 25. ERROR Output Timing OUTPUT ISOLATION The regulator output can be left connected to an active voltage source (such as a battery) with the regulator input power turned off, as long as the regulator ground pin is connected to ground . If the ground pin is left floating, damage to the regulator can occur if the output is pulled up by an external voltage source. REDUCING OUTPUT NOISE In reference applications it may be advantageous to reduce the AC noise present on the output. One method is to reduce regulator bandwidth by increasing output capacitance. This is relatively inefficient, since large increases in capacitance are required to get significant improvement. Noise can be reduced more effectively by a bypass capacitor placed across R1 (refer to Figure 24). The formula for selecting the capacitor to be used is: (5) This gives a value of about 0.1 μF. When this is used, the output capacitor must be 6.8 μF (or greater) to maintain stability. The 0.1 μF capacitor reduces the high frequency gain of the circuit to unity, lowering the output noise from 260 μV to 80 μV using a 10 Hz to 100 kHz bandwidth. Also, noise is no longer proportional to the output voltage, so improvements are more pronounced at high output voltages. SHUTDOWN INPUT A logic-level signal will shut off the regulator output when a “LOW” (<1.2V) is applied to the Shutdown input. To prevent possible mis-operation, the Shutdown input must be actively terminated. If the input is driven from open-collector logic, a pull-up resistor (20 kΩ to 100 kΩ recommended) should be connected from the Shutdown input to the regulator input. If the Shutdown input is driven from a source that actively pulls high and low (like an op-amp), the pull-up resistor is not required, but may be used. If the shutdown function is not to be used, the cost of the pull-up resistor can be saved by simply tying the Shutdown input directly to the regulator input. IMPORTANT: Since the Absolute Maximum Ratings state that the Shutdown input can not go more than 0.3V below ground, the reverse-battery protection feature which protects the regulator input is sacrificed if the Shutdown input is tied directly to the regulator input. If reverse-battery protection is required in an application, the pull-up resistor between the Shutdown input and the regulator input must be used. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 13 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com Typical Applications Figure 26. Typical Application Circuit Figure 27. 5V Regulator *Output voltage equals +VIN minus dropout voltage, which varies with output current. Current limits at 380 mA (typical). Figure 28. 5V Current Limiter 14 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A LP2954, LP2954A www.ti.com SNVS096D – JUNE 1999 – REVISED MARCH 2013 Schematic Diagram Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A 15 LP2954, LP2954A SNVS096D – JUNE 1999 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision C (March 2013) to Revision D • 16 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 15 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LP2954 LP2954A PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP2954AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 LP295 4AIM LP2954AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 125 LP295 4AIM LP2954AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP295 4AIM LP2954AIS NRND DDPAK/ TO-263 KTT 3 45 TBD Call TI Call TI -40 to 125 LP2954AIS LP2954AIS/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP2954AIS LP2954AISX NRND DDPAK/ TO-263 KTT 3 500 TBD Call TI Call TI -40 to 125 LP2954AIS LP2954AISX/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP2954AIS LP2954AIT/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LP2954AIT LP2954IM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 LP29 54IM LP2954IM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP29 54IM LP2954IMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP29 54IM LP2954IS/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP2954IS LP2954ISX NRND DDPAK/ TO-263 KTT 3 500 TBD Call TI Call TI -40 to 125 LP2954IS LP2954ISX/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP2954IS LP2954IT/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LP2954IT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP2954AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2954AISX DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP2954AISX/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP2954IMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2954ISX DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP2954ISX/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP2954AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LP2954AISX DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LP2954AISX/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LP2954IMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LP2954ISX DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LP2954ISX/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA NDE0003B www.ti.com MECHANICAL DATA KTT0003B TS3B (Rev F) BOTTOM SIDE OF PACKAGE www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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