CXA1870S Color TV Y/C/Jungle For the availability of this product, please contact the sales office. Description The CXA1870S is a bipolar IC which integrates the NTSC color TV luminance signal processing, chroma signal processing, sync signal processing, and RGB signal processing onto a single chip. Features • I2C bus compatible. Various types of adjustments and user controls performed with two bus lines SCL and SDA. • H and V oscillation frequencies made nonadjusting with a countdown system. • Non-adjusting Y system filters (chroma trap, delay line) • Built-in V picture distortion correction circuit • Built-in delay line aperture compensation • Auto cut-off function for automatic CRT cut-off adjustment and compensation for changes with time • Multiple inputs Composite video: 2 systems (Built-in 2-input, 1-output video switch) Y/C separation input: 1 system On screen display input: 1 system 42 pin SDIP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 1.73 W Recommended Operating Conditions Supply voltage VCC 9±0.5 V Applications • Color TV Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E95431-TE 7 9 3 SW OUT V1 IN —2— COLOR KILLER COLOR KILLER PRE OVER TOT SHARPNESS V2 IN Y IN C IN VCC 19 17 15 21 IK 14 OSD B 13 OSD G 12 OSD R 11 OSD BLK 10 CLAMP AKB R S/H V GND 8 PHASE SHIFT AXIS AKB TIMING G S/H A PED 1 3.58M VCO LPF CHROMA DET. AXIS OSD BLK BLK 20 18 16 IK B CUTOFF G CUTOFF DC SHIFT B S/H X'TAL 2 HUE PHASE DET. HUE SUB HUE REF DRIVE G DRIVE ACC DC TRAN GAMMA BRIGHT R OFF ACC DET. TOT SW COLOR GAMMA SUB BRIGHT BRIGHT ABL B OFF SUB COLOR OSD PIC OSD DYNAMIC TURE MIX COLOR DY COL LIMIT B DRIVE ABL VD 24 G OFF DELAY RGB SW BLUE V OFF V ZOOMING 23 25 RGB LIM TRAP V COUNT DOWN VEX C MODE BLACK PICTURE XRAY V.SYNC SEP 42 ABL LPF HV COMP V COMPENSATION VOSC 27 26 ABL IN BUS CONT NR H.DRIVE 28 PMUTE AUTO Y/C MIX YM DELAY SHARP NR CLAMP PEDESTAL CLAMP NESS TRAP SW H PHASE PHASE SHIFT 5 V SHIFT SUB CONT AFC HLOCK 2fH 1/32 41 V SIZE 0/6DB AMP SW GAIN PHASE DET. XRAY 29 S CORR 22 SDA V LIN 4 H SYNC IN SW REG 6 H S/S OUT PHASE DET 32 HD 32fH VCO J GND H.SYNC SEP AFC 30 VOSC REGU LATOR CERA 31 HP 33 XRAY 34 V SYNC 39 V HOLD 36 V PLS 40 V LPF IREF 35 SCL 37 V BIAS I2C BUS DECODER IREF 38 Block Diagram CXA1870S ROUT GOUT BOUT APC CXA1870S Pin Configuration X'TAL 1 42 V BIAS APC 2 41 V SYNC VCC 3 40 H SYNC V1 IN 4 39 H S/S OUT V HOLD 5 38 SDA SW OUT 6 37 SCL Y IN 7 36 REG A PED 8 35 IREF C IN 9 34 AFC V GND 10 33 CERA OSD BLK 11 32 J GND OSD R 12 31 HP OSD G 13 30 OSD B 14 29 HD R S/H 15 XRAY 28 V PLS R OUT 16 27 G S/H 17 V LPF 26 V OSC G OUT 18 25 B S/H 19 ABL LPF 24 VD B OUT 20 23 ABL IN IK 21 22 —3— V2 IN CXA1870S Pin Description Pin No. Symbol Pin voltage VCC 1 X'TAL Description Equivalent circuit 2.6 V 4k Connect a 3.58 MHz crystal oscillator. 500 1 VCC 1.2k VCC 2 2 APC 5V 3 VCC 9V 1.2k 25k APC lag-lead filter CR connection pin. Power supply pin. VCC 4 4 22 V1 IN V2 IN Video switch input pins. Sync tip clamping is performed, so input via capacitors. 150 22 2V 55k VCC 5 V HOLD 0.7 V 150 Peak hold pin for V sync separation. Connect a capacitor. 1k 5 50k —4— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit VCC SW OUT VCC 500 VCC 6 Description — Video switch output pin. 30k 12k 6 2k 25k VCC VCC 1.2k Y signal input pin. Input via a capacitor. Standard input level: 2 Vp-p 50k 7 Y IN 3.5 V 7 VCC VCC 16k 20k 1.2k VCC VCC 8 A PED 3.5 V Auto pedestal (black elongation) black peak hold pin. Connect a capacitor. 8 20k VCC 30k 9 C IN — 9 30k 6k 10 V GND 6k Chroma signal input pin. Standard input level (burst level): 570 mVp-p Video system (Y/C/RGB) GND pin. — —5— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC 15k 40k 11 60k 11 OSD BLK 60k — 60k 2k 30k 2k 30k VCC 2k 30k 2k Digital R, G and B signal input pins for on screen display. 0 to 1 V: No OSD display. 2 to 3 V: OSD level = 46 IRE (33 IRE) 4 to 6 V: OSD level = 92 IRE (65 IRE) Figures in parentheses are for when the I2C OSD register is set to 0. VCC 12 12 13 14 OSD R OSD G OSD B 13 — Blanking signal input pin for OSD RGB input. 0 to 1 V: Blanking not performed. 2 to 3 V: Signal from Y IN/C IN lowered by –6 dB. 4 to 6 V: R, G and B outputs become lower than black level. 14 VCC 15 15 17 19 R S/H G S/H B S/H 17 — 19 VCC VCC 16 18 20 R OUT G OUT B OUT — Sample-and-hold pins for R, G and B AKB (Auto Kinetic Bias). Connect to GND via capacitors. 1.2k VCC 150 16 5k 18 20 —6— R, G and B output pins. CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC 21 IK — Inputs the signal obtained by converting the CRT beam current (Ik) into voltage. Connect to an emitter follower via a capacitor. 150 21 VCC 10k 23 ABL IN — 30k 150 ABL voltage input pin. 23 VCC VCC 3k 3k VCC 24 VD — Vertical deflection sawtooth wave output pin. 15k 24 24k 5k VCC VCC VCC 25 ABL LPF 24k — 100k 25 ABL signal LPF pin. Connect a capacitor. VCC VCC VCC 100 26 V OSC — 26 100 —7— Connect a capacitor to generate the V sawtooth wave. CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC 27 V LPF 5V VCC Connect a capacitor to hold the AGC voltage which maintains the V sawtooth wave at a constant amplitude. 27 VCC VCC V pulse output pin. A negative polarity pulse 3 to 3.5 H width is output from this pin. High level: 4.5 V Low level: 0 V 74k 28 V PLS — 28 18k VCC 29 29 HD — 20k H drive output pin. This pin is output at the open collector. 20k VCC VCC VCC VCC 63k 19k 30 30 XRAY — 30k 30k 40k 27k X-ray protection circuit input pin. When a pulse with a width of 7 V or more is input, HD output becomes low and R, G and B outputs are blanked. This status is maintained until the power supply is turned off. Vilmax = 2.4 V Vihmin = 3.0 V VCC VCC 31 HP 3.3 V (at no signal) 32 J GND — VCC 10k 60k 31 H pulse input pin. Inputs a 3 to 5 Vp-p signal via a capacitor. Jungle system (H/V) GND pin. —8— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC 10k VCC 33 CERA Connect a 32 fh (503.5 kHz) ceramic oscillator. 28k 2.3 V 330 33 VCC VCC VCC 34 AFC AFC lag-lead filter CR connection pin. 40k 3.2 V 34 1.2k VCC 35 IREF 2.6 V Connect a 15 kΩ resistor between this pin and GND. 20k 150 35 VCC VCC VCC VCC VCC 40k 4p 36 36 REG 7V 1.2k Regulator pin for voltage generated internally from VCC. Connect a capacitor for stabilization. 50µA VCC 37 38 SCL SDA 37 — 4k 38 4k —9— I2C bus SCL (Serial Clock) and SDA (Serial Data) pins. Vilmax = 1.5 V Vihmin = 3 V Volmax = 0.4 V CXA1870S Pin No. Symbol Pin voltage Equivalent circuit VCC VCC 39 H S/S OUT — Description 1.2k H sync separation pulse output. A positive polarity pulse is output from this pin. High level: 4.6 V Low level: 0 V 39 23k VCC 14k 24k 40 H SYNC 150 2.6 V 20k 40 H sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. 10µA VCC 10k 26k 150 41 41 V SYNC 31k 3.4 V 10k 20µA V sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. 20k VCC 4k VCC 42 V BIAS The V oscillator reference voltage is output from this pin. 3.8 V 30k 42 20k —10— CXA1870S Electrical Characteristics Setting conditions • Ta = 25 °C VCC = 9 V • I2C bus register should be set to “I2C Bus Register Initial Settings”. No. 1 Item Current consumption 1 Symbol Measurement Measurement conditions pin 3 ICC1 Measurement method Measure the VCC pin inflow current. Min. Typ. Max. Unit 53 80 110 mA H system items No. Item 2 Horizontal free running frequency 3 Horizontal sync pull-in range Symbol Measurement Measurement conditions pin Hfree ∆H 29 Video In: Sig-H2,H3 AFCmax AFC: 0 Video In: Sig-H7 Min. Typ. Max. Unit 15.60 15.78 15.96 kHz –400 — 400 µs AFCmax=t1-t2 0.12 0.3 0.48 µs AFCcen=t1-t2 — 0.5 — µs AFCmin=t1-t2 0.75 1.2 1.75 µs 24 26 28 µs 8.7 9 — V 0.5 0.8 1.1 V –4.3 –3.3 –2.3 µs –1.5 –0.5 0.5 µs 1.3 2.3 3.3 µs — 100 — ns — 100 — ns 4 4.6 5 V 0 0.1 0.5 V 2.4 2.6 2.8 V Check that I2C register HLOCK is 1. AFC: 0 Video In: Sig-H6 4 AFC gain 1 Measurement method t1: Video In: Time from 31 fall of Sig-H6 to rise of Pin 31. AFC: 0 Video In: Sig-H6 5 AFC gain 2 AFCcen AFC: 1 Video In: Sig-H7 t2: Video In: Time from 31 fall of Sig-H7 to rise of Pin 31. AFC: 1 Video In: Sig-H6 6 AFC gain 3 AFCmin AFC: 2 Video In: Sig-H7 31 AFC: 2 7 8 9 10 11 12 13 14 15 16 HD output pulse width HD output high level HD output low level Horizontal phase operating range 1 Horizontal phase operating range 2 Horizontal phase operating range 3 HP blanking delay time 1 HP blanking delay time 2 HSS OUT high level HSS OUT low level 17 Overvoltage protection circuit VHT HD, W Video In: Sig-H1 HD, H Video In: Sig-H1 HD, L Video In: Sig-H1 HPHmax HPHcen HPHmin 29 HD,H HD,W Video In: Sig-Y11 Pin 20 HPHASE: F Video In: Sig-Y11 20 HPHASE: 7 31 Pin 31 Video In: Sig-Y11 HPH HPHASE: 0 HPBLK1 Pin 20 Video In: Sig-Y11 HPBLK2 HD,L 20 Pin 31 31 HPBLK1 HPBLK2 HSS, H 39 HSS,H HSS, L XVTH 30 HSS,L Check that HD appears at 2.4 V and disappears at 2.8 V. —11— CXA1870S V system items Item No. 18 VBias 19 V PLS high level Symbol Measurement Measurement conditions pin V Bias 42 21 22 23 24 25 26 27 VD output center voltage V SHIFT variable range 1 V SHIFT variable range 2 V SIZE variable range 1 V SIZE variable range 2 S CORR variable range 2 5 V 0 0.1 0.5 V Vb 2.75 2.9 3.05 V VSHIFT– V SHIFT: 0 Vb-VDcen –140 –125 –115 mV VSHIFT+ V SHIFT: 1F Vb-VDcen 110 120 140 mV Vc-Va 0.9 1.1 1.2 V Vc-Va 1.5 1.65 1.8 V 45 65 85 mV –55 –35 –15 mV 90 120 140 mV 60 90 110 mV 0 3 15 mV 60 80 100 mV VPLS, L VPLS, L VDcen V SHIFT: F VSIZE– V SIZE: 0 Vc Pin 24 VSIZE+ V SIZE: 3F Vsa=Va S CORR: 0 Vb ∆ Sa 29 V LIN variable range 2 ∆ Sc In: GND Va 24 Vc-Vsc VTRIG V LIN: 0 Vla=Va Vlc=Vc ∆ La 0.1ms Va-Vla V LIN: F ∆ Lc 8.75ms HV COMP: 0, 30 V zooming 1 ∆VZ1 ∆VZ2 Vc-Vlc Vsmin= 16.57ms Pin 23: 6 V 31 V zooming 2 Vsc=Vc Va-Vsa S CORR: F Video V LIN variable range 1 V 4.5 VPLS, H 28 Sig-V1 28 3.8 4 S CORR variable range 1 Min. Typ. Max. Unit Measure the pin voltage. VPLS, H Video In: Sig-V1 20 V PLS low level Measurement method Vc-Va HV COMP: 7, Vsmax= Pin 23: 6 V Vc-Va HV COMP: 0, Vsmin- Pin 23: 0 V (Vc-Va) HV COMP: 7, Vsmax- Pin 23: 0 V (Vc-Va) —12— CXA1870S Y system items No. Item 32 R output level 33 34 Sub-contrast variable range 1 Sub-contrast variable range 2 Symbol VR Measurement Measurement conditions pin Video In: Sig-Y1 Gsc, max SUBCONT: F Gsc, min SUBCONT: 0 TRAP SW: 0 35 Trap attenuation ATTtrap TRAP SW: 1 36 37 38 Sharpness Gsh, SHARP characteristics 1 max NESS: F Sharpness characteristics 2 Sharpness characteristics 3 Gsh, cen Gsh, min RGB output 39 frequency Gfreq Measurement method SHARP NESS: 7 SHARP NESS: 0 VR 16 Vsc1 Video In: Sig-Y1 Vsc2 20log 20log Vsc1 VR Vsc2 VR — 2.5 — V 2.2 2.7 3.2 dB –3.8 –33 –2.8 dB — –30 –20 dB 5.5 7.0 8.5 dB 1.5 2.5 4.5 dB –7.5 –5.5 –4.5 dB Vtr1 Video In: Sig-Y2 20log 16 Vtr2 Sig-Y4 20log 16 Video In: Vtr1 Vs2 Vs1 Vs2 (Sig-Y5) Sig-Y5 Y6 Vtr2 Vs1 (Sig-Y4) Video In: Video In: Sig- Y4, response Min. Typ. Max. Unit Vf1 (Sig-Y4) 16 18 20log –6 –3.5 0 dB 96 99 100 % 73 78 85 % Voff-Von 280 340 400 mV Voff-Von 120 170 220 mV –5.5 –4 –2.5 dB 5.5 6 6.5 dB –0.5 0 0.5 dB Vf2 (Sig-Y6) 20 Video In: Vf2 Vf1 Vdpp Sig-Y3 40 DC transmission rate 1 Gdt1 DC TRAN: 0 Video In: Sig-Y1 Video In: Sig-H1 Video In: Vdw-Vdb Vdw Vdpp Vdb 16 Vdpp Sig-Y3 41 DC transmission rate 2 Gdt2 DC TRAN: 7 Video In: Video In: 42 43 operation 1 Auto pedestal operation 2 Pin 8: 3 V Vdp1 Pin 8: 5 V Pin 8: 3 V Vdp2 Pin 8: OPEN NR: 1 44 NR operation Gnr NR: 0 45 SW gain 1 Gsw1 SW GAIN: 1 46 SW gain 2 Gsw2 SW GAIN: 0 Video In: Sig-H1 Video In: Sig-Y10 Video In: Sig-Y7 Video In: Sig-Y1 Vdpp Vdb Sig-H1 Auto pedestal Vdw-Vdb Vdw Sig-Y1 Voff 16 Von Voff 16 Von Von 20log 16 Voff Vin (Pins 4 and 22) 4, 22 6 Vout (Pin 6) —13— 20log Von Voff Vout Vin CXA1870S C system items Item No. 47 APC pull-in range 1 Symbol ∆ f, apc1 Measurement Measurement conditions pin Video-In: Sig-H1 C In: Sig-C1, C2 20 Video-In: Sig-H1 48 Carrier leak Vcl COLOR: 3F Video-In: Sig-H1 49 Residual carrier level Vrcl 20 C In: Sig-C3 COLOR: 3F SUBCOLOR: F 52 53 54 55 56 57 58 59 60 Color variable Gco, range 1 max Color variable range 2 Sub-color variable range 1 Sub-color variable range 2 Hue variable range 1 Hue variable range 2 Hue variable range 3 Sub-hue variable range 1 Sub-hue variable range 2 Gcs, min Vco0 SUB COLOR :F Detective axis R1 G1 Detective output ratio R1 Detective output ratio G1 64 Detective axis R2 Vco2 20log :Sig-C5 Vsc1 SUB COLOR 20log Vsc2 :0 ø cen ø max HUE: 3F ø min HUE: 0 ø s, max SUB HUE: F C In ø r1 Vco0 AXIS: 0 Gg1 Vco0 : Sig-C5 Video In ø r2 :Sig-H1, Detective axis G2 mV 0.6 0.9 1.2 V 5.4 6.0 6.6 dB — –50 –40 dB Vco0 2.1 2.7 3.3 dB –5.4 –3.7 –2.0 dB Vsc2 Vco0 –36 deg 20 30 40 deg –24 –18 –12 deg 7 13 19 deg 89 96 103 deg 233 240 247 deg 0.7 0.8 0.9 — 0.26 0.3 0.34 — 105 112 119 deg 245 252 259 deg 0.7 0.8 0.9 — 0.26 0.3 0.34 — 20 tan–1 Vc1-Vc2 Vc4-Vc3 Vc4 16 ∆V1 18 Vr1 90° + Vr2 tan–1 Vg1 270° – Vg2 Vx 16 18 f=100kHz Vrg Vgg Vr1 tan–1 Vx Vg2 Vg1 VBW Vx VBW 90° + Vr2 Vr1 270° – Vg1 18 Vr1 GcomaxVGW Vr2 ∆V2 : Sig-C4, Vr2 GcomaxVRW tan–1 16 ∆V1 -C3 200 –46 C In ø g2 — Vsc1 Vc2 ∆V2 C In — –56 C In :Sig-H1, mV Vc1 Vc3 Video In 50 deg : Sig-C4 Gr1 — Vco2 -C4 -C3 — 10 : Sig-C3, ø g1 Hz 0 During Sig-C4 : Sig-H1, 400 –10 Video In: Sig-H1, — During Sig-C3 ø s, min SUB HUE:0 AXIS: 1 65 C In 20log f=100kHz 20 Vco1 Video In 61 Detective axis 63 20log Vco1 Video In AXIS: 0 62 3.58 MHz component and 7.16 MHz component COLOR: 3F –400 f=3.58MHz Vco Gco, min COLOR: 0 : Sig-H1, Gsc, max AAAA A AA AA AA to 3579545 ±400 Hz and pulled in. Vrcl 50 Color output level Vco, cen 51 Check that the burst frequency is changed Vcl SUBCOLOR: F Min. Typ. Max. Unit Measurement method tan–1 Vg2 Vg1 Vg2 66 67 Detective output ratio R2 Detective output ratio G2 Video In Gr2 AXIS: 1 Gg2 Vx 16 :Sig-H1, C In Vx Vrg GcomaxVRW Vx 18 f=100kHz : Sig-C5 —14— Vgg VBW VBW GcomaxVGW CXA1870S Item No. 68 69 ACC characteristics 1 ACC characteristics 2 70 Killer point Symbol Gacc1 Measurement conditions pin Video In: Sig-H1 KP Gcf1– Sig-C6 C In:Sig-C8, -C9 Vac2 20log 0.1 1.0 dB –3 –1 0 dB 20 Check that output disappears at -38 dB –38 and appears at -30 dB. –34 –30 dB — –3 — dB — –1 — dB –2.3 — 0.2 dB –2.7 — 0.2 dB -C11 Gcf1+ Sig-H1 Vco0 Vac2 Vco0 20log Vx Vref C In: Vx Sig-C10 response 1-2 20 Chroma C In: Gcf2– TOT SW: 0 Sig-C5 response 2-1 Vref= -C11 Vx (Sig-C5) VIdeo-In: Chroma 74 frequency f=100kHz Vacl –1.0 VIdeo-In: Chroma 73 frequency 20log C In: TOT SW: 1 Sig-C5 response 1-1 72 frequency Vac1 20 Sig-C7 Video In: Sig-H1 Min. Typ. Max. Unit Measurement method C In: C In: Gacc2 Chroma 71 frequency Measurement Gcf2+ Sig-H1 C In: Sig-C10 response 2-2 RGB system items Item No. Symbol Measurement Measurement conditions pin Min. Typ. Max. Unit Measurement method 16, 18 75 Drive variable range 1 Gdr1 20 G DRIVE : 1F B DRIVE : 1F 76 77 78 79 Drive variable range 2 Picture variable range Dynamic color operation R Dynamic color operation B Gdr2 Gpic G DRIVE : 0 B DRIVE : 0 Video In : Sig-H1, Y In : Sig-R1 PICTURE : 0 Vr0 18 20 Vdr2 Gdy, r DY COL : 0 Gdy, b Sig-H1 Y In : SigR1 GAM1 Video In : Sig-H1, Gamma : 0/7 Y In : Sig- Vr1 GAM2 R1 Vdyr 20 Vdyb Vosd2 Vg2 16 Vg1 18 20 Sig-Y1 OSD BLK Vosd3 OSD : 1 85 OSD level 4 VOSD1(3) Video In : : Sig-R3 2.2 dB –5.2 –4.5 –3.3 dB –15.7 –14.7 –13.7 dB 0.7 1.5 Vr0 × 100 94.5 97 98.5 % × 100 104 106 108 % Vg1 (GAMMA: 7) –Vg1 (GAMMA: 0) Vg2 (GAMMA: 0) 10 18 26 IRE Vg2 (GAMMA: 7) –Vg2 (GAMMA: 0) Vg2 (GAMMA: 0) –8 0 8 IRE 55 65 75 IRE 23 33 43 IRE 82 92 102 IRE 36 46 56 IRE Vr0 Vdyb Vosd1 OSD : 0 84 OSD level 3 Vr1 20log Vdyr 16 (100 IRE) 83 OSD level 2 Vr0 20 Video In : GAMMA 82 OSD level 1 Vdr2 20log 16 18 (50 IRE) 81 characteristics 2 Vr0 Vdr1 Gamma 80 characteristics 1 Vdr1 20log 16 V1 18 20 Vb0 VOSD V1 × 100 VOSD2(4) V1=100IRE Vosd4 —15— CXA1870S No. 86 87 Item OSD BLK black variation OSD BLK attenuation 88 ABL threshold 89 ABL gain 1 Symbol ∆ Vosd Gosd Measurement Measurement conditions pin OSD BLK: Video In: Sig-R2 (5V) Sig-Y1 OSD BLK: Video In: Sig-R2 (3V) Sig-Y1 Vth, abl Video In: Sig-Y1 16 VD– 18 20 VOSDBLK 16 V2 V1 20log 18 20 16 Vabl1 Gabl2 ABL: 0 92 ABL black level 2 Vabl2 93 Blanking level Vblk 94 Ik clamp level Vlk, clp 95 Ik R level 96 97 98 99 Ik variable range 1 Ik variable range 2 RGB output Vref, DC range 1 max RGB output Vref, DC range 2 min 100 Bright center -R 101 Vlk, min Bright center -G, B the voltage at which picture ABL operates. Video In: Vp, 9V Vb, 5V- Vp Vb, 9V 103 range 1-G, B 105 106 107 108 109 range 2-G, B Sub-bright variable range 1-R Sub-bright variable range 1-G, B Sub-bright variable range 2-R Video In: G CUTOFF: F Sig-V1 Sub-bright variable range 2-G, B 410 mV G VIK –7 –6 –5 dB 1.1 1.2 1.3 V –3.4 –2.4 –1.4 dB 100 300 mV –8.8 –6.8 –4.8 dB –100 0 100 mV 0 0.2 0.4 V 1.25 1.35 1.45 V 0.76 0.86 0.96 V 0.2 V 200 21 Vlk,b Vlk,g Vlk,r 0.35 0.4 Vlkg, b-Vlk, r G CUTOFF: 0 Vlk,clp –0.64 –0.54 –0.44 B CUTOFF: 0 V Vsh: 4.6V (Pins 15, 3.2 16 17 and 19) 20 (Pins 15, 3.5 4.0 V 0.45 0.85 1.25 V –0.5 –0.4 –0.3 V –0.46 –0.36 –0.26 V Vref 18 Vsh: 8V 17 and 19) 16 Vsig-Vref 18 20 REFP Vsig 16 0.3 18 Vbrt1, gb Video In: 20 Sig-V1 16 18 Vbrt2, bg 20 SUB Vref 16 (BRIGHT: 1F) 0.4 V 0.27 0.32 0.37 V –0.38 –0.33 –0.28 V –0.36 –0.31 –0.26 V 0.3 0.35 0.4 V 0.27 0.32 0.37 V –0.38 –0.33 –0.28 V –0.36 –0.34 –0.26 V –Vsig 18 20 SUB 0.35 Vsig BRIGHT: 3F Vsbrt1, gb Vsbrt2, gb 16, 18, 20 Measure the R, G and B blanking levels. B CUTOFF: F Vbcen, gb Vsbrt2, r Vb, 5V- B Vbcen, r BRIGHT: 1F Vsbrt1, r Vp, 9V 9 V/5 V Video In: Sig-Y1 104 Bright variable range 2-R Vbrt2, r BRIGHT: 0 Bright variable 20log Vp, 5V Vb Pin 25: 102 Bright variable range 1-R Vbrt1, r BRIGHT: 3F Bright variable V1 Vb, 9V Vlk, r Vlk, max V2 Vary the voltage applied to Pin 23 and measure Sig-Y1 –150 190 VD VOSDBLK 16 91 ABL gain 2 Min. Typ. Max. Unit 20log Vp, 5V Gabl1 ABL: 3 90 ABL black level 1 Measurement method 16 BRIGHT: 0 18 20 —16— CXA1870S I2C bus system items No. Item Symbol Min. Typ. Max. Unit 110 High level input voltage Vih 3.0 — 5.0 V 111 Low level input voltage Vil 0 — 1.5 V 112 High level input current lih — — 10 µA 113 Low level input current lil — — 10 µA 114 Low level output voltage During current inflow of 3 mA to SDA (Pin 38) Vol 0 — 0.4 V 115 SDA inflow current lol 3 — — mA 116 Input capacitance Ci — — 10 pF 117 SCL clock frequency fscl 0 — 100 kHz 118 Time the bus must be free before a new transmission can start tbuf 4.7 — — µs 119 Hold time start condition thd;sta 4.0 — — µs 120 The Low period of the clock tlow 4.7 — — µs 121 The High period of the clock thigh 4.0 — — µs 122 Set up time for start condition tsu;sta 4.7 — — µs 123 Hold time data thd;dat 5 — — µs 124 Set-up time data tsu;dat 250 — — ns 125 Rise time of both SDA and SCL lines tr — — 300 ns 126 Fall time of both SDA and SCL lines tf — — 300 ns 127 Set-up time for stop condition tsu;sto 4.7 — — µs —17— CXA1870S Signals Used for Measurements H system 63.556µs SIG-H1 4.8µs fH=15.734kHz 0.57V 61.98µs SIG-H2 4.65µs fH+400Hz 0.57V 65.215µs SIG-H3 4.96µs fH–400Hz 0.57V 59.759µs SIG-H4 4.51µs fH+1kHz 0.57V 67.870µs SIG-H5 5.13µs fH–1kHz 0.57V 62.563µs SIG-H6 4.73µs fH+250Hz 0.57V 64.583µs SIG-H7 4.88µs 0.57V fH–250Hz —18— CXA1870S V system Equalizing pulse 3H Vsync 3H Equalizing pulse 3H SIG-v1 fV=fH / 262 4.8µs Equalizing pulse interval 1/2H 1H=63.556µs Vsync interval 1/2H —19— 2.5µs CXA1870S Y system 1.7µs 1.43V 9.5µs SIG-Y1 4.8µs 0.57V 0.7V f = 3.58MHz SIG-Y2 1.7µs 9.5µs 1.43V 26µs SIG-Y3 4.8µs 0.57V 0.7V f = 100kHz SIG-Y4 0.7V f = 3MHz SIG-Y5 —20— CXA1870S 0.7V SIG-Y6 f = 8MHz 0.28V SIG-Y7 f = 5 MHz 1.4V SIG-Y8 f = 5MHz 0.7V SIG-Y9 f = 9 MHz 0.14V SIG-Y10 6.6µs 9.8µs 1.43V 4.8µs 0.57V SIG-Y11 63.556µs —21— CXA1870S C system 63.556µs SIG-H1 fH = 15.734kHz 4.8µs 1.7µs 0.57V 0.5µs fsc+400Hz fsc+100kHz, 0.1Vp-p SIG-C1 0.5Vp-p 3µs fsc–400Hz fsc+100kHz, 0.1Vp-p SIG-C2 0.5Vp-p fsc0° fsc+90°, 0.3Vp-p fsc–90°, 0.3Vp-p SIG-C3 0.5Vp-p fsc0° 35.5µs fsc+0°, 0.3Vp-p fsc+180°, 0.3Vp-p SIG-C4 0.5Vp-p fsc 35.5µs fsc+100kHz, 0.5Vp-p SIG-C5 0dB 0.5Vp-p fsc fsc+100kHz, 1.0Vp-p SIG-C6 6dB 1Vp-p —22— CXA1870S 63.556µs SIG-H1 4.8µs 1.7µs 0.57V fH = 15.734kHz 0.5µs fsc fsc+100kHz, 50mVp-p SIG-C7 –20dB 50mVp-p 3µs fsc fsc+100kHz, 32mVp-p SIG-C8 –30dB 32mVp-p fsc fsc+100kHz, 5mVp-p –40dB SIG-C9 5mVp-p fsc fsc+500kHz, 0.1Vp-p SIG-C10 0.5Vp-p fsc fsc–500kHz, 0.1Vp-p SIG-C11 0.5Vp-p —23— CXA1870S RGB system 1.43Vp-p 0.7Vp-p SIG-R1 3V or 5V SIG-R2 5V 2.5V SIG-R3 —24— CXA1870S Measurement Method I2C Bus Register Initial Settings Register name PICTURE RGB LIM HUE IN SW COLOR SW GAIN BRIGHT NR ON SHARPNESS SUB CONT SUB HUE SUB COLOR SUB BRIGHT TRAP ON TOT ON PIX ON R ON G ON B ON PRE OVER AXIS No. of Initial Description bits setting 6 3FH Maximum value 2 3H Maximum value 6 1FH Center point 1 0H V1 IN selected 6 1FH Center point 1 0H 0 dB gain 6 1FH Center point 1 0H NR OFF 4 7H Center point 4 7H Center point 4 7H Center point 4 7H Center point 6 1FH Center point 0H TRAP OFF 1 0H TOT OFF 1 1H Picture mute OFF 1 1H R output ON 1 1H G output ON 1 1H B output ON 1 0H Minimum value 3 0H JAPAN detective axis 1 Register name BLACK DYCOL OFF REF ABL BLUE OSD G DRIVE DC TRAN B DRIVE GAMMA G CUTOFF B CUTOFF H PHASE V ON V EX OFF AFC V SHIFT HV COMP V SIZE C MODE V LIN SCORR —25— No. of Initial Description bits setting 1 0H BLACK OFF 1 1H DY COL OFF 2 1H Center point 2 0H Minimum value 1 0H BLUE OFF 1 0H Luminance level small 5 FH Center point 3 0H Minimum value 5 FH Center point 3 0H Correction OFF 4 7H Center point 4 7H Center point 4 7H Center point 1H VD output ON 1 1H V sync elongation OFF 1 1H Center point 2 FH Center point 5 3H Center point 3 1FH Center point 6 0H Countdown ON 1 7H Center point 4 7H Center point 4 CXA1870S Electrical Characteristics Measurement Circuit 3.3k 100p 12p 2.2k 10k 1 V BIAS 42 X'TAL 470p 330 VCC 9V 2 APC V SYNC 41 3 VCC H SYNC 40 220k 0.47µ 15k 47µ 1µ 560 0.01µ 4700p 0.22µ 4 V1 IN H S/S OUT 39 330k VIDEO IN SDA 38 5 V HOLD 6 SW OUT SCL 37 7 Y IN REG 36 8 A PED IREF 35 9 C IN AFC 34 10 V GND 0.47µ I2 C 2.2K 4.7µ 0.22µ 4.7µ 3/5 V 15k 0.01µ 5.6k 2.2µ CERA 33 500 kHz ceramic oscillator J GND 32 11 OSD BLK 12 OSD R HP 31 13 OSD G XRAY 30 14 OSD B HD 29 HP GEN. CXA1870S C IN 2.2k 0.1µ ∗ 6.7V 15 R S/H V PLS 28 0.1µ film 16 R OUT V LPF 27 0.1µ ∗ 0.22µ film 17 G S/H 18 G OUT V OSC 26 4.7µ ABL LPF 25 9/5 V 0.1µ ∗ 19 B S/H VD 24 0/6V CRT DRIVE ∗Pin 15, 17, 19 and 21 switches are ON only for electrical characteristic measurements No. 93 to 96. X RAY 0V ∗ 20 B OUT 21 IK ABL IN 23 V2 IN 22 0.22µ 10µ —26— CXA1870S Reference Circuit CRT Drive Circuit +9V 1.1k 110k 1.1k 2SA 1175 110k 1.1k 2SA 1175 2SC 2785 2SC 2785 110k 2SA 1175 68k to IK of the IC 2SC 2785 100 1k 2SC 2785 470 100 2SC 2785 100 1k 470 1k 2SA1175 2SC 2785 47k 470 GND from Pins R, G and B OUT of the IC HP Gen +9V 10k Pulse width 12 µs 68 k 1µ 3.3k 0.022µ HP 1000 p 6.8k 16 15 14 13 12 11 10 9 6 7 8 4538 1 2 3 4 5 470p HD 10k Delay 10µs —27— CXA1870S Application Circuit 3.3k 3.58MHz X'TAL 12p 2.2k 100p 10k 1 X'TAL V BIAS 42 2 APC V SYNC 41 470p 330 0.47µ 15k +9V 47µ 220k 3 H SYNC 40 VCC 0.01µ 560 4700 p 0.22µ Composite video 1 input 1µ H SYNC SEP output H S/S OUT 39 4 V1 IN 5 V HOLD SDA 38 6 SW OUT SCL 37 7 Y IN REG 36 8 A PED IREF 35 9 C IN AFC 34 330k 220 0.47µ I 2C 220 2.2k 4.7µ 0.22µ 4.7µ 15k 0.01µ 5.6k 2.2µ 10 V GND CERA 33 500 kHz ceramic oscillator 220 J GND 32 11 OSD BLK OSD inputs 2.2k 1µ 220 12 OSD R 13 OSD G HP H pulse input 31 10k 220 XRAY 30 1µ X-ray protection circuit input 220 HD 14 OSD B 29 100p 0.1µ film 15 R S/H V PLS 28 V pulse output 0.1µ film 220 16 R OUT V LPF 27 0.1µ film 0.22µ film V OSC 26 17 G S/H 18 G OUT 4.7µ 220 RGB outputs H drive output ABL LPF 25 0.1µ film 19 B S/H VD 24 ABL IN 23 220 1.5k 20 47k 10k Ik input V drive output B OUT ABL input 1µ 0.47µ 21 V2 IN 22 IK 0.22µ 100 Composite Video 2 input 47p Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —28— CXA1870S Description of Operation 1. Synchronizing and picture distortion correction systems The video signals (2 Vp-p standard) input to Pins 40 and 41 are led to the horizontal and vertical sync separation circuits for sync separation. The horizontal sync signal is output from Pin 39 with positive polarity. This horizontal sync signal is compared with the signal obtained by 1/32 frequency dividing the 32 fH VCO output using the ceramic oscillator (frequency: 503.5 kHz) to detect a phase difference. The error voltage resulting from the phase difference is applied to the H oscillator after attenuating the medium and high frequency components by a lag-lead filter. The phase of the H oscillator output is compared and shifted to match the phase of the H deflection pulse (flyback pulse) input from Pin 31, and then output from Pin 29. After the vertical sync signal is synchronized to the input signal by the V countdown system, a sawtooth wave is generated by charging and discharging the capacitor attached externally to Pin 26. AGC is performed to ensure that the amplitude of the sawtooth wave is maintained constant regardless of the vertical frequency of the input, after which the sawtooth wave passes through the picture distortion correction circuit and is output from Pin 24. Note that there is no need to adjust the free running frequency for either the H or V oscillator. When voltage of 3 V or more is applied to Pin 30, the H drive output is held at low level. A time constant circuit is included to protect against overvoltages, and H drive is output normally when high voltage input continues for less than 7 V cycles. To release holddown, the IC must be turned off and then started up again. Note) When the external capacitance at Pin 27 is used with 0.1 µF below of recommended value, VD output at Pin 24 may be unstable. When changing capacitance value, use it more than 0.047 µF. 2. Y/C system The Y/C system has the following three input systems. Composite video input (1 Vp-p/2 Vp-p) 2 systems (The gain can be switched between 0 and 6 dB for both systems.) Y/C separation input (2 Vp-p) 1 system The Y signal (specified input level 2 Vp-p) input to Pin 7 is passed through the sub-contrast control, chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits. The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits again, and input to the RGB interface system block. Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system frequency response is approximately 8 MHz, –3 dB for R, G and B outputs. Sharpness control is delay line type with a variable PRE/OVER ratio. Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal black peak held by Pin 8 becomes the pedestal level. The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 9 is passed through the ACC, TOT, color control (saturation control) and killer detection circuits, after which the burst locked VCO oscillation output is detected as the carrier. (The detective output LPF is a quadruple.) —29— CXA1870S The signal is then separated into color difference signals R-Y, B-Y and G-Y by the matrix circuit, passed through the Y/C MIX circuit, and input together with the Y signal to the RGB interface system block. The detective axis (Japan/US) can be switched by the I2C bus register. 3. RGB interface system YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from Pin 11. 0 to 1.5 V TV (Y/C input) 1.5 to 3.5 V TV –6 dB 3.5 to 5.5 V Black The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0 to 5 V DC) input from Pins 12, 13 and 14, passed through the dynamic color, gamma correction, bright control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins 16, 18 and 20 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting value can be controlled with the I2C bus register. The digital R, G and B signals are mainly used for on screen display of channels, etc. and the display level can be set with the I2C bus register. The signal input to Pin 23 (ABL IN) is compared with the internal reference voltage and is then integrated by the capacitor connected to Pin 25 (ABL LPF) for picture and brightness control. Picture ABL mode and combined picture ABL and brightness ABL mode can be switched with the I2C bus register. Note) When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 11, 12, 13 and 14 to GND. Auto cut-off For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side DC level control) are involved. This IC uses the I2C bus register for drive control. For cut-off control, a loop is formed between the IC and CRT to achieve auto cut-off control. This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I2C bus register. The auto cut-off loop is configured as described below. (1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to the top of the picture. (2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 21. (3) The voltage input to Pin 21 is compared with the reference voltage in the IC to change the DC level of the reference pulses. The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances connected to Pins 15, 17 and 19 hold the DC shift level during the 1 V period. If the voltage at any one of Pins 15, 17 or 19 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to blank the R, G and B outputs with the I2C bus register. The positions of the reference pulses can be changed by the I2C bus register. —30— CXA1870S Definition of I2C Bus Registers Slave addresses 88H: Slave receiver 89H: Slave transmitter Register table • All registers are set to 0 when the IC power is turned on. • “X” indicates “don’t care”; “∗” indicates undefined. Control registers Sub Address bit 7 bit 6 bit 5 XXXX0000 bit 4 bit 3 bit 2 bit 1 PICTURE XXXX0001 HUE XXXX0010 COLOR XXXX0011 BRIGHT XXXX0100 SHARPNESS XXXX0101 SUB HUE RGB LIM R ON XXXX1000 BLACK DY COL OFF SW GAIN TRAP ON TOT ON IN SW NR ON SUB CONT SUB BRIGHT PIX ON ∗ ∗ ∗ SUB COLOR XXXX0110 XXXX0111 bit 0 G ON B ON PRE OVER REF AXIS ABL BLUE OSD XXXX1001 G DRIVE DC TRAN XXXX1010 B DRIVE GAMMA XXXX1011 G CUTOFF B CUTOFF XXXX1100 H PHASE XXXX1101 VSHIFT HV COMP XXXX1110 V SIZE 0 C MODE XXXX1111 V LIN V ON VEX OFF AFC S CORR Status register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit0 H LOCK IK KILLER XRAY 0 0 0 0 —31— CXA1870S Description of I2C Bus Registers Sub Address 0000 PICTURE (6): Picture control 0 = Minimum 63 = Maximum RGB LIM (2): RGB output amplitude limiter voltage control 0 = Limited at 4.9 V (with a black level of 2 V) 1 = Limited at 5.1 V (with a black level of 2 V) 2 = Limited at 5.3 V (with a black level of 2 V) 3 = Limited at 5.5 V (with a black level of 2 V) Sub Address 0001 HUE (6): Hue control 0 = Skin color nearer to red 63 = Skin color nearer to green IN SW (1): Input selector switch 0 = V1 IN 1 = V2 IN Sub Address 0010 COLOR (6): Color control 0 = Minimum 63 = Maximum SW GAIN (1): Switch output gain switching 0 = SW GAIN 0 dB 1 = SW GAIN 6 dB Sub Address 0011 BRIGHT (6): Brightness control 0 = Minimum 63 = Maximum NR ON (1): Y signal noise reduction ON/OFF 0 = OFF 1 = ON Sub Address 0100 SHARPNESS (4): Sharpness control 0 = Minimum 15 = Maximum SUB CONT (4): Sub-contrast control 0 = Minimum 15 = Maximum —32— CXA1870S Sub Address 0101 SUB HUE (4): Hue center control 0 = Skin color nearer to red 15 = Skin color nearer to green SUB COLOR (4): Color center control 0 = Minimum 15 = Maximum Sub Address 0110 SUB BRIGHT (6): Sub-bright control 0 = Minimum 63 = Maximum TRAP ON (1): Chroma trap in Y system ON/OFF 0 = OFF 1 = ON TOT ON (1): Chroma TOT filter ON/OFF 0 = OFF 1 = ON Sub Address 0111 PIX ON (1): Picture mute ON/OFF 0 = Picture mute (Auto cut-off reference pulse also muted.) 1 = Picture mute released. R ON (1): R OUT ON/OFF 0 = R OUT OFF 1 = R OUT ON G ON (1): G OUT ON/OFF 0 = G OUT OFF 1 = G OUT ON B ON (1): B OUT ON/OFF 0 = B OUT OFF 1 = B OUT ON PRE OVER (3): Sets the sharpness preshoot and overshoot ratio. 0 = Pre Shoot 100 %, Over Shoot 0 % 7 = Pre Shoot 25 %, Over Shoot 75 % AXIS (1): Detective axis switching 0 = JAPAN 1 = USA —33— CXA1870S Sub Address 1000 BLACK (1): Blanks the Y IN/C IN signals and sets the R, G and B outputs to black level. 0 = OFF 1 = ON DY COL OFF (1): Dynamic color ON/OFF 0 = Dynamic color ON 1 = Dynamic color OFF REF (2): Switches the auto cut-off reference pulse position. 0 = B-18H G-19H R-20H 1 = B-20H G-21H R-22H 2 = B-22H G-23H R-24H 3 = B-24H G-25H R-26H ABL (2): ABL mode setting 0 = Picture ABL mode (including protective bright ABL) 1 = Combined picture ABL and bright ABL mode (bright ABL low) 2 = Combined picture ABL and bright ABL mode (bright ABL medium) 3 = Combined picture ABL and bright ABL mode (bright ABL high) BLUE (1) On screen display B IN ON/OFF. Setting to ON turns the entire screen blue. 0 = OFF 1 = ON OSD (1): On screen display luminance setting 0 = Level small 1 = Level large Sub Address 1001 G DRIVE (5): G OUT drive control 0 = Minimum 31 = Maximum DC TRAN (3): DC transmission ratio setting 0 = Maximum (100 %) 7 = Minimum(75 %) Sub Address 1010 B DRIVE (5): B OUT drive control 0 = Minimum 31 = Maximum GAMMA (3): γ correction value setting 0 = Correction OFF 7 = Maximum correction —34— CXA1870S Sub Address 1011 G CUTOFF (4): G OUT cut-off voltage control 0 = Minimum 15 = Maximum B CUTOFF (4): B OUT cut-off voltage control 0 = Minimum 15 = Maximum Sub Address 1100 H PHASE (4): Horizontal position control 0 = Screen shifted to right 15 = Screen shifted to left V ON (1): VD output ON/OFF 0 = VD output stopped. (Picture mute applied simultaneously. Auto cut-off reference pulse also muted.) 1 = VD output V EX OFF (1): V sync elongation ON/OFF 0 = V sync elongation ON 1 = V sync elongation OFF AFC (2): AFC loop gain switching 0 = AFC loop gain large 1 = AFC loop gain medium 2 = AFC loop gain small 3 = AFC loop open, free running mode Sub Address 1101 V SHIFT (5): Vertical position control 0 = Rise 31 = Lower HV COMP (3): Vertical correction amount setting for high voltage fluctuations 0 = Correction amount minimum 7 = Correction amount maximum Sub Address 1110 V SIZE (6): Vertical amplitude control 0 = V size minimum 63 = V size maximum C MODE (1): V countdown system mode switching 0 = Non-standard signal mode, standard signal mode and no signal mode switched automatically. 1 = Fixed to non-standard signal mode (wide V sync window mode). —35— CXA1870S Sub Address 1111 V LIN (4): Vertical linearity control 0 = Top of screen compressed, bottom of screen expanded. 15 = Top of screen expanded, bottom of screen compressed. S CORR (4): Vertical S correction control 0 = S correction amount minimum 15 = S correction amount maximum H LOCK (1): Returns whether the H oscillator of the IC and the signal input to H SYNC are locked. 0 = Not locked 1 = Locked IK (1): Returns the AKB loop stable status by detecting the IK current. 0 = IK current stable for each of R, G and B 1 = IK current unstable KILLER (1): Returns the color killer ON/OFF status. 0 = OFF 1 = ON XRAY (1): Returns the X-ray protection status. 0 = OFF (X-ray protection is not functioning.) 1 = ON (X-ray protection is functioning.) —36— CXA1870S 8.0 2.0 6.0 TOT SW = 1 0 –2.0 2.0 (dB) Attenuation (dB) 4.0 0 –4.0 TOT SW = 0 –6.0 –2.0 –8.0 –4.0 SHARPNESS = F SHARPNESS = 7 SHARPNESS = 0 –6.0 0 1 2 3 4 5 6 7 –10.0 8 Frequency (MHz) –800 –600 –400 –200 0 Fig 1. Sharpness characteristics Output amplitude (black to white) (Vp-p) Attenuation (dB) –10 –20 TRAPSW = 0 TRAPSW = 1 –30 1 2 3 4 5 6 7 8 Output amplitude (Vp-p) Fig 3. Trap F0 frequency characteristics 0.5 Input frequency (MHz) 1.0 GAMMA = 7 GAMMA = 3 GAMMA = 0 20 40 60 80 Fig 5. Gamma characteristics 100 ∆fsc (kHz) fsc = 3.58MHz 1.0 2.0 0 800 Fig 2. Chroma frequency characteristics 0 0 200 400 600 Input amplitude (IRE) —37— Input: IRE changed at Full Flat Output: R OUT DYCOL= AKB=OFF GAMMA=DCTRAN=0 0 10 20 30 40 50 Fig 4. Auto pedestal characteristics 60 Input amplitude (IRE) 3.0 1.0 Gch = Bch = +1.5dB 2.5 IK level (Vp-p) Output amplitude (black to white) (Vp-p) CXA1870S Gch = Bch = –4.5dB 2.0 Input: Y IN 1.4Vp-p (black to white) Output: adjust to be 2.5Vp-p at R OUT +3.0dB Rch = 0.86 Vp-p –8.3dB Input: Y IN all black 0.5 AKB = ON DYCOL = AKB = OFF DCTRAN = 0 1.5 0 7 F Output: IK (Pin 21) 17 1F 0 5 G, B drive data (HEX) Fig 6. G, B drive characteristics A Fig 7. Cutoff control characteristics F G, B cutoff data (HEX) VD-output amplitude (Vp-p) 1.4 1.35 Output: VD (Pin 24) HV COMP = 7 1.3 Output amplitude (black to white) (Vp-p) 3.0 2.0 Input: YIN 1.4Vp-p (black to white) Output: ROUT 1.0 SUBCONT = 7 DYCOL = AKB = OFF DCTRAN = 0 Variable range 14.7dB 0 2 4 6 8 10 Fig 8. HV COMP characteristics ABL IN 0 Applied voltage (V) —38— 8 10 18 20 28 30 Fig 9. Picture control data (HEX) 38 3F CXA1870S 2.5 ABL0 2.0 1.8 Output black level (V) Output amplitude (white to black) (Vp-p) ABL3 1.5 ABL0 1.0 Input YIN 2.0Vp-p R OUT 1.6 ABL3 1.4 PIC = 3F SUBCONT = 7 0.5 1.2 DCTRANT = 0 AKB = OFF 0 1 2 3 4 5 6 7 8 9 0 ABL-FIL applied voltage (V) Fig 10. ABL characteristics (picture) 3.0 1 2 3 4 5 6 7 Fig 11. ABL characteristics (bright) 8 9 ABL-FIL applied voltage (V) 3.0 Input YIN 1.4Vp-p (black to white) Output ROUT Output amplitude (black to white) (Vp-p) Output level (Vp-p) OSD = 1 2.0 OSD = 0 1.0 Input OSDR Output ROUT 2.0 PIC = 3F SUBCONT = 7 AKB = OFF 1.0 –5.7dB 100IRE = 2.5Vp-p 0 1 2 3 4 5 Fig 12. OSD RGB I/O characteristics 6 0 OSDR applied voltage (V) —39— 1.0 2.0 3.0 4.0 Fig 13. OSD-BLK voltage 5.0 OSD-BLK applied voltage (V) CXA1870S Unit : mm + 0.1 – 0.05 42PIN SDIP (PLASTIC) 0.25 + 0.4 37.8 – 0.1 42 + 0.3 13.0 – 0.1 15.24 ± 0.25 22 0° to 15° 21 1 0.5 ± 0.1 0.9 ± 0.15 Two kinds of package surface: 1.All mat surface type. 2.Center part is mirror surface. + 0.4 4.6 – 0.1 0.5 MIN 1.778 3.0 MIN Package Outline PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SOLDER PLATING SONY CODE SDIP-42P-02 LEAD TREATMENT EIAJ CODE SDIP042-P-0600 LEAD MATERIAL 42/COPPER ALLOY PACKAGE MASS 4.4g JEDEC CODE —40—