Intersil ICL3310IB-T 3v to 5.5v, 1 microamp, 250kbps, rs-232 transmitter/receiver Datasheet

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Data Sheet
®
ICL3310
July 2004
FN4995.3
+3V to +5.5V, 1 Microamp, 250kbps,
RS-232 Transmitter/Receiver
Features
The Intersil ICL3310 contains 3.0V to 5.5V powered RS-232
transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at VCC = 3.0V. Targeted
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with a manual powerdown function
reduces the standby supply current to a 1µA trickle. Small
footprint packaging, and the use of small, low value
capacitors ensure board space savings as well. Data rates
greater than 250kbps are guaranteed at worst case load
conditions. This device is fully compatible with 3.3V only
systems, mixed 3.3V and 5.0V systems, and 5.0V only
systems.
• Low Power, Pin Compatible Upgrade for 5V MAX222,
SP310A, and LT1X80/A
The single pin powerdown function (SHDN = 0) disables all
the transmitters and receivers, while shutting down the
charge pump to minimize supply current drain.
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
Table 1 summarizes the features of the ICL3310, while
Application Note AN9863 summarizes the features of each
device comprising the ICL32XX 3V family.
Applications
• ±15kV ESD Protected (Human Body Model)
Pinout
ICL3310 (SOIC)
TOP VIEW
• Single SHDN Pin Disables Transmitters and Receivers
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Receiver Hysteresis For Improved Noise Immunity
• Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Low Supply Current in Powerdown State. . . . . . . . . .<1µA
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
18 SHDN
NC 1
C1+ 2
17 VCC
Related Literature
3
16 GND
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
V+
C1- 4
15 T1OUT
C2+ 5
14 R1IN
C2- 6
13 R1OUT
V- 7
12 T1IN
T2OUT 8
11 T2IN
Part # Information
PART NO.
10 R2OUT
R2IN 9
TEMP.
RANGE (oC)
PACKAGE
PKG. NO.
ICL3310CB
0 to 70
18 Ld SOIC
M18.3
ICL3310CB-T
0 to 70
Tape and Reel
M18.3
ICL3310IB
-40 to 85
18 Ld SOIC
M18.3
ICL3310IB-T
-40 to 85
Tape and Reel
M18.3
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
ICL3310
NO. OF NO. OF
Tx.
Rx.
2
2
1
NO. OF
MONITOR Rx.
(ROUTB)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWERDOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
0
250
NO
NO
YES
NO
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2002, 2004. All Rights Reserved
ICL3310
Pin Descriptions
PIN
VCC
FUNCTION
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TTL/CMOS compatible transmitter Inputs.
TOUT
RS-232 level (nominally ±5.5V) transmitter outputs.
RIN
RS-232 compatible receiver inputs.
ROUT
TTL/CMOS level receiver outputs.
SHDN
Active low input to shut down transmitters, receivers, and on-board power supply, to place device in low power mode.
Typical Operating Circuits
ICL3310
C3 (OPTIONAL CONNECTION, NOTE)
C1
0.1µF
C2
0.1µF
T1IN
T2IN
TTL/CMOS
LOGIC LEVELS
R1OUT
+
0.1µF
2
+
4
5
+
6
12
11
+
+3.3V to +5V
17
C1+
VCC
3
V+
C1C2+
7
V-
C2-
+
T1
15
T2
C4
0.1µF
T1OUT
8
T2OUT
14
13
R1IN
5kΩ
R1
9
10
R2OUT
R2IN
5kΩ
R2
SHDN
GND
16
NOTE: The negative terminal of C3 can be connected to either VCC or GND.
2
+ C3
0.1µF
18
VCC
RS-232
LEVELS
ICL3310
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(Lead Tips Only)
Operating Conditions
ICL3310CX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICL3310IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
TYP
MAX
UNITS
25
-
0.1
10
µA
Full
-
-
50
µA
Full
-
0.3
3.0
mA
DC CHARACTERISTICS
Supply Current, Powerdown
SHDN = GND
Supply Current, Enabled
All Outputs Unloaded, SHDN = VCC, VCC = 3.15V
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN, SHDN
Full
-
-
0.8
V
Input Logic Threshold High
TIN, SHDN
Full
2.4
-
-
V
Input Leakage Current
TIN, SHDN
Full
-
±0.01
±1.0
µA
Output Leakage Current
SHDN = VCC
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 3.2mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC -0.6 VCC -0.1
RECEIVER INPUTS
Input Voltage Range
Full
-25
-
25
V
VCC = 3.3V
25
0.6
1.2
-
V
VCC = 5.0V
Full
0.8
1.5
-
V
VCC = 3.3V
25
-
1.5
2.4
V
VCC = 5.0V
Full
-
1.8
2.4
V
Input Hysteresis
Full
0.2
0.5
1
V
Input Resistance
Full
3
5
7
kΩ
Input Threshold Low
Input Threshold High
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Full
±7
±35
-
mA
Full
-
-
±10
µA
Output Short-Circuit Current
VOUT = ±12V, VCC = 0V or 3V to 5.5V, SHDN = GND
Output Leakage Current
3
ICL3310
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC (Continued)
PARAMETER
TEMP
(oC)
MIN
TYP
MAX
UNITS
Full
250
500
-
kbps
tPHL
Full
-
0.6
3.5
µs
tPLH
Full
-
0.7
3.5
µs
tPHL
Full
-
0.2
1
µs
tPLH
Full
-
0.3
1
µs
TEST CONDITIONS
TIMING CHARACTERISTICS
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Transmitter Propagation Delay
Transmitter Input to
Transmitter Output,
CL = 1000pF
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
Transmitter Output Enable Time
From SHDN Rising Edge to TOUT = ±3V
25
-
50
-
µs
Transmitter Output Disable Time
From SHDN Falling Edge to TOUT = ±5V
25
-
600
-
ns
Transmitter Skew
tPHL - tPLH (Note 2)
25
-
100
-
ns
Receiver Skew
tPHL - tPLH
25
-
100
-
ns
Transition Region Slew Rate
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V
or -3V to 3V
VCC = 3.3V,
CL = 150pF to 2500pF
25
4
-
-
V/µs
VCC = 4.5V,
CL = 150pF to 2500pF
25
6
-
-
V/µs
Human Body Model
25
-
±15
-
kV
IEC1000-4-2 Contact Discharge
25
-
±8
-
kV
IEC1000-4-2 Air Gap Discharge
25
-
>±8
-
kV
Human Body Model
25
-
±3
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
NOTE:
2. Transmitter skew is measured at the transmitter zero crossing points.
Detailed Description
Transmitters
ICL3310 interface ICs operate from a single +3V to +5.5V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1µF capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Charge-Pump
Intersil’s new ICL3310 utilizes regulated on-chip dual charge
pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions at VCC = 3.3V. See
the “Capacitor Selection” section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
4
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 900kbps.
ICL3310
Transmitter inputs float if left unconnected (there are no pullup resistors), and may cause ICC increases. Connect
unused inputs to GND for the best performance.
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
SHDN TRANSMITTER RECEIVER
INPUT
OUTPUTS
OUTPUTS MODE OF OPERATION
H
Active
Active
Normal Operation
L
High-Z
High-Z
Manual Powerdown
Receivers
The ICL3310 contains standard inverting receivers that
three-state via the SHDN control line. Receivers driving
powered down peripherals must be disabled to prevent
current flow through the peripheral’s protection diodes (see
Figures 2 and 3).
All the receivers convert RS-232 signals to CMOS output
levels and accept inputs up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance (see Figure 1) even if
the power is off (VCC = 0V). The receivers’ Schmitt trigger
input stage uses hysteresis to increase noise immunity and
decrease errors due to slow input signal transitions.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
pump turns off (V+ collapses to VCC, V- collapses to GND),
and the transmitter and receiver outputs three-state. This
micro-power mode makes these devices ideal for battery
powered and portable applications.
Software Controlled (Manual) Powerdown
The ICL3310 may be forced into its low power, standby state
via a simple shutdown (SHDN) pin (see Figure 4). Driving
this pin high enables normal operation, while driving it low
forces the IC into it’s powerdown state. The time required to
exit powerdown, and resume transmission is less than 50µs.
Connect SHDN to VCC if the powerdown function isn’t
needed.
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
Rx
VCC
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
POWERED
DOWN
UART
GND ≤ VROUT ≤ VCC
5kΩ
GND
Tx
OLD
RS-232 CHIP
SHDN = GND
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
even at VCC = 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by replacing
the old style device with the ICL3310.
Low Power, Pin Compatible Replacement
Pin compatibility with existing 5V products (e.g., MAX222),
coupled with the wide operating supply range, make the
ICL3310 a potential lower power, higher performance dropin replacement for existing 5V applications. As long as the
±5V RS-232 output swings are acceptable, and transmitter
pull-up resistors aren’t required, the ICL3310 should work in
most 5V applications.
When replacing a device in an existing 5V application, it is
acceptable to terminate C3 to VCC as shown on the “Typical
Operating Circuit”. Nevertheless, terminate C3 to GND if
possible, as slightly better performance results from this
configuration.
5
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
VCC
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ICL3310
V-
VCC
RX
POWERED
DOWN
UART
VOUT = HI-Z
TX
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
ICL3310
5V/DIV.
SHDN
SHDN
T1
PWR
MGT
LOGIC
ICL3310
2V/DIV.
T2
I/O
UART
VCC = +3.3V
C1 - C4 = 0.1µF
CPU
TIME (20µs/DIV.)
FIGURE 5. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
Capacitor Selection
The charge pumps require 0.1µF or greater capacitors for
operation with 3.3V ≤ VCC ≤ 5.5V. Increasing the capacitor
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C2 , C3 , and
C4 can be increased without increasing C1’s value, however,
do not increase C1 without also increasing C2 , C3 , and C4 to
maintain the proper ratios (C1 to the other capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
High Data Rates
The ICL3310 maintain the RS-232 ±5V minimum transmitter
output voltages even at high data rates. Figure 6 details a
transmitter loopback test circuit, and Figure 7 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 8 shows the loopback results for
a single transmitter driving 1000pF and an RS-232 load at
250kbps. The static transmitters were also loaded with an
RS-232 receiver.
VCC
+
0.1µF
+
C1+
VCC
V+
C1
C1-
+
C3
ICL3310
Power Supply Decoupling
+
V-
C2+
C2
C4
+
C2-
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
TIN
ROUT
TOUT
RIN
1000pF
5k
Transmitter Outputs when Exiting
Powerdown
Figure 5 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
6
VCC
SHDN
FIGURE 6. TRANSMITTER LOOPBACK TEST CIRCUIT
ICL3310
Interconnection with 3V and 5V Logic
5V/DIV.
T1IN
The ICL3310 directly interface with most 5V logic families,
including ACT and HCT CMOS. See Table 3 for more
information on possible combinations of interconnections.
T1OUT
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
VCC
SYSTEM
POWER-SUPPLY SUPPLY
VOLTAGE
VOLTAGE
(V)
(V)
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
COMPATIBILITY
3.3
3.3
Compatible with all CMOS families.
5
5
Compatible with all TTL and CMOS
logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. Incompatible
with AC, HC, or CD4000 CMOS.
5µs/DIV.
FIGURE 7. LOOPBACK TEST AT 120kbps
5V/DIV.
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 8. LOOPBACK TEST AT 250kbps
Typical Performance Curves
VCC = 3.3V, TA = 25oC
25
VOUT+
4.0
20
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
6.0
2.0
1 TRANSMITTER AT 250kbps
1 TRANSMITTER AT 30kbps
0
-2.0
15
-SLEW
+SLEW
10
VOUT -
-4.0
-6.0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
7
5
0
1000
2000
3000
4000
LOAD CAPACITANCE (pF)
FIGURE 10. SLEW RATE vs LOAD CAPACITANCE
5000
ICL3310
Typical Performance Curves
VCC = 3.3V, TA = 25oC (Continued)
3.5
45
40
3.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
250kbps
35
30
25
120kbps
20
15
NO LOAD
ALL OUTPUTS STATIC
20kbps
10
2.5
2.0
1.5
1.0
0.5
5
0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 11. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
338
PROCESS:
Si Gate CMOS
8
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE
6.0
ICL3310
Small Outline Plastic Packages (SOIC)
N
M18.3 (JEDEC MS-013-AB ISSUE C)
INDEX
AREA
0.25(0.010) M
H
B M
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
E
INCHES
-B-
1
2
SYMBOL
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
µα
A1
B
0.10(0.004)
0.25(0.010) M
C A M
B S
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
MILLIMETERS
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4469
0.4625
11.35
11.75
3
E
0.2914
0.2992
7.40
7.60
4
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
NOTES:
MAX
A1
e
C
MIN
α
18
0o
18
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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