MPS MP7742DF 2 x 15w class d stereo single ended audio amplifer Datasheet

MP7742
2 x 15W Class D Stereo
Single Ended Audio Amplifer
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP7742 is a Stereo 2 x 15W Class D
Audio Amplifier. It is one of MPS’ products of
fully integrated audio amplifiers which
dramatically reduces solution size by integrating
the following:
250mΩ power MOSFETs
Startup / Shutdown pop elimination
Short circuit protection circuits
The MP7742 utilizes a single ended output
structure capable of delivering 15W per channel
into 4Ω speakers. MPS Class D Audio
Amplifiers exhibit the high fidelity of a Class A/B
amplifier at high efficiencies. The circuit is
based on the MPS’ proprietary variable
frequency topology that delivers excellent
linearity, fast response time and operates on a
single power supply.
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2 x 15W Output at VDD = 24V into a 4Ω load
THD+N = 0.03% at 4W, 8Ω
90% Efficiency at 15W & VDD = 24V
Low Noise (103µV Typical)
Switching Frequency Up to 1MHz
9.5V to 28V Operation from a Single Supply
Integrated Startup and Shutdown Pop
Elimination Circuit
Thermal and Short Circuit Protection
Integrated Power FETs
Pin Compatible with MP7722
Available in TSSOP20-Exposed Package
APPLICATIONS
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Flat Panel TV
Portable Docking Stations
Surround Sound DVD Systems
Televisions
Multimedia Computers
Home Stereo Systems
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
AAM (Analog Adaptive Modulation) is a Trademark of Monolithic Power
Systems, Inc.
TYPICAL APPLICATION
THD+N vs. POUT
VDD=24V, Freq=1KHz, A-wtd
VDD
VDD
18
REF1
13
BS1
3
CH1
INPUT
17
5
IN1
SW1
VDD
19
MP7742
8
CH2
INPUT
EN/SHDN
REF2
10
4, 5
9
CH1
OUTPUT
BS2
SW2
7 IN2
6
20
10
VDD1 VDD2
12
14
CH2
OUTPUT
EN1
EN2
AGND1
AGND2
PGND1 PGND2
15
20
2
THD+N (%)
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
1
10 20
POUT (W)
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
ABSOLUTE MAXIMUM RATINGS (1)
PACKAGE REFERENCE
Supply Voltage VDD ...................................... 32V
BS Voltage.................. VSW – 0.3V to VSW + 6.5V
Enable Voltage VEN ........................ –0.3V to +6V
VSW................... –1V (-5V for <10ns) to VDD + 1V
VPIN, VNIN ................................... –1V to VDD + 1V
AGND to PGND .......................... –0.3V to +0.3V
Junction Temperature............................... 150°C
Lead Temperature ....................................260°C
Storage Temperature ..............–65°C to +150°C
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
Recommended Operating Conditions
9
12
10
11
Supply Voltage VDD .......................... 9.5V to 28V
Operating Temperature TA.........–40°C to +85°C
Thermal Resistance
(3)
θJA
(2)
θJC
TSSOP20F ............................. 40 ....... 6.........°C
Part Number*
MP7742DF
Temperature
–40°C to +85°C
Package
TSSOP20F
Top Marking
MP7742DF
* For Tape & Reel, add suffix –Z (e.g. MP7742DF–Z)
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on JESD5 1-7, 4-layer PCB..
For Lead Free, add suffix –LF (e.g. MP7742DF–LF–Z)
ELECTRICAL CHARACTERISTICS (4, 5)
VDD = 24V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Supply Current
Standby Current
Quiescent Current
Output Drivers
SW On Resistance
Short Circuit Current
Inputs
REF1/2, IN1/2, Input Common
Mode Voltage Range
REF1/2, IN1/2, Input Current
EN Enable Threshold Voltage
EN Enable Input Current
Thermal Shutdown
Thermal Shutdown Trip Point
Thermal Shutdown Hysteresis
Symbol Condition
Min
VEN = 0V
SW=0V
Sourcing and Sinking
Sourcing and Sinking
Max
Units
40
3
100
6
µA
mA
0.25
4.5
0
VPIN = VNIN = 12V
VEN Rising
VEN Falling
VEN = 5V
Typ
0.8
TJ Rising
VDD
2
1
1.8
1.2
1
150
30
Ω
A
VDD – 1.5
V
5
2.5
µA
V
V
µA
°C
°C
Note:
4) The device is not guaranteed to function outside its operating rating.
5) Electrical Characteristics are for the IC only with no external components except bypass capacitors.
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
OPERATING SPECIFICATIONS (6)
Circuit of Figure 1, VDD = 24V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Standby Current
Quiescent Current
Symbol Condition
VEN = 0V
Min
f = 1KHz, THD+N = 10%, 4Ω
Load
f = 1KHz, THD+N = 10%, 8Ω
Load
POUT = 1W, f = 1KHz, 4Ω Load
POUT = 1W, f = 1KHz, 8Ω Load
f = 1KHz, POUT = 15W, 4Ω Load
f = 1KHz, POUT = 8W, 8Ω Load
Power Output
THD+ Noise
Efficiency
Maximum Power Bandwidth
Dynamic Range
Noise Floor
Power Supply Rejection
Max
Units
µA
mA
15
W
8
W
0.07
0.04
90
90
20
97
103
%
%
%
%
KHz
dB
µV
f = 217Hz
-55
dB
f = 1kHz
-58
dB
A-Weighted
VRIPPLE=200mVPP
CR=100µF
Typ
260
26
Note:
6) Operating Specifications are for the IC in Typical Application circuit (Figure 1).
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
PIN FUNCTIONS
Pin #
Name
Description
1, 11, 16
NC
2
REF1
3
IN1
4, 5
AGND1
6
EN1
Enable Input 1. EN1 must be connected to EN2. Drive EN1 high to enable MP7742; low to
disable it.
7
IN2
Amplifier 2 Input. IN2 is the inverting input for amplifier 2.
8
REF2
9
AGND2
10
EN2
Enable Input 2. EN2 must be connected to EN1. Drive high to enable MP7742, drive low to
disable.
12
BS2
High-Side MOSFET Bootstrap Input for Amplifier 2. A capacitor from BS2 to SW2 supplies the
gate drive current to the internal high-side MOSFET. Connect a 0.1µF~1µF capacitor from
SW2 to BS2.
13
VDD2
Power Supply Input. Bypass VDD2 to PGND2 with a 1µF X7R capacitor (in addition to the
main bulk capacitor), placed close to the IC PIN13 and PIN15.
14
SW2
Switched Power Output. SW2 is the output of Amplifier 2. Connect the LC filter to this pin.
15
PGND2
17
BS1
18
VDD1
Power Supply Input. Bypass VDD1 to PGND1 with a 1µF X7R capacitor (in addition to
the main bulk capacitor), placed close to the IC PIN18 and PIN20.
19
SW1
Switched Power Output. SW1 is the output of Amplifier 1. Connect the LC filter to this
pin. See Figure 1.
20
PGND1
No Connect. Not internally connected
Amplifier 1 Reference. REF1 is the reference point for amplifier 1. Use a resistive voltage
divider to set the voltage at REF1 to VDD/2.
Amplifier 1 Input. IN1 is the inverting input for amplifier 1.
Analog Ground 1. Connect AGND1 to AGND2.
Amplifier 2 Reference. REF2 is the reference point for amplifier 2. Use a resistive voltage
divider to set the voltage at REF2 to VDD/2.
Analog Ground 2. Connect AGND2 to AGND1.
Power Ground for Amplifier 2. Connect PGND2 to PGND1.
High-Side MOSFET Bootstrap Input for Amplifier 1. A capacitor from BS1 to SW1
supplies the gate drive current to the internal high-side MOSFET. Connect a
0.1µF~1µF capacitor from SW1 to BS1. See Figure 1.
Power Ground for Amplifier 1. Connect PGND1 to PGND2. See Figure 1.
Exposed
Connect exposed pad to GND plane for proper thermal performance.
Pad
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL PERFORMANCE CURVES
Circuit of Figure 1, VDD=24V, VEN=5V, TA = +25°C, unless otherwise noted.
20
10
5
5
2
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
Freq=10kHz
1
1
0.5
Freq=1kHz
0.2
0.1
0.05
Freq=1kHz
Freq=100Hz
20
10
5
10 20
0.1
1
POUT (W)
2
THD+N (%)
10 20
0.006
20
1
0.5
0.2
0.1
0.05
+4
+4
+2
+2
0
-2
-4
-6
-8
1k
100
Frequency (Hz)
Power Supply Rejection Ratio
-40
-60
20
100
MP7742 Rev. 0.91
1/25/2010
1k
10k 20k
Frequency (Hz)
-4
-6
0
-20
-20
-40
-60
-80
-100
100
1k
10k
Frequency (Hz)
40k
FFT Noise Floor
0
-40
-60
-80
-100
-120
-80-
-2
-10
20
1k
10k 40k
Frequency (Hz)
AMPLITUDE (dBV)
AMPLITUDE (dBV)
-20
0
FFT Noise Floor
, Input ac-grounded
+0
1k
10k 20k
Frequency (Hz)
-8
-10
20
10k 20k
100
Frequency Response
AMPLITUDE (dBr)
AMPLITUDE (dBr)
5
100
0.2
0.1
0.05
Frequency Response
20
10
20
2
1
0.5
0.02
0.02
0.01
THD+N vs. Frequency
AMPLITUDE (dB)
Freq=10kHz
Freq=100Hz
POUT (W)
0.02
0.01
THD+N (%)
20
10
THD+N (%)
THD+N (%)
THD+N vs. Frequency
-120
2
4
6
8 10 12 14 16 18 20
Frequency (kHz)
2
4
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8 10 12 14 16 18 20
Frequency (kHz)
5
MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL PERFORMANCE CURVES (continued)
Circuit of Figure 1, VDD=24V, VEN=5V, TA = +25°C, unless otherwise noted.
0
-20
-20
-20
-40
Left to Right
-60
-80
Right to Left
-40
-60
-100
-120
-120
1k
Right to Left
-80
-100
100
-40
-60
-80
-120
100
20
10k 20k
IHF-IMD
1k
10k 20k
Frequency (Hz)
100
100
90
20
80
EFFICIENCY (%)
POUT (W)
-80
-100
20k
VDD=24V,Input Signal Freq=1kHz
25
-40
-60
10k
Efficiency vs. POUT
Input Signal Freq=1kHz
-20
1k
Frequency (Hz)
POUT vs. VDD
Test Tones: 19 kHz and 20 kHz
Test Tones: 19 kHz and 20 kHz
-100
Left to Right
Frequency (Hz)
0
AMPLITUDE (dBV)
0
AMPLITUDE (dB)
AMPLITUDE (dB)
0
20
AMPLITUDE (dBV)
IHF-IMD
Cross Talk
Cross Talk
15
10
70
60
50
40
30
20
5
10
-120
100
1k
10k
30k
Frequency (Hz)
0
0
0
5
10
15
20
25
30
35
0
2
VDD (V)
4
6
8 10 12 14 16 18
POUT (W)
Thermal Rise vs. POUT
VDD=24V
CASE TEMPERATURE ( C)
150
130
110
90
70
50
30
10
0
3
6
9
12
15
18
POUT Per Channel (W)
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
OPERATION
The MP7742 is a single-ended Class D audio
amplifier. It uses the Monolithic Power Systems
patented Analog Adaptive ModulationTM to
convert the audio input signal into pulses.
These pulses drive an internal high-current
output stage and, when filtered through an
external inductor-capacitor filter, reproduce the
input signal across the load. Because of the
switching Class D output stage, power
dissipation in the amplifier is drastically reduced
when compared to Class A, B or A/B amplifiers
while maintaining high fidelity and low distortion.
Pop Elimination
The capacitors COUT1 and COUT2 block the DC
signal and pass only AC signals to the load. To
insure that the amplifier passes low frequency
signals, the time constant of COUT*RLOAD is long.
However, when EN is asserted, the capacitor
charges over a long period and in a normal
amplifier can result in a turn on and/or turn off
“pop.” The MP7742 includes integrated circuitry
that eliminates the turn on and turn off pop
associated with the charging of the AC coupling
capacitor.
The amplifier uses differential input to the
modulator. PIN is the positive input and NIN is
the negative input. The common mode voltage
of the input is set to half the DC power supply
input voltage (VDD/2) through the resistive
voltage divider. The input capacitor CIN couple
the AC signal at the input.
Short Circuit/Overload Protection
The MP7742 has internal overload and short
circuit protection. The currents in both the highside and low-side MOSFETs are measured and
if the current exceeds the 4.5A short circuit
current limit, both MOSFETs are turned off. The
MP7742 then restarts with the same power up
sequence that is used for normal starting to
prevent a pop from occurring after a short
circuit condition is removed.
The amplifier voltage gain is set by the
combination of the input resister RIN and the
feedback resistor RFB and is calculated by the
equation:
AV =
−R FB
R IN
Where for Channel 1: RFB=RFB1 and RIN=RIN1
and for Channel 2: RFB=RFB2 and RIN=RIN2.
The MP7742 includes four high-power
MOSFETs wherein for each channel the output
driver stage uses two 250mΩ N-Channel
MOSFETs to deliver the pulses to the LC output
filter which in turn drives the load. To fully
enhance the high-side MOSFET, the gate is
driven to a voltage higher than the source by
the bootstrap capacitor between SW and BS.
While the output is driven low, the bootstrap
capacitor is charged from VDD through an
internal circuit on the MP7742. The gate of the
high-side MOSFET is driven high from the
voltage at BS, forcing the MOSFET gate to a
voltage higher than VDD and allowing the
MOSFET to fully turn on, reducing power loss in
the amplifier.
MP7742 Rev. 0.91
1/25/2010
For VDD > 24V, two schottky diodes are
required for short-circuit protection, with the
cathodes connected to SW1/2 and the anodes
connected to PGND1/2. The diodes should
have output current of at least 1A and a
minimum of 40V dc blocking voltage rating.
Please place the diodes as close to the
MP7742 as possible. For VDD < 24V, the
schottky diodes are not required for short circuit
protection.
If short-circuit protection is not needed, the
Schottky diodes can be omitted.
Enable Function
The MP7742 EN input is an active high enable
control. To enable the MP7742, drive EN with a
2.5V or greater voltage. To disable the amplifier,
drive it below 0.8V. While the MP7742 is
disabled, the VDD operating current is less than
100µA and the output driver MOSFETs are
turned off.
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7742 uses a minimum number of
external components to complete a stereo
Class D audio amplifier. The circuit of Figure 1
is optimized for a 24V power supply. This circuit
should be suitable for most applications.
However, if this circuit is not suitable, use the
following sections to determine how to
customize the amplifier for a particular
application.
Setting the Voltage Gain
The maximum output voltage swing is limited by
the power supply. To achieve the maximum
power out of the MP7742 amplifier, set the gain
such that the maximum input signal results in
the maximum output voltage swing.
The maximum output voltage swing is ±VDD/2.
For a given input signal voltage, where VIN(pk)
is the peak input voltage, the maximum voltage
gain is:
A V (MAX) =
VDD
2 × VIN (pk )
This voltage gain setting results in the peak
output voltage approaching it’s maximum for
the maximum input signal. In some cases the
amplifier is allowed to overdrive slightly,
allowing the THD to increase at high power
levels, and so a higher gain than AV (max) is
required.
Setting the Switching Frequency
The idle switching frequency (the switching
frequency when no audio input is present) is a
function of several variables: the supply voltage
VDD, the timing capacitor CINT and the feedback
resistor RFB. Lower switching frequencies result
in more inductor ripple, causing more quiescent
output voltage ripple and increasing the output
noise and distortion. Higher switching
frequencies result in more power loss. The
optimum quiescent switching frequency is
approximately 600KHz to 700KHz. It is
recommended to set right channel idol
switching frequency larger than left channel’s
with 50kHz difference by using different timing
capacitor CINT. Refer to the Operating
Specifications for recommended values.
MP7742 Rev. 0.91
1/25/2010
Table 1—Switching Frequency vs. VDD, Timing
Capacitor and Feedback Resistor (see Figure 1)
VDD Gain
(V) (V/V)
RFB
(kΩ)
RIN
(kΩ)
Left channel
Right channel
CINT1
(nF)
FSW1
(kHz)
CINT2
(nF)
FSW2
(kHz)
12
5.6
56
10
4.7
560
3.3
700
12
8.2
39
4.7
5.6
620
4.7
700
12
12.0
56.4
4.7
4.7
530
3.3
670
12
17.6
56.4
3.2
4.7
530
3.3
670
12
25.5
56.4
2.2
4.7
530
3.3
670
12
30
60
2
4.7
520
3.3
650
24
5.6
56
10
10
540
8.2
650
24
8.2
82
10
5.6
610
4.7
690
24
12.0
120
10
4.7
530
3.3
660
24
17.4
82
4.7
5.6
610
4.7
690
24
25.5
120
4.7
4.7
530
3.3
660
24
30
120
4
4.7
530
3.3
660
Choosing the LC Filter
The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that
drives the speaker. Typical values for the LC
filter are shown in Figure 1, 10µH inductor and
0.47µF capacitor.
The characteristic frequency of the LC filter
needs to be high enough to allow high
frequency audio to the output, yet needs to be
low enough to filter out high frequency products
of the pulses from SW. The characteristic
frequency of the LC filter is:
f0 =
1
2π LC
The voltage ripple at the output is approximated
by the equation:
⎛ f
VRIPPLE ≅ VDD × ⎜⎜ 0
⎝ f SW
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⎟
⎟
⎠
8
MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
The quality factor (Q) of the LC filter is important.
If this is too low, output noise will increase, if this
is too high, then peaking may occur at high
signal frequencies reducing the passband
flatness. The circuit Q is set by the load
resistance (speaker resistance, typically 4Ω or
8Ω). The Q is calculated as:
Q=
R
R
=
ω0 × L 2π × f 0 × L
ω0 is the characteristic frequency in radians per
second and f0 is in Hz. Use an LC filter with Q
between 0.7 and 1.
The actual output ripple and noise is greatly
affected by the type of inductor and capacitor
used in the LC filter. Use a film capacitor and an
inductor with sufficient power handling capability
to supply the output current to the load. The
inductor
should
exhibit
soft
saturation
characteristics. If the inductor exhibits hard
saturation, it should operate well below the
saturation current. Gapped ferrite, MPP,
Powdered Iron, or similar type toroidal cores are
recommended. If open or shielded bobbin ferrite
cores are used for multi-channel designs, make
sure that the start windings of each inductor line
up (all starts going toward SW pin, or all starts
going toward the output) to prevent crosstalk or
other channel-to-channel interference.
Output Coupling Capacitor
The output AC coupling capacitor COUT serves
to block DC voltages and thus passes only the
amplified AC signal from the LC filter to the load.
The combination of the coupling capacitor, COUT
and the load resistance results in a first-order
high-pass filter. The value of COUT should be
selected such that the required minimum
frequency is still allowed to pass. The output
corner frequency (-3dB point), fOUT, can be
calculated as:
fOUT =
1
2 × π × R LOAD × C OUT
Set the output corner frequency (fOUT) at or
below the minimum required frequency.
The output coupling capacitor carries the full
load current, so a capacitor should be chosen
such that its ripple current rating is greater than
the maximum load current. Low ESR aluminum
electrolytic capacitors are recommended.
MP7742 Rev. 0.91
1/25/2010
Input Coupling Capacitor
The input coupling capacitors CIN1 and CIN2 are
used to pass only the AC signal at the input. In
a typical system application, the source input
signal is typically centered around the circuit
ground, while the MP7742 input is at half the
power supply voltage (VDD/2). The input
coupling capacitor transmits the AC signal from
the source to the MP7742 while blocking the
DC voltage. Choose an input coupling capacitor
such that the corner frequency (fIN) is less than
the passband frequency. The corner frequency
is calculated as:
fIN =
1
2 × π × RIN × CIN
Power Source
For maximum output power, the amplifier circuit
requires a regulated external power source to
supply the power to the amplifier. The higher
the power supply voltage, the more power can
be delivered to a given load resistance,
however if the power source voltage exceeds
the maximum voltage of 28V, the MP7742 may
sustain damage. The power supply rejection of
the MP7742 is excellent (typically 60dB),
however noise at the power supply can get to
the output, so care must be taken to minimize
power supply noise within the pass-band
frequencies. Bypass the power supply with a
large capacitor (typically aluminum electrolytic)
along with a smaller 1µF ceramic capacitor at
the MP7742 VDD supply pins.
PCB Layout
The circuit layout is critical for optimum
performance and low output distortion and
noise. It is highly recommended to
duplicate
EVB
layout
for
optimum
performance. If change is necessary,
please follow these guidelines and take
Figure 2 for references.
1) Place the following components as close
to the MP7742 as possible:
Bootstrap Cap
CBS1 and CBS2 are used to supply the gate
drive current to the internal high-side
MOSFET. Place CBS1 as close to pins 17 and
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
19 as possible. Likewise, place CBS2 as
close to pins 12 and 14 as possible.
injection into the
reduce distortion.
Power Supply Bypass, CBYP
4) Keep the sensitive feedback signal
trace on the input side and shield the
trace with the AGND plane. Make sure that
any traces carrying the switch node (SW)
voltages are separated far from any input
signal traces. If it is required to run
the SW trace near the input, shield the
input with a ground plane between the
traces. For multiple channel applications,
make sure that each channel is physically
separated to prevent crosstalk. Make sure
that all inductors used on a single
circuit board have the same orientation.
CBYP1 and CBYP2 carry the transient current
for the switching power stage. To prevent
overstressing of the MP7742 and excessive
noise at the output, place CBYP1 as close to
pins 18 (VDD1) and 20 (PGND1) as possible
and also place CBYP2 as close to pins 13
(VDD2) and 15 (PGND2) as possible.
Timing Capacitors
CINT1 and CINT2 are used to set the amplifier
switching frequencies and are typically on
the order of a few nF. Place CINT1 as close
to pins 2 and 3 as possible to reduce
distortion and noise. Likewise, place CINT2
as close to pins 7 and 8 as possible.
Reference Bypass Capacitors
CR1 and CR2 filter the ½ VDD reference
voltages. Place CR1 and CR2 as close to the
IC as possible to improve power supply
rejection and reduce distortion and noise
at the output.
Output Catch Diodes (optional components)
DSL1 and DSL2 carry the current over the
dead-time while the MOSFET switches are
off and provide the short circuit
protection. Place the diodes as close to
the MP7742 as possible if these diodes are
needed.
2) The Inductor-Capacitor (LC) filter
converts the pulse train at SW to the
output voltage that drives the speaker.
Please keep the filter capacitor close to
the inductor.
3) When laying out the PCB, use two
separate ground planes, analog ground
(AGND) and power ground (PGND), and
connect the two grounds together at a
single point (usually around the bulk
bypass
capacitor)
to
prevent
noise
MP7742 Rev. 0.91
1/25/2010
amplifier
input
to
Also, make sure that the power supply is
routed from the source to each channel
individually, not serially. This prevents
channel-to-channel coupling through the
power supply input.
Electro-Magnetic Interference (EMI)
Considerations
Due to the switching nature of the Class D
amplifier, care must be taken to minimize the
effects of electromagnetic interference from the
amplifier. However, with proper component
selection and careful attention to circuit layout,
the effects of the EMI due to the amplifier
switching can be minimized.
The power inductors are a potential source of
radiated emissions. For the best EMI
performance, use toroidal inductors, since the
magnetic field is well contained inside the core.
However toroidal inductors can be expensive to
wind. For a more economical solution, use
shielded gapped ferrite or shielded ferrite
bobbin core inductors. These inductors typically
do not contain the field as well toroidal
inductors, but usually can achieve a better
balance of good EMI performance with low cost.
The size of high-current loops that carry rapidly
changing currents needs to be minimized. To
do this, make sure that the VDD bypass
capacitors are as close to the MP7742 as
possible.
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10
MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
Nodes that carry rapidly changing voltage, such
as SW, need to be made as small as possible.
If sensitive traces run near a trace connected to
SW, place a ground shield between the traces.
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL APPLICATION CIRCUITS
CFB1
22pF
VDD
RFB1
RRH1
2
CH1
INPUT
CIN1
2.2uF
50V
RIN1
CR1
10uF
50V
RRL1
REF1
CINT1
5.6nF
BS1
3
IN1
VDD
SW1
RRH2
CH2
INPUT
CIN2
2.2uF
50V
RIN2
RRL2
REF2
BS2
6
10
4, 5
9
SW2 14
18
VDD1
20
PGND1
IN2
EN1
EN2
AGND1
VDD2
AGND2
PGND2
RFB2
CBS2
0.47uF
16V
CBYP1
2.2uF
50V
13
15
CBYP2
2.2uF
50V
COUT1
1000uF
50V
LF1
10uH, 3.5A
DSL1 (Optional)
MBRS140TR
12
CINT2
4.7nF
7
EN
19
CBS1
0.47uF
16V
MP7742
8
CR2
10uF
50V
17
(7)
CSN1
390pF
CF1
0.47uF
50V
COUT2
1000uF
50V
LF2
10uH, 3.5A
CF2
0.47uF
50V
VDD
CVDDBYP
100uF
50V
CSN2
390pF
DSL2 (Optional)
MBRS140TR
CH1
OUTPUT
(7)
CH2
OUTPUT
CFB2
22pF
Figure 1—2 x 15W Stereo Typical Application Circuit
Note:
7) Schottky diodes DSL1 &DSL2 only be required for short circuit protection when VDD > 24V. Detailed see SHORT CIRCUIT/OVERLOAD
PROTECTION section in Operation Information.
AGND
PGND
DSL1
Optional(7)
DSL2
a) Top Layer Shown
b) Bottom Layer Shown
Figure 2—Reference PCB Layout
MP7742 Rev. 0.91
1/25/2010
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MP7742 – 2 x 15W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
PACKAGE INFORMATION
TSSOP20F
(EXPOSED PAD)
4.40
TYP
6.40
6.60
20
0.40
TYP
11
1.60
TYP
4.30
4.50
PIN 1 ID
1
0.65
BSC
3.20
TYP
6.20
6.60
5.80
TYP
10
TOP VIEW
RECOMMENDED LAND PATTERN
0.80
1.05
1.20 MAX
SEATING PLANE
0.19
0.30
0.65 BSC
0.00
0.15
0.09
0.20
SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
GAUGE PLANE
0.25 BSC
3.80
4.30
0o-8o
0.45
0.75
DETAIL A
2.60
3.10
BOTTOM VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP7742 Rev. 0.91
1/25/2010
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© 2010 MPS. All Rights Reserved.
13