NCP512 80 mA CMOS Low Iq Voltage Regulator in an SC70−5 The NCP512 series of fixed output linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. The NCP512 series features an ultra−low quiescent current of 40 A. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. The NCP512 has been designed to be used with low cost ceramic capacitors. The device is housed in the micro−miniature SC70−5 surface mount package. Standard voltage versions are 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.3, and 5.0 V. Other voltages are available in 100 mV steps. Features • • • • • Low Quiescent Current of 40 A Typical Low Dropout Voltage of 250 mV at 80 mA Low Output Voltage Option Output Voltage Accuracy of 2.0% Industrial Temperature Range of −40°C to 85°C MARKING DIAGRAM 5 1 SC70−5/SC−88A/ SOT−353 SQ SUFFIX CASE 419A xxxd xxx = Specific Device Code d = Date Code PIN CONNECTIONS Typical Applications • • • • http://onsemi.com Cellular Phones Battery Powered Consumer Products Hand−Held Instruments Camcorders and Cameras Vin 1 Gnd 2 Enable 3 5 Vout 4 N/C (Top View) ORDERING INFORMATION Battery or Unregulated Voltage Vout C1 + 1 5 + 2 ON 3 See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. C2 4 OFF This device contains 86 active transistors Figure 1. Typical Application Diagram Semiconductor Components Industries, LLC, 2003 November, 2003 − Rev. 7 1 Publication Order Number: NCP512/D NCP512 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 Vin Positive power supply input voltage. 2 Gnd Power supply ground. 3 Enable 4 N/C No internal connection. 5 Vout Regulated output voltage. This input is used to place the device into low−power standby. When this input is pulled low, the device is disabled. If this function is not used, Enable should be connected to Vin. MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Rating Symbol Value Unit Vin 0 to 6.0 V Enable Voltage Enable −0.3 to Vin +0.3 V Output Voltage Vout −0.3 to Vin +0.3 V Power Dissipation and Thermal Characteristics Power Dissipation Thermal Resistance, Junction to Ambient PD RJA Internally Limited 400 W °C/W Input Voltage Operating Junction Temperature TJ +125 °C Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Tstg −55 to +150 °C 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V 2. Latch−up capability (85°C) 200 mA DC with trigger voltage. http://onsemi.com 2 NCP512 ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.) + 1.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.) Characteristic Symbol Output Voltage (TA = 25°C, Iout = 10 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.1 V 3.3 V 5.0 V Vout Output Voltage (TA = −40°C to 85°C, Iout = 10 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.1 V 3.3 V 5.0 V Vout Line Regulation (Iout = 10 mA) 1.5 V−4.4 V (Vin = Vout(nom.) + 1.0 V to 6.0 V) 4.5 V−5.0 V (Vin = 5.5 V to 6.0 V) Regline Load Regulation (Iout = 1.0 mA to 80 mA) Regload Output Current (Vout = (Vout at Iout = 80 mA) −3%) 1.5 V−3.9 V (Vin = Vout(nom.) + 2.0 V) 4.0 V−5.0 V (Vin = 6.0 V) Io(nom.) Dropout Voltage (TA = −40°C to 85°C, Iout = 80 mA, Measured at Vout −3.0%) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.1 V 3.3 V 5.0 V Vin−Vout Quiescent Current (TA = −40°C to 85°C) (Enable Input = 0 V) (Enable Input = Vin, Iout = 1.0 mA to Io(nom.)) Min Typ Max 1.455 1.746 2.425 2.646 2.744 2.94 3.038 3.234 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.1 3.3 5.0 1.545 1.854 2.575 2.754 2.856 3.06 3.162 3.366 5.100 1.455 1.746 2.425 2.619 2.716 2.910 3.007 3.201 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.1 3.3 5.0 1.545 1.854 2.575 2.781 2.884 3.09 3.193 3.399 5.100 − − 1.0 1.0 3.0 3.0 − 0.3 0.8 80 80 200 200 − − V V mV/V mV − − − − − − − − 450 350 220 200 200 180 170 160 120 550 450 300 300 300 300 300 300 300 − − 0.1 40 1.0 90 150 150 250 250 400 400 − 180 − − 50 − 1.3 − − − − 0.3 − 100 − A Iout(max) Output Voltage Noise (f = 100 Hz to 100 kHz) Iout = 30 mA, Cout = 1 F Vn Ripple Rejection (f = 1.0 kHz, 60 mA) RR Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) mA Vrms Vth(en) Output Voltage Temperature Coefficient TC T TA PD J(max) RJA 4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3 dB V 3. Maximum package power dissipation limits must be observed. http://onsemi.com mV/mA mA IQ Output Short Circuit Current (Vout = 0 V) 1.5 V−3.9 V (Vin = Vout(nom.) + 2.0 V) 4.0 V−5.0 V (Vin = 6.0 V) Unit ppm/°C NCP512 300 3.020 NCP512SQ30 Vout, OUTPUT VOLTAGE (V) Vin − Vout, DROPOUT VOLTAGE (mV) TYPICAL CHARACTERISTICS 250 Io = 80 mA 200 150 Io = 40 mA 100 50 Io = 10 mA 0 −50 −25 0 25 50 75 100 3.015 Vin = 6.0 V 3.010 Vin = 4.0 V 3.005 3.000 2.995 2.990 2.985 −60 125 −40 −20 0 Figure 2. Dropout Voltage vs. Temperature Iq, QUIESCENT CURRENT (A) Iq, QUIESCENT CURRENT (A) 44 42 40 −60 100 −40 −20 0 20 40 60 80 Vout = 3.0 V Cin = 1.0 F Cout = 1.0 F TA = 25°C 50 40 30 20 10 0 0 100 1 2 3 4 5 7 6 Vin INPUT VOLTAGE (V) TEMPERATURE (°C) Figure 5. Quiescent Current vs. Input Voltage Figure 4. Quiescent Current vs. Temperature 60 70 Vout = 3.0 V Cin = 1.0 F Cout = 1.0 F Iout = 30 mA TA = 25°C Vin = 4.0 V Cout = 1.0 F Iout = 30 mA 60 RIPPLE REJECTION (dB) Ignd, GROUND CURRENT (A) 80 60 Iout = 0 mA Vin = 4.0 V Vout = 3.0 V 46 30 20 10 0 0 60 Figure 3. Output Voltage vs. Temperature 48 40 40 TEMPERATURE (°C) TEMPERATURE (°C) 50 20 50 40 30 20 10 1 2 3 4 5 6 0 100 7 1000 10000 100000 1000000 Vin INPUT VOLTAGE (V) FREQUENCY (Hz) Figure 6. Ground Pin Current vs. Input Voltage Figure 7. Ripple Rejection vs. Frequency http://onsemi.com 4 NCP512 TYPICAL CHARACTERISTICS 7 Vin, INPUT VOLTAGE (V) Vin = 4.0 V Cout = 1.0 F Iout = 30 mA 6 5 4 OUTPUT VOLTAGE DEVIATION (mV) OUTPUT VOLTAGE NOISE (V/Hz) 7 3 2 1 6 Cout = 1.0 F Iout = 10 mA 5 4 3 200 100 0 −100 0 10 100 1000 10000 100000 1000000 0 50 100 150 200 250 Figure 9. Line Transient Response Figure 8. Output Noise Density Vin, INPUT VOLTAGE (V) 6 60 mA 0 200 4 2 0 4 OUTPUT VOLTAGE (V) 100 0 Iout = 1 mA to 60 mA Vin = 4.0 V Cin = 1.0 F Cout = 1.0 F −100 −200 0 100 200 300 400 500 600 700 Iout = 10 mA Vin = 4.0 V Cin = 1.0 F Cout = 1.0 F 3 2 1 0 0 800 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 TIME (s) TIME (s) Figure 10. Load Transient Response Figure 11. Turn−on Response 3.5 Vout, OUTPUT VOLTAGE (V) Io, OUTPUT CURRENT (mA) 500 TIME (s) FREQUENCY (Hz) OUTPUT VOLTAGE DEVIATION (mV) 300 350 400 450 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1.0 2.0 3.0 4.0 5.0 Vin, INPUT VOLTAGE (V) Figure 12. Output Voltage vs. Input Voltage http://onsemi.com 5 6.0 4.5 5.0 NCP512 DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 3.0% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Power Dissipation The maximum total dissipation for which the regulator will operate within its specifications. Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. Maximum Package Power Dissipation The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current. http://onsemi.com 6 NCP512 APPLICATIONS INFORMATION A typical application circuit for the NCP512 series is shown in Figure 1, front page. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. Input Decoupling (C1) A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP512 package. Higher values and lower ESR will improve the overall line transient response. TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K Thermal As power across the NCP512 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material and also the ambient temperature effect the rate of temperature rise for the part. This is stating that when the NCP512 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. The maximum dissipation the package can handle is given by: Output Decoupling (C2) The NCP512 is a stable regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 5.0 can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum capacitors. Larger values improve noise rejection and load regulation transient response. TDK capacitor: C2012X5R1C105K, C1608X5R1A105K, or C3216X7R1C105K T TA PD J(max) RJA If junction temperature is not allowed above the maximum 125°C, then the NCP512 can dissipate up to 250 mW @ 25°C. The power dissipated by the NCP512 can be calculated from the following equation: Enable Operation The enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to Vin. Ptot [Vin * Ignd (Iout)] [Vin Vout] * Iout or P Vout * Iout VinMAX tot Ignd Iout If an 80 mA output current is needed then the ground current from the data sheet is 40 A. For an NCP512 (3.0 V), the maximum input voltage will then be 6.12 V. Hints Please be sure the Vin and Gnd lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. http://onsemi.com 7 NCP512 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1.9 mm SC70−5 (SC−88A/SOT−353) http://onsemi.com 8 0.65 mm 0.65 mm 0.4 mm (min) 0.5 mm (min) NCP512 ORDERING INFORMATION Device NCP512SQ15T1 NCP512SQ18T1 NCP512SQ25T1 NCP512SQ27T1 NCP512SQ28T1 NCP512SQ30T1 NCP512SQ31T1 NCP512SQ33T1 NCP512SQ50T1 Nominal Output Voltage* Marking Package Shipping 1.5 1.8 2.5 2.7 2.8 3.0 3.1 3.3 5.0 LCK LCL LCM LCN LCO LCP LFO LCQ LCR SC70−5 (SC−88A/SOT−353) 3000 Units/ 7″ Tape & Reel *Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative. http://onsemi.com 9 NCP512 PACKAGE DIMENSIONS SC70−5/SC−88A/SOT−353 SQ SUFFIX CASE 419A−02 ISSUE G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A G 5 4 DIM A B C D G H J K N S −B− S 1 2 3 D 5 PL 0.2 (0.008) M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 J C H K ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 10 For additional information, please contact your local Sales Representative. NCP512/D