Fairchild FOD260L 3.3v/5v high speed-10 mbit/s logic gate optocoupler Datasheet

FOD060L, FOD260L
3.3V/5V High Speed-10 MBit/s
Logic Gate Optocouplers
■ Line receiver, data transmission
Features
■ Data multiplexing
■ FOD060L in SO8 and FOD260L in 8-pin DIP
■ Switching power supplies
■ Very high speed – 10 MBit/s
■ Pulse transformer replacement
■ Superior CMR — 50 kV/µs at 1,000V peak
■ Computer-peripheral interface
■ Fan-out of 8 over -40°C to +85°C
■ Logic gate output
Description
■ Strobable output
These optocouplers consist of an AlGaAS LED, optically
coupled to a very high speed integrated photo-detector
logic gate. Devices include a strobable output. This
output features an open collector, thereby permitting
wired OR outputs. The coupled parameters are
guaranteed over the temperature range of -40°C to
+85°C. A maximum input signal of 5 mA will provide a
minimum output sink current of 13 mA (fan out of 8). An
internal noise shield provides superior common mode
rejection of typically 50 kV/µs at 1,000V common mode.
■ Wired OR-open collector
■ Safety and regulatory approvals
– UL1577
– DIN EN/IEC 60747-5-2
Applications
■ Ground loop elimination
■ LSTTL to TTL, LSTTL or 5-volt CMOS
Package
N/C 1
8
8 VCC
8
8
1
1
+ 2
1
VF
_
8
8
1
7 VE
3
N/C 4
6 VO
5 GND
1
Truth Table (Positive Logic)
Input
Enable
Output
On
Off
On
Off
On*
Off*
H
H
L
L
NC*
NC*
L
H
H
H
L*
H*
*Devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 5 and 8. (See Note 1)
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
October 2011
Symbol
Parameter
Value
Units
TSTG
Storage Temperature
-40 to +125
°C
TOPR
Operating Temperature
-40 to +85
°C
EMITTER
IF
DC/Average Forward Input Current
VE
Enable Input Voltage, not to exceed VCC by more than 500 mV
50
mA
VCC + 0.5V
V
VR
Reverse Input Voltage
5.0
V
PI
Power Dissipation
45
mW
VCC
Supply Voltage
(1 minute max)
7.0
V
Output Current
50
mA
VO
Output Voltage
7.0
V
PO
Collector Output Power Dissipation
85
mW
DETECTOR
IO
Recommended Operating Conditions
Symbol
Parameter
Min.
Max.
Units
IFL
Input Current, Low Level
0
250
µA
IFH
Input Current, High Level
*6.3
15
mA
VCC
Supply Voltage, Output
3.0
5.5
V
VEL
Enable Voltage, Low Level
0
0.8
V
VEH
Enable Voltage, High Level
2.0
VCC
V
Operating Temperature
-40
+85
°C
330
4K
TA
N
Fan Out (TTL load)
RL
Output Pull-up Resistor
8
Ω
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
2
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85°C)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Individual Component Characteristics
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
1.8
V
EMITTER
VF
Input Forward Voltage
IF = 10 mA
1.4
TA = 25°C
1.75
BVR
Input Reverse Breakdown Voltage
IR = 10 µA
CIN
Input Capacitance
VF = 0, f = 1 MHz
6.0
pF
IF = 10 mA
-1.9
mV/°C
∆VF/∆TA Input Diode Temperature Coefficient
5.0
V
DETECTOR
ICCH
High Level Supply Current
VE = 0.5 V, IF = 0 mA, VCC = 3.3 V
3.5
7
mA
ICCL
Low Level Supply Current
VE = 0.5 V, IF = 0 mA, VCC = 3.3 V
3.2
10
mA
IEL
Low Level Enable Current
VCC = 3.3 V, VE = 0.5 V
-1.6
mA
IEH
High Level Enable Current
VCC = 3.3 V, VE = 2.0 V
-1.6
mA
VEH
High Level Enable Voltage
VCC = 3.3 V, IF = 10 mA
VEL
Low Level Enable Voltage
VCC = 3.3 V, IF = 10 mA (Note 2)
2.0
1.27
1.18
V
0.8
V
Switching Characteristics (TA = -40°C to +85°C, VCC = 3.3 V, IF = 7.5 mA unless otherwise specified.
Typical value is measured at TA = 25°C and VCC = 3.3V)
Symbol
AC Characteristics
TPLH
Propagation Delay Time
to Output High Level
TPHL
Propagation Delay Time
to Output Low Level
|TPHL – TPLH| Pulse Width Distortion
tPSK
Test Conditions
Min.
Typ.
Max.
Unit
RL = 350Ω, CL = 15 pF (Fig. 9) (Note 3)
65
90
ns
RL = 350Ω, CL = 15 pF (Fig. 9) (Note 4)
43
75
ns
RL = 350Ω, CL = 15 pF (Fig. 9)
23
25
ns
31
40
ns
Propagation Delay Skew RL = 350Ω, CL = 15 pF (Note 5)
tr
Output Rise Time
(10-90%)
RL = 350Ω, CL = 15 pF (Fig. 9)(Note 6)
22
ns
tf
Output Fall Time
(90-10%)
RL = 350Ω, CL = 15 pF (Fig. 12) (Note 7)
3
ns
tELH
Enable Propagation
Delay Time to Output
High Level
VEH = 3 V, RL = 350Ω, CL = 15 pF
(Fig. 10) (Note 8)
47
ns
tEHL
Enable Propagation
Delay Time to Output
Low Level
VEH = 3 V, RL = 350Ω, CL = 15 pF
(Fig. 10) (Note 9)
27
ns
CMH
Common Mode
Transient Immunity
(at Output High Level)
RL = 350Ω, TA =25°C, IF = 0 mA,
VOH (Min.) = 2.0V, |VCM| = 1,000 V
(Fig. 11) (Note 10)
25,000
50,000
V/µs
CML
Common Mode
Transient Immunity
(at Output Low Level)
RL = 350Ω, TA =25°C, IF = 7.5 mA,
VOL (Max.) = 0.8 V, |VCM| = 1,000 V
(Fig. 11) (Note 11)
25,000
50,000
V/µs
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
3
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = -40°C to +85°C unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Symbol DC Characteristics
Test Conditions
Min.
Typ.
Max.
Unit
IOH
High Level Output Current
IF = 250 µA, VCC = 3.3 V, VO = 3.3 V,
VE = 2.0 V (Note 2)
0.01
50
µA
VOL
Low Level Output Voltage
VCC = 3.3 V, IF = 5 mA, IOL = 13 mA,
VE = 2.0 V (Note 2)
0.3
0.6
V
IFT
Input Threshold Current
VCC = 3.3 V, VO = 0.6 V, IOL = 13 mA,
VE = 2.0 V (Note 2)
1
5
mA
Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Symbol
II-O
VISO
Characteristics
Test Conditions
Input-Output
Insulation Leakage Current
Relative humidity = 45%,
TA = 25°C, t = 5 s,
VI-O = 3000 VDC (Note 12)
Withstand Insulation Test
Voltage
IIO ≤ 2 µA, RH < 50%,
TA = 25°C, t = 1 min.(Note 12)
Min.
3750
FOD260L
5000
Resistance (Input to Output)
VI-O = 500 V (Note 12)
CI-O
Capacitance (Input to Output) f = 1 MHz (Note 12)
Max.
Unit
1.0
µA
VRMS
FOD060L
RI-O
Typ.
1012
Ω
0.6
pF
Notes
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package VCC and GND pins of each device.
2. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
3. tPLH – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current
pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
4. tPHL – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current
pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
5. tPSK is the worst case difference between tPHL and tPLH for any devices at the stated test conditions.
6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high
state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/µs).
11. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low
output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
4
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Fig. 1 Input Forward Current vs.
Forward Voltage
Fig. 2 Input Threshold Current vs.
Ambient Temperature
2.5
100
ITH - Input Threshold Current (mA)
VCC = 3.3V
VO = 0.6V
I F - Forward Current (mA)
10
TA = 100°C
1
TA = -40°C
TA = 85°C
0.1
TA = 0°C
TA = 25°C
0.01
0.001
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
2.0
1.5
FOD060L
RL = 350Ω, 1kΩ, 4kΩ
1.0
FOD260L
RL = 350Ω, 1kΩ, 4kΩ
0.5
0.0
-40
1.7
-20
VF - Forward Voltage (V)
0.6
40
60
80
100
20
CC
= 3.3V
I OH - High Level Output Current (nA)
V
VOL - Low Level Output Voltage (V)
20
Fig. 4 High Level Output Current
vs. Ambient Temperature
Fig. 3 Low Level Output Voltage vs.
Ambient Temperature
VE = 2V
IF = 5mA
IO = 13mA
0.5
0.4
0.3
0.2
0.1
-40
-20
0
20
40
60
80
16
12
8
4
VO = VCC = 3.3V
VE = 2V
IF = 250 µA
0
-40
0.0
100
-20
TA - Ambient Temperature (°C)
35
30
V
CC
40
60
80
100
80
= 3.3V
V
VE = 2V
VOL = 0.6V
IF = 5mA
20
15
10
CC
= 3.3V
IF = 7.5mA
70
25
RL = 350Ω
tPLH - FOD060L
tPLH - FOD260L
60
50
40
tPHL - FOD060L
tPHL - FOD260L
30
5
0
-40
20
Fig. 6 Propagation Delay vs.
Ambient Temperature
tP - Propagation Delay (ns)
40
0
TA - Ambient Temperature (°C)
Fig. 5 Low Level Output Current vs.
Ambient Temperature
IOL - Low Level Output Current (mA)
0
TA - Ambient Temperature (°C)
20
-20
0
20
40
60
80
100
-40
TA - Ambient Temperature (°C)
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
-20
0
20
40
60
80
TA - Ambient Temperature (°C)
100
www.fairchildsemi.com
5
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves
Fig. 7 Rise and Fall Times vs.
Ambient Temperature
Fig. 8 Pulse Width Distortion vs.
Ambient Temperature
30
35
V
= 3.3V
V
IF = 7.5mA
PWD - Pulse Width Distortion (ns)
tr, tf, - Rise, Fall Time (ns)
30
CC
RL = 350Ω
25
tr
20
15
10
5
25
CC
= 3.3V
IF = 7.5mA
RL = 350Ω
20
FOD260L
15
FOD060L
10
5
tf
0
-40
-20
0
20
40
60
80
0
-40
100
TA - Ambient Temperature (°C)
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
-20
0
20
40
60
80
100
TA - Ambient Temperature (°C)
www.fairchildsemi.com
6
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves
I F = 7.5 mA
+3.3V
1
Input
Monitor
(IF)
t PHL
8
2
7
3
6
4
5
0.1µF
Bypass
tPLH
Output
(VO )
RL
1.5 V
Output
(VO)
CL
47Ω
I F = 3.75 mA
Input
(I F)
VCC
90%
Output
(VO )
GND
10%
tf
tr
Fig. 9 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse
Generator
tr = 5ns
Z O = 50Ω
Input
Monitor
(V E)
+3.3V
3.0 V
Input
(VE )
VCC
1
8
1.5 V
t EHL
7.5 mA
7
2
RL
0.1µF
bypass
1.5 V
Output
(VO )
6
3
t ELH
Output
(VO )
CL
4
GND
5
Fig. 10 Test Circuit tEHL and tELH.
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
7
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Pulse Gen.
tf = tr = 5 ns
ZO = 50 Ω
IF
A
8
2
7
3
6
+3.3V
0.1µf
bypass
350Ω
B
VFF
4
GND
Output
(VO)
5
VCM
Pulse Gen
VCM
0V
Peak
CM H
3.3V
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
Switching Pos. (B), IF = 7.5 mA
VO
0.5 V
CM L
Fig. 11 Test Circuit Common Mode Transient Immunity
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
8
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
VCC
1
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Package Dimensions
Small Outline
0.164 (4.16)
0.144 (3.66)
SEATING PLANE
0.202 (5.13)
0.182 (4.63)
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.021 (0.53)
0.011 (0.28)
0.244 (6.19)
0.224 (5.69)
0.050 (1.27)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
0.024 (0.61)
0.060 (1.52)
0.275 (6.99)
0.155 (3.94)
0.050 (1.27)
Note:
All dimensions are in millimeters.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
9
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Package Dimensions (Continued)
DIP
Through Hole
9.40–9.91
Pin 1
6.35–6.86
1.14–1.78
3.68–3.94
5.08
MAX
3.05–3.90
0.51 MIN
0.41–0.56
(0.78)
2.54 BSC
0.20–0.40
7.62 TYP
0.4" Lead Spacing (Option T)
9.40–9.91
Pin 1
6.35–6.86
3.68–3.94
1.14–1.78
5.08
MAX
0.51 MIN
3.05–3.90
0.41–0.56
2.54 BSC
15.0° MAX
10.16 TYP
(0.78)
0.20–0.40
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
10
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Package Dimensions (Continued)
SMT
Surface Mount – 0.3" Lead Spacing (Option S)
(2.54)
(1.78)
9.40–9.91
Pin 1
(1.54)
(7.49)
6.35–6.86
(10.54)
(0.76)
Recommended Land Pattern
1.14–1.78
3.68–3.94
5.08
MAX
0.20–0.40
(0.78)
0.51 MIN
(0.41–0.56)
0.40 MIN
Both sides
2.54 BSC
8.00 MIN
10.30 MAX
Surface Mount – 0.4" Lead Spacing (Option TS)
9.40–9.91
(2.54)
1.50
(1.78)
(1.54)
ø1.00 TYP
(9.96)
6.35–6.86
(13.00)
(0.76)
Recommended Land Pattern
3.68–3.94
1.14–1.78
7.62 TYP
5.08
MAX
0.20–0.40
(0.78)
0.51 MIN
2.54 TYP
0.40 MIN
Both sides
10.16
12.60 MAX
Note:
1. All dimensions are in millimeters.
2. Dimensions are exclusive of burrs, mold fash, and tie bar extrusion.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
11
Part Number
Package
Packing Method
FOD060L
Small outline 8-pin
Tube (50 units per tube)
FOD060LR2
Small outline 8-pin
Tape and Reel (2.500 units per reel)
FOD260L
DIP 8-Pin
Tube (50 units per tube)
FOD260LS
SMT 8-Pin (Lead Bend)
Tube (50 units per tube)
FOD260LSD
SMT 8-Pin (Lead Bend)
Tape and Reel (1,000 units per reel)
FOD260LV
DIP 8-Pin, DIN EN/IEC 60747-5-2 option
Tube (50 units per tube)
FOD260LSV
SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-2 option
Tube (50 units per tube)
FOD260LSDV
SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-2 option
Tape and Reel (1,000 units per reel)
FOD260LTV
DIP 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option
Tube (50 units per tube)
FOD260LTSV
SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option
Tube (50 units per tube)
FOD260LTSR2
SMT 8-Pin, 0.4” Lead Spacing
Tape and Reel (700 units per reel)
FOD260LTSR2V SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option
Tape and Reel (700 units per reel)
Marking Information
Small Outline
1
060L
X YY S1
3
2
5
4
Definitions
1
Fairchild logo
2
Device number
3
One digit year code, e.g., ‘8’
4
Two digit work week ranging from ‘01’ to ‘53’
5
Assembly package code
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
12
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Marking Information (Continued)
DIP and SMT
1
260L
XX YY B
V
3
2
6
5
4
Definitions
1
Fairchild logo
2
Device number
3
VDE mark (Note: Only appears on parts ordered with
DIN EN/IEC 60747-5-2 option – See order entry table)
4
Two digit year code, e.g., ‘11’
5
Two digit work week ranging from ‘01’ to ‘53’
6
Assembly package code
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
13
Small Outline
8.0 ± 0.10
3.50 ± 0.20
2.0 ± 0.05
0.30 MAX
Ø1.5 MIN
4.0 ± 0.10
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.3 ± 0.10
5.20 ± 0.20
0.1 MAX
Ø1.5 ± 0.1/-0
6.40 ± 0.20
User Direction of Feed
Note:
All dimensions are in millimeters.
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
14
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification
Option S
D0
P0
t
K0
P2
E
F
A0
W1
d
t
P
User Direction of Feed
Symbol
W
W
B0
Description
D1
Dimension in mm
Tape Width
16.0 ± 0.3
Tape Thickness
0.30 ± 0.05
P0
Sprocket Hole Pitch
4.0 ± 0.1
D0
Sprocket Hole Diameter
1.55 ± 0.05
E
Sprocket Hole Location
1.75 ± 0.10
F
Pocket Location
7.5 ± 0.1
2.0 ± 0.1
P2
P
Pocket Pitch
A0
Pocket Dimensions
12.0 ± 0.1
10.30 ±0.20
B0
10.30 ±0.20
K0
4.90 ±0.20
W1
d
R
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
Cover Tape Width
13.2 ± 0.2
Cover Tape Thickness
0.1 max
Max. Component Rotation or Tilt
10°
Min. Bending Radius
30
www.fairchildsemi.com
15
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification (Continued)
Option TS
D0
P0
t
K0
P2
E
F
A0
W1
d
t
P
User Direction of Feed
Symbol
W
W
B0
Description
D1
Dimension in mm
Tape Width
24.0 ± 0.3
Tape Thickness
0.40 ± 0.1
P0
Sprocket Hole Pitch
D0
Sprocket Hole Diameter
1.55 ± 0.05
4.0 ± 0.1
E
Sprocket Hole Location
1.75 ± 0.10
F
Pocket Location
11.5 ± 0.1
P
Pocket Pitch
16.0 ± 0.1
A0
Pocket Dimensions
12.80 ± 0.1
2.0 ± 0.1
P2
10.35 ± 0.1
B0
5.7 ±0.1
K0
W1
d
R
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
Cover Tape Width
21.0 ± 0.1
Cover Tape Thickness
0.1 max
Max. Component Rotation or Tilt
10°
Min. Bending Radius
30
www.fairchildsemi.com
16
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification (Continued)
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Reflow Profile
Small Outline
300
260°C
280
260
>245°C = 42 Sec
240
220
200
180
Temperature
(°C)
160
Time above
140
183°C = 90 Sec
120
1.822°C/Sec Ramp up rate
100
80
60
40
33 Sec
20
0
0
60
120
180
270
360
Time (s)
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
17
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Reflow Profile
(Continued)
DIP and SMT
Temperature (°C)
TP
260
240
TL
220
200
180
160
140
120
100
80
60
40
20
0
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
tP
Tsmax
tL
Preheat Area
Tsmin
ts
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Pb-Free Assembly Profile
Temperature Min. (Tsmin)
150°C
Temperature Max. (Tsmax)
200°C
Time (tS) from (Tsmin to Tsmax)
60–120 seconds
Ramp-up Rate (tL to tP)
3°C/second max.
Liquidous Temperature (TL)
217°C
Time (tL) Maintained Above (TL)
60–150 seconds
Peak Body Package Temperature
260°C +0°C / –5°C
Time (tP) within 5°C of 260°C
30 seconds
Ramp-down Rate (TP to TL)
6°C/second max.
Time 25°C to Peak Temperature
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
8 minutes max.
www.fairchildsemi.com
18
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
©2008 Fairchild Semiconductor Corporation
FOD060L, FOD260L Rev. 1.0.5
www.fairchildsemi.com
19