Revised January 2004 CD4017BC • CD4022BC Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs General Description Features The CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. ■ Wide supply voltage range: 3.0V to 15V The CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. ■ Low power Fan out of 2 driving 74L These counters are cleared to their zero count by a logical “1” on their reset line. These counters are advanced on the positive edge of the clock signal when the clock enable signal is in the logical “0” state. The configuration of the CD4017BC and CD4022BC permits medium speed operation and assures a hazard free counting sequence. The 10/8 decoded outputs are normally in the logical “0” state and go to the logical “1” state only at their respective time slot. Each decoded output remains high for 1 full clock cycle. The carry-out signal completes a full cycle for every 10/8 clock input cycles and is used as a ripple carry signal to any succeeding stages. ■ High noise immunity: 0.45 VDD (typ.) TTL compatibility: or 1 driving 74LS ■ Medium speed operation: 5.0 MHz (typ.) with 10V VDD ■ Low power: 10 µW (typ.) ■ Fully static operation Applications • Automotive • Instrumentation • Medical electronics • Alarm systems • Industrial electronics • Remote metering Ordering Code: Order Number CD4017BCM Package Number M16A Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4017BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD4022BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4022BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams CD4017B CD4022B Top View Top View © 2004 Fairchild Semiconductor Corporation DS005950 www.fairchildsemi.com CD4017BC • CD4022BC Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs October 1987 CD4017BC • CD4022BC Logic Diagrams CD4017B Terminal No. 8 = GND Terminal No. 16 = VDD CD4022B Terminal No. 16 = VDD Terminal No. 8 = GND www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) −0.5 VDC to +18 VDC Input Voltage (VIN) −65°C to +150°C Storage Temperature (TS) +3 VDC to +15 VDC DC Supply Voltage (VDD) −0.5 VDC to VDD +0.5 VDC 0 to VDD VDC Operating Temperature Range (TA) −55°C to +125°C Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Lead Temperature (TL) 260°C (Soldering, 10 seconds) DC Electrical Characteristics Symbol IDD VOL VOH VIL Parameter IOL IOH IIN (Note 2) −55°C Conditions Min +25° Max Min +125°C Typ Max Min Max Quiescent Device VDD = 5V 5 0.3 5 150 Current VDD = 10V 10 0.5 10 300 VDD = 15V 20 1.0 20 600 LOW Level |IO| < 1.0 µA Output Voltage VDD = 5V 0.05 0 0.05 0.05 VDD = 10V 0.05 0 0.05 0.05 VDD = 15V 0.05 0 0.05 0.05 HIGH Level |IO| < 1.0 µA Output Voltage VDD = 5V 4.95 4.95 5 VDD = 10V 9.95 9.95 10 9.95 VDD = 15V 14.95 14.95 15 14.95 LOW Level Input Voltage VIH Note 2: VSS = 0V unless otherwise specified. µA V 4.95 V |IO| < 1.0 µA VDD = 5V, VO = 0.5V or 4.5V 1.5 1.5 1.5 VDD = 10V, VO = 1.0V or 9.0V 3.0 3.0 3.0 VDD = 15V, VO = 1.5V or 13.5V 4.0 4.0 4.0 HIGH Level |IO| < 1.0 µA Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 VDD = 10V, VO = 1.0V or 9.0V 7.0 7.0 7.0 VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 LOW Level Output VDD = 5V, VO = 0.4V 0.64 0.51 0.88 Current (Note 3) VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9 VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4 HIGH Level Output VDD = 5V, VO = 4.6V −0.25 −0.2 −0.36 −0.14 Current (Note 3) VDD = 10V, VO = 9.5V −0.62 −0.5 −0.9 −0.35 VDD = 15V, VO = 13.5V −1.8 −1.5 −3.5 −1.1 Input Current Units V 3.5 V 0.36 mA mA VDD = 15V, VIN = 0V −0.1 −10−5 −0.1 −1.0 VDD = 15V, VIN = 15V 0.1 10−5 0.1 1.0 µA Note 3: IOL and IOH are tested one output at a time. 3 www.fairchildsemi.com CD4017BC • CD4022BC Absolute Maximum Ratings(Note 1) CD4017BC • CD4022BC AC Electrical Characteristics (Note 4) TA= 25°C, CL= 50 pF, RL= 200k, trCL and tfCL= 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units CLOCK OPERATION tPHL, tPLH Propagation Delay Time Carry Out Line VDD = 5V 415 800 VDD = 10V 160 320 VDD = 15V 130 250 VDD = 5V Carry Out Line VDD = 10V CL = 15 pF VDD = 15V Decode Out Lines 240 480 85 170 70 140 VDD = 5V 500 1000 VDD = 10V 200 400 VDD = 15V 160 320 ns ns ns tTLH, tTHL Transition Time Carry Out and Decode Out Lines tTLH tTHL fCL tWL, tWH trCL, tfCL tSU CIN Maximum Clock Frequency Minimum Clock Pulse Width Clock Rise and Fall Time Minimum Clock Inhibit Data Setup Time VDD = 5V 200 360 VDD = 10V 100 180 VDD = 15V 80 130 VDD = 5V 100 200 VDD = 10V 50 100 VDD = 15V 40 80 VDD = 5V Measured with 1.0 VDD = 10V Respect to Carry 2.5 5 VDD = 15V Output Line 3.0 6 ns ns 2 MHz VDD = 5V 125 250 VDD = 10V 45 90 VDD = 15V 35 70 VDD = 5V 20 VDD = 10V 15 VDD = 15V 5 VDD = 5V 120 240 VDD = 10V 40 80 VDD = 15V 32 65 5 7.5 Average Input Capacitance ns µs ns pF Note 4: AC Parameters are guaranteed by DC correlated testing. AC Electrical Characteristics (Note 4) TA = 25°C, CL = 50 pF, RL = 200k, trCL and tfCL = 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units RESET OPERATION tPHL, tPLH Propagation Delay Time Carry Out Line Carry Out Line VDD = 5V 415 800 VDD = 10V 160 320 VDD = 15V 130 250 240 480 85 170 70 140 VDD = 5V VDD = 10V CL = 15 pF VDD = 15V VDD = 5V 500 1000 VDD = 10V 200 400 VDD = 15V 160 320 Minimum Reset VDD = 5V 200 400 Pulse Width VDD = 10V 70 140 VDD = 15V 55 110 Minimum Reset VDD = 5V 75 150 Removal Time VDD = 10V 30 60 VDD = 15V 25 50 Decode Out Lines tW tREM www.fairchildsemi.com 4 ns ns ns ns ns CD4017BC • CD4022BC Timing Diagrams CD4017B CD4022B 5 www.fairchildsemi.com CD4017BC • CD4022BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A www.fairchildsemi.com 6 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com CD4017BC • CD4022BC Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued)