NSC DS36C280 Slew rate controlled cmos eia-rs-485 transceiver Datasheet

DS36C280
Slew Rate Controlled CMOS EIA-RS-485 Transceiver
General Description
Features
The DS36C280 is a low power differential bus/line transceiver designed to meet the requirements of RS-485 Standard for multipoint data transmission. In addition, it is compatible with TIA/EIA-422-B.
The slew rate control feature allows the user to set the driver
rise and fall times by using an external resistor. Controlled
edge rates can reduce switching EMI.
The CMOS design offers significant power savings over its
bipolar and ALS counterparts without sacrificing ruggedness
against ESD damage. The device is ideal for use in battery
powered or power conscious applications. ICC is specified at
500 µA maximum.
The driver and receiver outputs feature TRI-STATE ® capability. The driver outputs operate over the entire common
mode range of −7V to +12V. Bus contention or fault situations are handled by a thermal shutdown circuit, which
forces the driver outputs into the high impedance state.
The receiver incorporates a fail safe circuit which guarantees
a high output state when the inputs are left open (Note 1) .
n 100% RS-485 compliant
— Guaranteed RS-485 device interoperation
n Low power CMOS design: ICC 500 µA max
n Adjustable slew rate control
— Minimizes EMI affects
n Built-in power up/down glitch-free circuitry
— Permits live transceiver insertion/displacement
n SOIC packages
n Industrial temperature range: −40˚C to +85˚C
n On-board thermal shutdown circuitry
— Prevents damage to the device in the event of
excessive power dissipation
n Wide common mode range: −7V to +12V
n Receiver open input fail-safe (Note 1)
n 1⁄4 unit load (DS36C280): ≥128 nodes
n 1⁄2 unit load (DS36C280T): ≥64 nodes
n ESD (human body model): ≥2 kV
Connection and Logic Diagram
Truth Table
DRIVER SECTION
DE/RE*
DI
DO/RI
H
H
H
DO*/RI*
L
H
L
L
H
L
X
Z
Z
RECEIVER SECTION
01205201
Order Number DS36C280M, DS36C280TM
See NS Package Number M08A
DE/RE*
RI-RI*
RO
L
≥+0.2V
H
L
≤−0.2V
L
H
X
Z
L
OPEN (Note 1)
H
Note 1: Non-terminated, Open Inputs only
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS012052
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DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
July 2000
DS36C280
Absolute Maximum Ratings (Note 2)
Storage Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Lead Temperature
Supply Voltage (VCC)
Recommended Operating
Conditions
−0.5V to (VCC +0.5V)
Common Mode (VCM)
Driver Output/Receiver
Input
± 15V
Supply Voltage (VCC)
Min
Typ
Max
Units
+4.75
+5.0
+5.25
V
+12
V
Bus Voltage
Input Voltage (DO/RI,
DO*/RI*)
± 14V
Receiver Output Voltage
−7
Operating Free Air Temperature (TA)
−0.5V to (VCC +0.5V)
DS36C280T
Maximum Package Power Dissipation @ +25˚C
M Package 1190 mV,
derate
+260˚C
(Soldering 4 sec.)
+12V
Input Voltage (DE/RE*, & DI)
−65˚C to +150˚C
DS36C280
−40
+25
+85
˚C
0
+25
+70
˚C
9.5 mW/˚C above +25˚C
Electrical Characteristics (Notes 3, 4)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
1.5
5.0
V
0
5.0
V
0
5.0
V
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD1
Differential Output Voltage
IO = 0 mA (No Load)
VOD0
Output Voltage
IO = 0 mA
VOD0*
Output Voltage
(Output to GND)
VOD2
Differential Output Voltage
(Termination Load)
RL = 50Ω
(422)
RL = 27Ω
(485)
Balance of VOD2
RL = 27Ω or 50Ω
∆VOD2
(422)
(485)
(Note 5)
|VOD2 − VOD2*|
VOD3
VOC
∆VOC
IOSD
Figure 1
2.0
2.8
1.5
2.3
5.0
V
V
−0.2
0.1
+0.2
V
1.5
2.0
5.0
V
(422, 485)
Differential Output Voltage
(Full Load)
R1 = 54Ω, R2 = 375Ω
VTEST = −7V to +12V
Figure 2
Driver Common Mode
Output Voltage
RL = 27Ω
(485)
RL = 50Ω
(422)
Figure 1
(Note 5)
0
3.0
V
0
3.0
V
−0.2
+0.2
V
Balance of VOC
RL = 27Ω or
|VOC − VOC*|
RL = 50Ω
Driver Output Short-Circuit
Current
VO = +12V
(485) Figure 4
200
+250
mA
VO = −7V
(485)
−190
−250
mA
+0.035
+0.2
V
(422, 485)
RECEIVER CHARACTERISTICS
VTH
VTL
Differential Input High
Threshold Voltage
−7V ≤ VCM ≤ +12V
VO = VOH, IO = −0.4 mA
Differential Input Low
Threshold Voltage
−7V ≤ VCM ≤ +12V
VO = VOL, IO = 0.4 mA
(Note 6)
(422, 485)
−0.2
−0.035
V
VHST
Hysteresis
VCM = 0V
70
mV
RIN
Input Resistance
−7V ≤ VCM ≤ +12V
DS36C280T
24
68
kΩ
RIN
Input Resistance
−7V ≤ VCM ≤ +12V
DS36C280
48
68
kΩ
IIN
Line Input Current
(Note 8)
DE = VIL, RE* = VIL
Other Input = 0V
VCC = 4.75 to 5.25
DS36C280
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
DS36C280T
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
−0.4
mA
DS36C280
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
or 0V
IING
Line Input Current
Glitch (Note 8)
Other Input = 0V
DE = VIL, RE* = VIL
VCC = +3.0V
DS36C280T
or 0V TA = 25˚C
IB
Input Balance Test
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RS = 500Ω
(422) (Note 10)
2
−0.4
mA
± 400
mV
(Continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
RO
Figure 11
3.5
RO
7
Typ
Max
Units
0.5
V
85
mA
±1
µA
RECEIVER CHARACTERISTICS
VOH
High Level Output Voltage
IOH = −4 mA, VID = +0.2V
VOL
Low Level Output Voltage
IOL = +4 mA, VID = −0.2V
IOSR
Short Circuit Current
VO = GND
IOZR
TRI-STATE Leakage
Current
VO = 0.4V to 2.4V
4.6
V
0.3
35
DEVICE CHARACTERISTICS
VIH
High Level Input Voltage
2.0
VCC
V
VIL
Low Level Input Voltage
GND
0.8
V
IIH
High Level Input Current
VIH = VCC
2
µA
IIL
Low Level Input Current
VCC = 5.0V
−2
µA
DE/RE*,
DI
VIL = 0V
VCC = +3.0V
SR = 0V
ICCR
ICCD
Power Supply Current
(No Load)
−2
µA
−1
mA
200
500
µA
200
500
µA
SR
Driver OFF, Receiver ON
VCC
Driver ON, Receiver OFF
Switching Characteristics (Notes 4, 9, 11)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
Figures 5, 6
10
399
1000
ns
DRIVER CHARACTERISTICS
tPHLD
Differential Propagation
Delay High to Low
tPLHD
Differential Propagation
Delay Low to High
10
400
1000
ns
tSKD
Differential Skew
0
1
10
ns
RL = 54Ω, CL = 100 pF
|tPHLD − tPLHD|
tr
Rise Time
tf
Fall Time
tr
Rise Time
tf
Fall Time
tr
Rise Time
tf
Fall Time
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
SR = Open
SR = 100 kΩ
2870
ns
3070
ns
1590
ns
1640
SR = Short
100
100
CL = 15 pF
CL = 100 pF
ns
337
1000
ns
ns
348
1000
Figures 7, 8
1100
2000
ns
Figures 9, 10
500
800
ns
Figures 7, 8
300
500
ns
Figures 9, 10
300
500
ns
30
210
400
ns
30
190
400
ns
0
20
50
ns
RECEIVER CHARACTERISTICS
tPHL
Propagation Delay
High to Low
tPLH
Propagation Delay
Low to High
tSK
Skew, |tPHL − tPLH|
tPLZ
Output Disable Time
CL = 15 pF
Figures 12, 13
CL = 15 pF
tPHZ
tPZL
Figures 14, 15, 16
Output Enable Time
tPZH
50
150
ns
55
150
ns
40
150
ns
45
150
ns
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
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DS36C280
Electrical Characteristics (Notes 3, 4)
DS36C280
Switching Characteristics (Notes 4, 9, 11)
(Continued)
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD1 and
VOD2.
Note 4: All typicals are given for: VCC = +5.0V, TA = + 25˚C.
Note 5: Delta |VOD2| and Delta |VOC| are changes in magnitude of VOD2 and VOC, respectively, that occur when input changes state.
Note 6: Threshold parameter limits specified as an algebraic value rather than by magnitude.
Note 7: Hysteresis defined as VHST = VTH − VTL.
Note 8: IIN includes the receiver input current and driver TRI-STATE leakage current.
Note 9: CL includes probe and jig capacitance.
Note 10: For complete details of test, see RS-485.
Note 11: SR = GND for all Switching Characteristics unless otherwise specified.
Parameter Measurement Information
01205202
FIGURE 1. Driver VOD2 and VOC
01205205
FIGURE 5. Driver Differential
Propagation Delay Test Circuit
01205218
FIGURE 2. Driver VOD3
01205203
FIGURE 3. Driver VOH and VOL
01205206
FIGURE 6. Driver Differential Propagation Delays
and Differential Rise and Fall Times
01205204
Vtest = −7V to +12V
FIGURE 4. Driver IOSD
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4
DS36C280
Parameter Measurement
Information (Continued)
01205210
FIGURE 10. TRI-STATE Waveforms (tPZL, tPLZ)
01205207
FIGURE 7. TRI-STATE Test Circuit (tPZH , tPHZ)
01205211
FIGURE 11. Receiver VOH and VOL
01205208
FIGURE 8. TRI-STATE Waveforms (tPZH, tPHZ)
01205212
FIGURE 12. Receiver Differential
Propagation Delay Test Circuit
01205209
FIGURE 9. TRI-STATE Test Circuit (tPZL, tPLZ)
01205213
FIGURE 13. Receiver Differential Propagation Delay Waveforms
5
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DS36C280
Parameter Measurement Information
(Continued)
01205214
FIGURE 14. Receiver TRI-STATE Test Circuit
01205215
FIGURE 15. Receiver Enable and Disable Waveforms (tPLZ, tPZL)
01205216
FIGURE 16. Receiver Enable and Disable Waveforms (tPHZ, tPZH)
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6
DS36C280
Typical Application Information
01205217
FIGURE 17. Typical Pin Connection
TABLE 1. Device Pin Descriptions
Pin
#
Name
Description
Receiver Output: When DE/RE* (Receiver Enable) is LOW, the receiver is enabled (ON), if DO/RI ≥
DO*/RI* by 200 mV, RO will be HIGH. If DO/RI ≤ DO*/RI* by 200 mV, RO will be LOW. Additionally RO will
be HIGH for OPEN (Non-terminated) inputs.
1
RO
2
SR
Slew Rate Control: A resistor connected to Ground controls the Driver Output rising and falling edge rates.
3
DE/RE*
Combined Driver and Receiver Output Enable: When signal is LOW the receiver output is enabled and the
driver outputs are in TRI-STATE (OFF). When signaI is HlGH, the receiver output is in TRI-STATE (OFF)
and the driver outputs are enabled.
4
DI
Driver Input: When DE/RE* is HlGH, the driver is enabled, if DI is LOW, then DO/RI will be LOW and
DO*/RI* will be HIGH. If DI is HIGH, then DO/RI is HIGH and DO*/RI* is LOW.
5
GND
Ground Connection
6
DO/RI
Driver Output/Receiver Input, 485 Bus Pin.
7
DO*/RI*
Driver Output/Receiver Input, 485 Bus Pin.
8
VCC
Positive Power Supply Connection: Recommended operating range for VCC is +4.75V to +5.25V.
−3V stay the same. The other reference points are +12V at
+0.5 mA for the top border and −7V at −0.4 mA for the
bottom border (see Figure 18 ). Second, for a 1⁄4 UL device
the top and bottom borders shown in Figure 18 are scaled
also. Again, both 0 mA reference points at +5V and −3V stay
the same. The other reference points are +12V at +0.25 mA
for the top border and −7V at −0.2 mA for the bottom border
(see Figure 18 ).
The advantage of the 1⁄2 UL and 1⁄4 UL devices is the
increased number of nodes on one bus. In a single master
multi-slave type of application were the number of slaves
exceeds 32, the DS36C278/279/280 may save in the cost of
extra devices like repeaters, extra media like cable, and/or
extra components like resistors.
The DS36C279 and DS36C280 have addition feature which
offer more advantages. The DS36C279 has an automatic
sleep mode function for power conscious applications. The
DS36C280 has a slew rate control for EMI conscious applications. Refer to the sleep mode and slew rate control
portion of the application information section in the corresponding datasheet for more information on these features.
Unit Load
A unit load for a RS-485 receiver is defined by the input
current versus the input voltage curve. The gray shaded
region is the defined operating range from −7V to +12V. The
top border extending from −3V at 0 mA to +12V at +1 mA is
defined as one unit load. Likewise, the bottom border extending from +5V at 0 mA to −7V at −0.8 mA is also defined
as one unit load (see Figure 18 ). A RS-485 driver is capable
of driving up to 32 unit loads. This allows upto 32 nodes on
a single bus. Although sufficient for many applications, it is
sometime desirable to have even more nodes. For example
an aircraft that has 32 rows with 4 seats per row could
benefit from having 128 nodes on one bus. This would allow
signals to be transferred to and from each individual seat to
1 main station. Usually there is one or two less seats in the
last row of the aircraft near the restrooms and food storage
area. This frees the node for the main station.
The DS36C278, the DS36C279, and the DS36C280 all have
1⁄2 unit load and 1⁄4 unit load (UL) options available. These
devices will allow upto 64 nodes or 128 nodes guaranteed
over temperature depending upon which option is selected.
The 1⁄2 UL option is available in industrial temperature and
the 1⁄4 UL is available in commercial temperature.
First, for a 1⁄2 UL device the top and bottom borders shown in
Figure 18 are scaled. Both 0 mA reference points at +5V and
7
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DS36C280
Unit Load
tion fixed edge rate devices. The slew rate control may be
adjusted with or without any external components. The
DS36C280 offers both low power (ICC 500 µA max) and low
EMI for an RS-485 interface.
(Continued)
The slew rate control is located at pin two of the device and
only controls the driver output edges. The slew rate control
pin (SR) may be left open or shorted to ground, with or
without a resistor. When the SR pin is shorted to ground
without a resistor, the driver output edges will transition
typically 350 ns. When the SR pin is left open, the driver
output edges will transition typically 3 µs. When the SR pin is
shorted to ground with a resistor, the driver output edges will
transition between 350 ns and 3 µs depending on the resistor value. Refer to the slew rate versus resistor value curve
in this datasheet for determining resistor values and expected typical slew rate value. Please note, when slowing
the edge rates of the device (see Figure 19 ) will decrease
the maximum data rate also.
01205219
FIGURE 18. Input Current vs Input Voltage
Operating Range
Slew Rate Control
The DS36C280 features an adjustable slew rate control.
This feature allows more control over EMl levels than tradiDifferential Rise/Fall Time
vs Slew Rate Resistor
01205220
FIGURE 19. Slew Rate Resistor
vs Rise/Fall Time
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8
DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC
Order Number DS36C280M or DS36C280TM
NS Package Number M08A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned
Substances’’ as defined in CSP-9-111S2.
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