BD7904FS
Optical disc ICs
5ch Power Driver for
CD-ROM, DVD-ROM
BD7904FS
BD7904FS is a 5-channel driver IC that integrates all drivers and 3.3V regulator necessary for CD-ROM, and DVD-ROM
systems into a single chip. Low head operation can be achieved by applying the PWM driving system for sled and
spindle motor drivers.
!Applications
CD-ROM, DVD-ROM
!Features
1) 3channel BTL driver, 1channel PWM driver and 3phase motor driver.
- ALL of the motor and actuator for CD-ROM, DVD-ROM etc.
2) ON/OFF for each driver, brake mode switching of spindle, and stand-by mode switching can be controlled by the two
control terminals.
3) Built-in triangular-wave generator.
4) SSOP-A54 for strong head radiation.
5) Built in thermal-shut-down circuit.
6) FG 3phase synthetic output.
!Absolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
Unit
POWER MOS
power suuply voltage
SPVM1,2,SLRNF
15∗1
V
Preblock/BTL powerblock
power supply voltage
VCC,SLVDD,AVM
15
V
PWM control block, REG
power supply voltage
DVCC
7
V
Pd
2.6∗2
W
Operating temperature range
Topr
−35~+85
°C
Storage temperature
Tstg
−55~+150
°C
Power dissipation
∗1 POWER MOS output terminals (10, 11, 18, 47, 48pin) is contained.
∗2 PCB (70mm×70mm×1.6mm glass epoxy) mounting.
Reduced by 20.8mW for each increase in Ta of 1°C over 25°C.
1/18
BD7904FS
Optical disc ICs
!Recommended operating conditions (Ta=25°C)
(Set the power supply voltage taking allowable dissipation into considering)
Parameter
Symbol
Min.
Typ.
Max.
Unit
−
V
−
V
POWER MOS Power supply voltage 1
SPVM1, 2
−
VCC∗3
POWER MOS Power supply voltage 2
SLRNF
−
SLVDD∗3
Preblock Power supply voltage
SLVDD, VCC
AVM
12
14
V
Power block Power supply voltage
AVM
4.3
5.0
VCC
V
PWM control block, REG Power supply voltage
DVCC
4.3
5.0
6.0
V
Spindle output current
Iosp
−
1.0
2.5∗4
A
SL/FO/TR/LO output current
Ioo
−
0.5
0.8
A
∗3 Set the same supply voltage to VCC and SPVM1, 2 to SLVDD and SLRNF.
∗4 The current is guaranteed 3.0A in case of the current is turned on/off in a duty-ratio of
less than 1/10 with a maximum on-time of 5msec.
TKO+
TKO−
FCO+
FCO−
FCOPO
FCOPI
AVM
TKOPO
TKOPI
REGGND
46
AGND
LDO+
47
GND
SLO−
48
GND
SLO+
49
GND
SLVDD
50
GND
SLOPO
51
GND
SLOPI
52
LDO−
SLRNF
53
VCC
LDIN
54
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
+
PRE
LOGIC
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
−
+
TSD
+
FF
+
+
−
−
+
−
−
+
−
FG
−
FG
!Block diagram
OSC
LIMIT
Current
COMP
FF
FG
REVERSE
DETECT
BG
(1.3V)
Current
LIMIT
OSC
Polarity
COMP
PWM
OUT
+
−
3-phase
MATRIX
+
−
VC
STBY/
BRAKE
CONTROL
+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
HU−
HV+
HV−
SPVM1
HW+
HW−
CTL1
CTL2
U
V
GND
GND
GND
GND
GND
PGND
W
VC
SPIN
SPRNF
HB
SPVM2
DGND
DVCC
REGOUT
REGNF
HALL
BIAS
HU+
−
2/18
BD7904FS
Optical disc ICs
!Pin descriptions
Pin No.
Pin name
Pin No.
Pin name
1
HU+
Hall amp. U positive input
Function
28
REGGND
Function
2
HU−
Hall amp. U negative input
29
TKOPI
Tracking driver OP-AMP-input
3
HV+
Hall amp. V positive input
30
TKOPO
Tracking driver OP-AMP output
4
HV−
Hall amp. V negative input
31
AVM
5
SPVM1
Spindle driver power supply 1
32
FCOPI
Focus driver OP-AMP-input
6
HW+
Hall amp. W positive input
33
FCOPO
Focus driver OP-AMP output
7
HW−
Hall amp. W negative input
34
FCO−
Focus driver negative output
8
CTL1
Driver logic control input 1
35
FCO+
Focus driver positive output
9
CTL2
Driver logic control input 2
36
TKO−
Tracking driver negative output
10
U
Spindle driver output U
37
TKO+
Tracking driver positive output
11
V
Spindle driver output V
38
AGND
Ground
12
GND
GND
39
GND
GND
13
GND
GND
40
GND
GND
14
GND
GND
41
GND
GND
15
GND
GND
42
GND
GND
16
GND
GND
43
GND
GND
17
PGND
Spindle driver power ground
44
VCC
18
W
Spindle driver output W
45
LDO−
Loading driver negative output
19
VC
Reference voltage input
46
LDO+
Loading driver positive output
20
SPIN
Spindle driver input
47
SLO−
Sled driver negative output
21
SPRNF
Spindle driver current sense
48
SLO+
Sled driver positive output
Regulator block ground
Actuator driver block power supply
BTL pre and Loading power supply
22
HB
Hall bias
49
SLVDD
Sled driver PowerMOS pre-supply
23
SPVM2
Spindle driver power supply 2
50
SLOPO
Sled driver OP-AMP output
24
DGND
PWM block pre-ground
51
SLOPI
Sled driver OP-AMP- input
PWM block control power supply
52
SLRNF
Sled driver current sense
Regulator output voltage pin
53
LDIN
Regulator return pin
54
FG
25
DVCC
26
REGOUT
27
REGNF
Loading driver input
Frequency generator output
∗ Positive/negative of the output terminals are determined in reference to those of the input terminals.
3/18
BD7904FS
Optical disc ICs
!Input output circuit
Three-phase motor driver output
23
Spindle driver current detection input
Hall bias
5
25pin
44pin
18
11
22
21
10
17
FG signal output
Hall signal input
25pin
25pin
25pin
25pin
1
2
3
4
6
7
54
BTL driver output FO, TK
PWM driver output SLED
BTL driver output LD
52
31pin
44pin
47
48
44pin
44pin
35
34
37
36
44pin
44pin
45
46
38
BTL driver input FO, TK
PWM driver input SLED1, 2
44pin
49pin
PWM driver input Spindle
25pin
25pin
44pin
49pin
20
29
32
51
×6
×5
VC
VC
4/18
BD7904FS
Optical disc ICs
Control signal reference voltage input
PWM driver input LOADING
44pin
44pin
10kΩ
44pin
15kΩ
×2
50kΩ
19
53
50kΩ
20kΩ
VC
Regulator REGNF terminal
Regulator output
25pin
25pin
25pin
×30
25pin
27
20kΩ
51.5kΩ
B.G.
32.76kΩ
26
28
Control signal input
25pin
25pin
50kΩ
50kΩ
8
9
50kΩ
5/18
BD7904FS
Optical disc ICs
!Electrical characteristics
(unless otherwise noted, Ta=25°C, SLVDD=VCC=12V, DVCC=AVM=5V, VC=1.65V, SPRNF=0.33Ω, SLRNF=0.5Ω)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Circuit
Quiescent current 1
IQ1
−
11
19
mA
VCC (Loading OFF)
Fig1, 2
Quiescent current 2
IQ2
−
9.5
16
mA
VCC (Loading ON)
Fig1, 2
Quiescent current 3
IQ3
−
3.5
6.5
mA
DVCC
Fig1, 2
Standby-on current 1
IST1
−
2.2
3.7
mA
VCC
Fig1, 2
Standby-on current 2
IST2
−
0.65
1.0
mA
DVCC
Fig1, 2
VHB
0.7
1.2
1.6
V
IHB=10mA
Fig1, 2
Circuit current
Spindle driver block 〈 Hall bias 〉
Hall bias voltage
Spindle driver block 〈 Hall amplifier 〉
Fig1, 2
Input bias current
IHIB
−
1
5
µA
Fig1, 2
Minimum input level
VHIM
50
−
−
mVPP
Fig1, 2
VHICM
1
−
4
V
Fig1, 2
Common mode input Range
Spindle driver block 〈 Torque control 〉
Fig1, 2
20
2.4
(0.8)
−
50
3.0
(1.0)
0.6
90
3.6
(1.2)
1.0
mV
A/V
(V/V)
Ω
fosc
−
0.74
(0.24)
−
0.35
0.95
(0.31)
100
0.7
1.16
(0.38)
−
Ω
A
(V)
kHz
High voltage
VFGH
−
4.9
−
V
Low voltage
VFGL
−
0.1
−
V
VDZSL
0
0.8
(0.4)
−
10
1.0
(0.5)
1.5
40
1.2
(0.6)
2.0
mV
A/V
(V/V)
Ω
fosc
−
0.48
(0.24)
−
0.9
0.62
(0.31)
100
1.4
0.76
(0.38)
−
Ω
A
(V)
kHz
Output offset voltage
VOFFT
−50
0
50
mV
Output saturation voltage "H"
VOHFT
−
0.45
0.8
V
Io=500mA
Fig1, 2
Output saturation voltage "L"
VOLFT
−
0.45
0.8
V
Io=500mA
Fig1, 2
Voltage gain
GVFT
16.0
17.5
19.0
dB
Input dead zone (one side)
VDZSP
Input output gain
gmSP
Output ON resistor (upper)
RONUSP
Output ON resistor (lower)
RONLSL
Output limit current
ILIMSL
PWM frequency
SPRNF=0.33Ω
Fig1, 2
Ip=500mA
Io=500mA
Fig1, 2
SPRNF=0.33Ω
Fig1, 2
Fig1, 2
Spindle driver block 〈 FG output 〉
100kΩ pull up to DVCC
Fig1, 2
Sled driver block
Input dead zone (one side)
Input output gain
Fig1, 2
gmSL
Output ON resistor (upper)
RONUSL
Output ON resistor (lower)
RONLSL
Output limit current
PWM frequency
Fig1, 2
ILIMSL
Fig1, 2
SLRNF=0.5Ω
Fig1, 2
Io=500mA
Fig1, 2
Io=500mA
SLRNF=0.5Ω
Fig1, 2
Fig1, 2
Actuator driver block
Fig1, 2
Fig1, 2
This product is not designed for protection against redioactive rays.
6/18
BD7904FS
Optical disc ICs
Parameter
Symbol
Min.
Typ.
Max.
Unit
−6
0
6
mV
300
10.8
(4.0)
−
nA
mA
−
mA
−
V
0.4
V
Conditions
Circuit
Sled/Actuator driver pre-operational amplifier block
Input offset voltage
VOFOP
Fig1, 2
Input bias current
IBOP
−
20
Common mode input range
VICM
0.4
−
IOSOOP
0.3
−
Output sink current
IOSIOP
"H" level output voltage
VOHOP
"L" level output voltage
VOLOP
3
11.5
(4.5)
0
−
11.9
(4.9)
0.1
Output offset voltage
VOFLD
−50
0
50
mV
Output saturation voltage "H"
VOHLD
−
1.1
1.4
V
Io=500mA
Fig1, 2
Output saturation voltage "L"
VOLLD
−
0.45
0.8
V
Io=500mA
Fig1, 2
Voltage gain
GVLD
16.0
17.5
19.0
dB
Fig1, 2
ROUT pin output voltage
VREG
3.13
3.3
3.47
V
Fig1, 2
Peak output current
IorMax
−
−
500
mA
Fig1, 2
Load regulation
∆VRL
−
10
30
mV
Ireg=100mA, VROUT=3.3V
Fig1, 2
Line regulation
∆VVCC
−
3
10
mV
DVCC=4.5~5.5V
Fig1, 2
Input high voltage
VIH
2.0
−
−
V
Fig1, 2
Input low voltage
VIL
−
−
0.5
V
Fig1, 2
VC drop-muting
VMVC
0.4
0.7
1.0
V
Fig1, 2
VCC drop-muting
VMVCC
3.4
3.8
4.2
V
Fig1, 2
Output source current
V
Fig1, 2
( ) : Sled block
Fig1, 2
Fig1, 2
Fig1, 2
( ) : Sled block
Fig1, 2
Fig1, 2
Loading driver block
Fig1, 2
Regulator block
CTL1, CTL2
Others
This product is not designed for protection against radioactive rays.
7/18
BD7904FS
Optical disc ICs
!Measurement circuits
SLRNF
36
35
34
33
32
OPAMP
A3
IN−
37
AVM
OUT
IN−
OPAMP
A2
OUT
+
FC
OUT-A2
OUT−
TK
OUT-A3
VCC
OUT+
LD
OUT-A4
OUT−
LDIN
SL
OUT-A1
OUT+
OUT
IN−
100k
OPAMP
A1
OUT−
1
VFGH
30
29
A
IQVC
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
+
PRE
LOGIC
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
−
+
TSD
+
FF
+
+
−
−
+
−
−
+
28
−
FG
31
−
V
OUT+
SW-SL
2
DVCC
OUT−
V
OUT+
VSLRNF
SLVM
OSC
LIMIT
Current
COMP
FF
REVERSE
DETECT
FG
BG
(1.3V)
Current
LIMIT
OSC
Polarity
COMP
PWM
OUT
IU+
2
A
3
IV+
+
HU+
4
5
A
IW+
+
7
6
8
9
−
10
11
12
13
14
15
16
2
A
+
VRNF
V
17
18
A
+
A
IV−
+
20
21
1
VC
A
IW−
−
HALL
BIAS
22
SW-SP
CTL1 CTL2
IU−
19
+
23
24
25
IQDV
A
RNF
HW+
HV+
+
VC
STBY/
BRAKE
CONTROL
1
+
−
3-phase
MATRIX
+
SPIN
IHB
+
26
27
IReg
DVCC
SPVM
[ =VCC ]
H−
U
V
W
OUTSP
Fig.1
8/18
BD7904FS
Optical disc ICs
OPAMP
OPOUT
OPIN−
SW-OP
2
30k
1
V
VOF
30k
IOP
V
VOOP
IOPB
VC
IN−
V
47µH
OUT−
OUT-A
OUT+
A
VO SW-RL
RL
2
1
1
1
SW-IL
SW-IL
2
2
IL
IL
∗A2, A3, and A4 require no coil. (47µH)
OUTSP
U
V
W
2
1
RLSP
47µH
SW-RL
2
RLSP
1
SW-RL
RLSP
47µH
47µH
2
1
3
SW-IL
IL
Fig.2
9/18
BD7904FS
Optical disc ICs
!Table of measure circuit switches position 1
(VCC=SPVM=SLVM=12V, DVCC=AVM=5V, VC=1.65V, RL (act) =8Ω, RL (SL) =8Ω+47µH, RL (SP) =2Ω+47µH,
SLRNF=0.5Ω, SPRNF=0.33Ω, H−=2.5V, HU+=2.6V, HV+=HW+=2.4V)
INPUT
Designation
CTL
SWITCH
Measure
point
Conditions
RL SP SL
IL
OP
1
1
1
1
1
IQVC
L
1
1
1
1
1
IQVC
H
1
1
1
1
1
IQDV
L
1
1
1
1
1
IQVC
L
1
1
1
1
1
IQDV
H
H
2
1
1
1
1
∗1 Check VSLRNF with no output at VIN=VC
Check VSLRNF with output at VIN=VC±40mV
VSLRNF
H
H
2
1
1
1
1
See bellow
VSLRNF
2
1
ILSL=500mA
2
2
1
ILSL=−500mA
1
1
1
1
VSLRNF
1
1
1
1
VOSL+
VIN
1
2
IQ1
−
L
H
IQ2
−
H
IQ3
−
L
IST1
−
L
IST2
−
L
*1
gmSL
*2
RONUSL
3.3V
(0V)
H
H
1
1
2
RONLSL
0V
(3.3V)
H
H
1
1
ILIMSL
3.3V
(0V)
H
H
2
fosc
1.45
H
H
2
Circuit current
Sled driver block
VDZSL
lop
VRNF4/RNF
12V − VOSL + (−)
RON=
0.5A
RON=
OUT+ (−)
VOSL + (−)
0.5A
OUT+ (−)
Iosp
Iosl
VRNF1/RNF
Iop
VRNF3/RNF
VRNF2/RNF
Iosp or Iosl
SPRNF=0.33Ω
SLRNF=0.5Ω
VIN
VIN4
VIN3
VIN2
VIN1
Iop...the peak current of Iosp or Iosl
Time
Dead zone
∗2 Sled driver
VIN1=240mV, VIN2=140mV
VIN3=−140mV, VIN=−240mV
VSLRNF1 − VSLRNF2
) / 0.5Ω
240mV − 140mV
VSLRNF4 − VSLRNF3
gm (−) = (
) / 0.5Ω
240mV − 140mV
gm (+) = (
∗4 Spindle driver
VIN1=150mV, VIN2=100mV
VIN3=−100mV, VIN=−150mV
VSPRNF1 − VSPRNF2
) / 0.33Ω
150mV − 100mV
VSPRNF4 − VSPRNF3
gm (−) = (
) / 0.33Ω
150mV − 100mV
gm (+) = (
10/18
BD7904FS
Optical disc ICs
!Table of measure circuit switches position 2
(VCC=SPVM=SLVM=12V, DVCC=AVM=5V, VC=1.65V, RL (act) =8Ω, RL (SL) =8Ω+47µH, RL (SP) =2Ω+47µH,
SLRNF=0.5Ω, SPRNF=0.33Ω, H−=2.5V, HU+=2.6V, HV+=HW+=2.4V)
Designation
INPUT
VIN
CTL
SWITCH
RL SP SL
Measure
point
Conditions
IL
OP
1
1
1
IHB=10mA
Pin 22
1
1
1
1
Current flowing in each terminal at H−=2.5V,
HW+=2.7V (2.3V), HV=2.5V
IU+ (−),
IV+ (−),
IW+ (−)
1
2
H
H
1
1
H
H
1
Spindle driver block
〈 Hall bias 〉
VHB
1.65V
〈 Hall amplifier 〉
IHIB
1.65V
〈 Torque command 〉
VDZSP
∗3
L
H
2
1
1
1
1
∗2 Check VRNF with no output at VIN=VC±20mV
Check VRNF with output at VIN=VC±90mV
VSPRNF
gmSP
∗4
L
H
2
1
1
1
1
See 10 of 18 previous page
VSPRNF
RONUSP
3.3V
H
H
1
2
1
2
1
ILSP=500mA
RON = 12V − VOSP
0.5A
OUTU, V, W
RONLSP
3.3V
H
H
1
2
1
2
1
ILSP=−500mA
RON = VOSP
0.5A
OUTU, V, W
ILIMSP
3.3V
H
H
2
1
1
1
1
VSPRNF
fosc
1.85
H
H
2
1
1
1
1
VOSPU
VFGH
1.65V
H
H
1
1
1
1
1
HU+=2.6V, HV+=2.4V, HW+=2.4V
VFG
VFGL
1.65V
H
H
1
1
1
1
1
HU+=2.6V, HV+=2.6V, HW+=2.4V
VFG
〈 FG 〉
∗5 Condition of input
HU+
HV+
HW+
U
V
W
Condition
Measure point
2.4V
2.6V
2.6V
2.6V
2.4V
2.6V
Source
Hi-Z
Sink
IOSPU=500mA
VOSPU
Sink
Source
Hi-Z
IOSPV=500mA
VOSPV
2.6V
2.6V
2.6V
2.4V
2.4V
Hi-Z
Sink
Source
IOSPW=500mA
VOSPW
2.4V
Sink
Hi-Z
Source
IOSPU=−500mA
VOSPU
2.4V
2.4V
2.6V
2.4V
Source
Sink
Hi-Z
IOSPV=−500mA
VOSPV
2.4V
2.6V
Hi-Z
Source
Sink
IOSPW=−500mA
VOSPW
11/18
BD7904FS
Optical disc ICs
!Table of measure circuit switches position 3
(VCC=SPVM=SLVM=12V, DVCC=AVM=5V, VC=1.65V, RL (act) =8Ω, RL (SL) =8Ω+47µH, RL (SP) =2Ω+47µH,
SLRNF=0.5Ω, SPRNF=0.33Ω, H−=2.5V, HU+=2.6V, HV+=HW+=2.4V)
Designation
INPUT
VIN
CTL
1
2
SWITCH
RL SP SL
IL
OP
Conditions
Measure
point
Actuator driver block
VOFFT
1.65V
H
H
2
1
1
1
1
VOHFT
3.3V
(0V)
H
H
1
1
1
2
1
IL=500mA
5−OUT+ (−)
VOLFT
0V
(3.3V)
H
H
1
1
1
2
1
IL=−500mA
OUT+ (−)
GVFT
±0.25V
H
H
2
1
1
1
1
20log |(VO − VOFFT) / ±0.25)|
VO
VO
Loading driver block
VOFLD
1.65V
H
L
2
1
1
1
1
VOHLD
3.3V
(0V)
H
L
1
1
1
2
1
IL=500mA
12−OUT+ (−)
VOLLD
0V
(3.3V)
H
L
1
1
1
2
1
IL=−500mA
OUT+ (−)
GVLD
±0.25V
H
L
2
1
1
1
1
20log |(VO − VOFFT) / ±0.25)|
VO
VO
Pre-operational amplifier block
VOFOP
−
H
H
1
1
1
1
2
IBOP
1.65V
H
H
1
1
1
1
2
IOSOOP
−
H
H
1
1
1
1
2
IOP=320µA
IOP=−4mA
VOF
IOPB
VOF
IOSIOP
−
H
H
1
1
1
1
2
VOHOP
0V
H
H
1
1
1
1
1
VOOP
VOLOP
5V
H
H
1
1
1
1
1
VOOP
VOF
Regulator block
VREG
−
H
H
1
1
1
1
1
Pin27
IorMax
−
H
H
1
1
1
1
1
Pin27
∆VRL
−
H
H
1
1
1
1
1
Ireg=100mA
Pin27
∆VVCC
−
H
H
1
1
1
1
1
DVCC=4.5V~5.5V
Pin27
VIH
1.65V
L
L
2
1
1
1
1
Check active at "H"=2.0
IQVC
VIL
1.65V
H
H
2
1
1
1
1
Check stand-by at "L"=0.5
IQVC
VMVC
1.65V
H
H
1
1
1
1
1
Check all output at VC=0.7V
OUTPUT
VMVCC
1.65V
H
H
1
1
1
1
1
Check all output at VCC=3.8V
OUTPUT
CTL1, CTL2
Others
12/18
BD7904FS
Optical disc ICs
!Circuit operation
1. Driver control terminal 1 and 2 (pin 8 and pin 9)
All the drivers and spindle-drive braking mode can be switched on/off by inputting combinations of H-level signal
(higher than 2V) and L-level signal (lower than 0.5V) to these terminals.
CTL1
(Pin8)
CTL2
(Pin9)
L
L
1)
H
L
2)
−
H
CTL1
(Pin8)
CTL2
(Pin9)
SPIN > VC
SPIN < VC
L
H
Forward-rotation mode
Reverse-rotation braking mode
3)
H
H
Forward-rotation mode
Short-circuit braking mode
4)
Spindle
Sled
Focus
Tracking
Loading
Regulator
... ON
... OFF
1) Standby mode
All blocks except for the regulator are standby-mode.
2) Drivers muting
All the output channels except the loading are muted and there outputs are turn off.
3) Reverse-rotation braking mode (spindle)
A reverse-rotation torque is applied when SPIN < VC.
Reverse-rotation is detected with SPIN input and Hall input. If the spindle detects reverse rotation when SPIN < VC,
all the outputs are shorted out to GND.
4) Short-circuit braking mode (spindle)
All the spindle driver outputs are shorted out to GND when SPIN < VC.
5) Regulator
Regulator actives in all the mode.
13/18
BD7904FS
Optical disc ICs
2. Input/output timing chart
HU+
HU−
FWD
HV+
HV−
HW+
HW−
SPIN
Vref
FWD
REV
FWD
SOURCE
U
Hi-Z
SINK
SOURCE
V
Hi-Z
SINK
SOURCE
W
Hi-Z
SINK
A B C D E F
) Forward
rotation
mode
G H I
J K L
) Reverse
rotation
brake
) Reverse
protect
) Short
brake
14/18
BD7904FS
Optical disc ICs
Ι ) Forward-rotation mode
In this mode, the disc rotation is started and accelerated.
When forward-rotation signal inputs from the Hall elements to the positive spindle-drive input terminals
(SPIN > VC), the spindle-drive output terminals output forward torque signal.
SPIN > VC
Hall amplifier input (forward rotation)
HU+
HU−
HV+
HV−
HW+
HW−
U
V
W
A
L
H
L
H
H
L
Hi-Z
Source
Sink
B
L
H
H
L
H
L
Source
Hi-Z
Sink
C
L
H
H
L
L
H
Source
Sink
Hi-Z
D
H
L
H
L
L
H
Hi-Z
Sink
Source
Source
E
H
L
L
H
L
H
Sink
Hi-Z
F
H
L
L
H
H
L
Sink
Source
Hi-Z
Source=PWM
ΙΙ, ΙΙΙ ) Braking mode
In this mode, the disc rotation is decelerated and stopped.
〈 Reverse-rotation braking 〉
When the forward-rotation signal inputs from the Hall elements to the negative spindle-drive input terminals
(SPIN < VC), the spindle-drive output terminals output reverse torque signal.
SPIN < VC
Hall amplifier input (forward rotation)
HU+
HU−
HV+
HV−
HW+
HW−
U
V
W
G
L
H
L
H
H
L
Hi-Z
Sink
Source
H
L
H
H
L
H
L
Sink
Hi-Z
Source
I
L
H
H
L
L
H
Sink
Source
Hi-Z
J
H
L
H
L
L
H
Hi-Z
Source
Sink
K
H
L
L
H
L
H
Source
Hi-Z
Sink
L
H
L
L
H
H
L
Source
Sink
Hi-Z
Source=PWM
3. Hall inputs (pin 1 to 4, 6, 7) and Hall bias (pin 22)
(Spindle)
Hall elements can be connected either in series or in parallel. Set the Hall input voltage to 1.0 to 4.0V.
VCC
VCC
HU
HU
HV
HW
HV
HW
22pin
〈 Parallel connection 〉
22pin
〈 Series connection 〉
15/18
BD7904FS
Optical disc ICs
4. Torque command (spindle: pin 20, sled motor: pin 50) / output current detection terminals (spindle: pin 21, sled motor:
pin 52)
The relation between the torque command input and the output current detection terminals input is expressed as
shown below:
SPRNF
SLRNF
FWD rotation
Dead zone +
Dead zone −
SPIN
SLIN1, 2
VC
The input-output gain (gm) and the output-limit current (ILIM) depend on the resistance of RNF (output current
detection resistor). Please refer to the following expression.
The gain to drive the spindle or the sled motor can be decreased by connecting a resistor in series to each input
terminal.
Gain expression
Spindle
Sled
Input-output gain gm (A/V)
1.0/RNF
0.5/RNF
Output-limit current Ilim (A)
0.3/RNF
0.3/RNF
Gain with the added resistor gm (A/V) 15k/{SPRNF×(Rin+15k)}
0.5×47k/{SLRNF×(Rin+47k)}
Rin : added series resistor
5. PWM oscillation frequency
The PWM oscillation for driving the spindle and sled is free running. The oscillating frequency is 100kHz (typ.).
6. Regulator
3.3V is possible by connecting REGNF (27 pin) with REGOUT (26 pin).
And, adjust by your inserting resistance when you use it in other voltage.
OUT1=BG{R1 (R2+R3+R4) +R2 (R3+R4)}/R2R4
+
−
OUT1
R1
R2
BG
(1.3V)
R3
R4
R3=51.5kΩ
R4=32.76kΩ
16/18
BD7904FS
Optical disc ICs
7. Muting functions
a) VC-drop muting
When the voltage at VC terminal (pin 19) drops to a value lower than 0.7V (typ.), the outputs of all the channels are
turned off. Set the VC terminal voltage to larger than 1.0V.
b) VCC-drop muting
When the voltages at DVCC terminal (pin 25) and VCC terminal (pin 44) drop to lower than 3.8V (typ.), the outputs of
all the channels are turned off. The hysteresis voltage width is 80mV (typ.).
8. Thermal-shutdown
A thermal-shutdown circuit (over-temperature protection circuit) is built in to prevent the IC from thermal breakdown.
Use the IC under the thermal loss allowed to the package. In case the IC is left running over the allowable loss, the
junction temperature rises, and the thermal-shutdown circuit works at the junction temperature of 175°C (typ.) (the
outputs of all the channels are turned off). When the junction temperature drops to 150°C (typ.), the IC start operating
again.
!Application example
SLED
IN
LOADING
IN
SLRNF
FG
54
53
52
51
50
SLED
LOADING
M
M
48
49
47
46
FOCUS
TRACKING
VCC=12V
45
44
AVM=5V
43
42
41
40
39
38
37
36
35
34
33
32
+
30
29
−
−
+
PRE
LOGIC
LEVEL
SHIFT
+
LEVEL
SHIFT
LEVEL
SHIFT
−
28
TSD
+
FF
+
+
−
−
+
31
−
FG
TRACKING
IN
FOCUS
IN
−
SLVM=12V
OSC
LIMIT
Current
COMP
FF
FG
REVERSE
DETECT
BG
(1.3V)
Current
LIMIT
OSC
Polarity
COMP
PWM
OUT
8
9
−
10
11
12
13
14
15
SPINDLE
7
6
µ-COM
5
µ-COM
4
HALL3
3
HALL2
HALL1
2
+
−
VC
STBY/
BRAKE
CONTROL
1
+
−
3-phase
MATRIX
16
17
18
19
+
20
HALL
BIAS
21
22
23
24
25
26
27
VC
SPINDLE
IN
REGOUT
DVCC=5V
RNF
SPVM=12V
Fig.3
17/18
BD7904FS
Optical disc ICs
!Operation notes
(1) Wiring for SPRNF and SLRNF
Considering the wiring resistance, connect each detecting resistor as close as possible to the current detection
terminals for the spindle drive SPRNF (pin 21) and the sled motor drive SLRNF (pin 52) of the IC.
(2) Current detection reference voltage
The detection of current in the spindle and sled involves the detection of voltage between the detection resistances,
but as the reference voltage of internal circuit, the voltage applied to VCC (pin 44) is used by the spindle and that
applied to SLVDD (pin 49) by the sled.
For this reason, be sure to apply VCC (pin 44) to the spindle and SLVDD (pin 49) to the sled according to the
corresponding power supply voltages to prevent voltage differences.
(3) Bypass capacitor
Please connect a bypass capacitor (1µF) across the supply voltage lines close to the IC pins.
(4) Supply fault, ground fault, and short-circuit between output terminals
Do not short-circuit between any output pin and supply pin (supply fault) or ground (ground fault), or between any
output pins (load short-circuit). When mounting the IC on the circuit board, be extremely cautions about the
orientation of the IC. If the orientation is mistaken, the IC may break down, and produce smoke in some cases.
POWER DISSIPATION : Pd (W)
!Electrical characteristic curves
3
2.6W
2
1
0
0
25
50
75
100
125
150
AMBIENT TEMPERATURE : Ta (°C)
∗ On less than 25.7% (percentage occupied by copper foil),
70×70mm2, t=1.6mm glass epoxy mounting.
Fig.4 Power dissipation
!External dimensions (Units : mm)
22.0±0.2
28
27
0.15±0.1
6.0±0.2
0.1
2.2±0.1
1
0.3Min.
4.0±0.2
13.4±0.3
11.4±0.2
54
0.8
0.36±0.1
0.1
SSOP-A54
18/18