AD ADA4858-3ACPZ-R2 Single-supply, high speed, triple op amp with charge pump Datasheet

Single-Supply, High Speed,
Triple Op Amp with Charge Pump
ADA4858-3
Data Sheet
CONNECTION DIAGRAM
OUT1
–IN1
+IN1
NC
ADA4858-3
16
15 14
13
12 +IN2
+VS 1
C1_b 3
11 –IN2
CHARGE
PUMP
10 OUT2
CPO 4
6
7
8
OUT3
5
–IN3
9
PD
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD, CONNECT TO GROUND.
07714-001
C1_a 2
+VS
Integrated charge pump
Supply range: 3 V to 5.5 V
Output range: −3.3 V to −1.8 V
50 mA maximum output current for external use at −3 V
High speed amplifiers
−3 dB bandwidth: 600 MHz
Slew rate: 600 V/µs
0.1 dB flatness: 85 MHz
0.1% settling time: 18 ns
Low power
Total quiescent current: 42 mA
Power-down feature
High input common-mode voltage range
−1.8 V to +3.8 V at +5 V supply
Current feedback architecture
Differential gain error: 0.01%
Differential phase error: 0.02°
Available in 16-lead LFCSP
+IN3
FEATURES
Figure 1.
APPLICATIONS
Professional video
Consumer video
Imaging
Active filters
GENERAL DESCRIPTION
The ADA4858-3 (triple) is a single-supply, high speed current
feedback amplifier with an integrated charge pump that eliminates
the need for negative supplies to output negative voltages or output
a 0 V level for video applications. The 600 MHz, −3 dB bandwidth
and 600 V/µs slew rate make this amplifier well suited for many
high speed applications. In addition, its 0.1 dB flatness out to
85 MHz at G = 2, along with its differential gain and phase errors
of 0.01% and 0.02° into a 150 Ω load, make it well suited for
professional and consumer video applications.
This triple operational amplifier is designed to operate on
supply voltages of 3.3 V to 5 V, using only 42 mA of total
quiescent current, including the charge pump. To further
reduce the power consumption, it is equipped with a powerdown feature that lowers the total supply current to as low as
2.5 mA when the amplifier is not being used. Even in powerdown mode, the charge pump can be used to power external
components. The maximum output current for external use is
50 mA at −3 V. The amplifier also has a wide input commonmode voltage range that extends from 1.8 V below ground to
1.2 V below the positive rail at a 5 V supply.
The ADA4858-3 is available in a 16-lead LFCSP, and it is designed
to work over the extended industrial temperature range of
−40°C to +105°C.
Rev. B
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ADA4858-3* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
Reference Materials
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Tutorials
• MT-034: Current Feedback (CFB) Op Amps
• MT-051: Current Feedback Op Amp Noise Considerations
• MT-057: High Speed Current Feedback Op Amps
• MT-059: Compensating for the Effects of Input Capacitance
on VFB and CFB Op Amps Used in Current-to-Voltage
Converters
Evaluation Kits
• ADA4858-3 Evaluation Board
Documentation
Data Sheet
• ADA4858-3: Single-Supply, High Speed, Triple Op Amp
with Charge Pump Data Sheet
User Guides
• UG-140: Universal Evaluation Board for Triple, High
Speed Op Amps with Charge Pump Offered in 16-Lead, 4
mm × 4 mm LFCSP Packages
Tools and Simulations
• ADA4858 SPICE Macro Model
Design Resources
•
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•
ADA4858-3 Material Declaration
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ADA4858-3
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications Information .............................................................. 14
Applications ....................................................................................... 1
Gain Configurations .................................................................. 14
Connection Diagram ....................................................................... 1
DC-Coupled Video Signal ........................................................ 14
General Description ......................................................................... 1
Multiple Video Driver................................................................ 14
Revision History ............................................................................... 2
DC Restore Function ................................................................. 15
Specifications..................................................................................... 3
Clamp Amplifier ......................................................................... 15
Absolute Maximum Ratings ............................................................ 5
PD (Power-Down) Pin .............................................................. 16
Maximum Power Dissipation ..................................................... 5
Power Supply Bypassing ............................................................ 16
ESD Caution .................................................................................. 5
Layout .......................................................................................... 16
Pin Configuration and Function Descriptions ............................. 6
Outline Dimensions ....................................................................... 17
Typical Performance Characteristics ............................................. 7
Ordering Guide .......................................................................... 17
Theory of Operation ...................................................................... 13
Overview...................................................................................... 13
Charge Pump Operation ........................................................... 13
REVISION HISTORY
11/12—Rev. A to Rev. B
Changes to PD (Power-Down) Pin Section ................................ 16
5/09—Rev. 0 to Rev. A
Changes to Overview Section and Charge Pump Operation
Section .............................................................................................. 13
Changes to Table 5 and Figure 41 ................................................. 14
Added DC Restore Function Section, Figure 43, Clamp
Amplifier Section, and Figure 44.................................................. 15
10/08—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet
ADA4858-3
SPECIFICATIONS
TA = 25°C, VS = 5 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RL = 150 Ω, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion (HD2/HD3)
Crosstalk
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
+ Input Bias Current
− Input Bias Current
Open-Loop Transimpedance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Overdrive Recovery Time
Maximum Linear Output Current @ VOUT = 1 VPEAK
POWER-DOWN
Input Voltage
Conditions
Min
Typ
Max
Unit
VOUT = 0.1 V p-p, G = 1
VOUT = 0.1 V p-p
VOUT = 2 V p-p, G = 1
VOUT = 2 V p-p
VOUT = 2 V p-p
VOUT = 2 V step
VOUT = 2 V step
600
350
165
175
85
600
18
MHz
MHz
MHz
MHz
MHz
V/µs
ns
fC = 1 MHz, VOUT = 2 V p-p
fC = 5 MHz, VOUT = 2 V p-p
f = 5 MHz
f = 1 MHz
f = 1 MHz (+IN/−IN)
−86/−94
−71/−84
−60
4
2/9
0.01
0.02
dBc
dBc
dB
nV/√Hz
pA/√Hz
%
Degrees
−14
−2
−13
300
+IN1/+IN2
−IN1/−IN2
+IN1/+IN2
Typical
+0.5
+0.7
+8
390
+14
+2
+13
15
90
1.5
−1.8
−61
−1.4 to +3.6
+3.8
−54
mV
µA
µA
kΩ
MΩ
Ω
pF
V
dB
Rise/fall, f = 5 MHz
fC = 1 MHz, HD2 ≤ −50 dBc
−1.7 to +3.7
15
21
V
ns
mA
Enabled
Powered down
1.9
2
+0.1
V
V
µA
µs
µs
5.5
V
Bias Current
Turn-On Time
Turn-Off Time
POWER SUPPLY
Operating Range
Total Quiescent Current
Amplifiers
Charge Pump
Total Quiescent Current When Powered Down
Amplifiers
Charge Pump
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
Charge Pump Output Voltage
Charge Pump Sink Current
−0.1
0.3
1.6
3
15
19
23
21
mA
mA
0.15
0.25
4
−64
−58
−3
0.3
mA
mA
dB
dB
V
mA
−3.3
Rev. B | Page 3 of 20
−60
−54
−2.5
150
ADA4858-3
Data Sheet
TA = 25°C, VS = 3.3 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RL = 150 Ω, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion (HD2/HD3)
Crosstalk
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
+ Input Bias Current
− Input Bias Current
Open-Loop Transimpedance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Overdrive Recovery Time
Maximum Linear Output Current @ VOUT = 1 VPEAK
POWER-DOWN
Input Voltage
Conditions
Min
Typ
Max
Unit
VOUT = 0.1 V p-p, G = 1
VOUT = 0.1 V p-p
VOUT = 2 V p-p, G = 1
VOUT = 2 V p-p
VOUT = 2 V p-p
VOUT = 2 V step
VOUT = 2 V step
540
340
140
145
70
430
20
MHz
MHz
MHz
MHz
MHz
V/µs
ns
fC = 1 MHz, VOUT = 2 V p-p
fC = 5 MHz, VOUT = 2 V p-p
f = 5 MHz
f = 1 MHz
f = 1 MHz (+IN/−IN)
−88/−91
−75/−78
−60
4
2/9
0.02
0.03
dBc
dBc
dB
nV/√Hz
pA/√Hz
%
Degrees
−14
−2
−13
300
+IN1/+IN2
−IN1/−IN2
+IN1/+IN2
Typical
+0.7
+0.6
+7
350
+14
+2
+13
15
90
1.5
−0.9
−60
−0.6 to +2.1
+2.2
−54
mV
µA
µA
kΩ
MΩ
Ω
pF
V
dB
Rise/fall, f = 5 MHz
fC = 1 MHz, HD2 ≤ −50 dBc
−0.9 to +2.2
15
20
V
ns
mA
Enabled
Powered down
1.25
1.35
+0.1
V
V
µA
µs
µs
5.5
V
Bias Current
Turn-On Time
Turn-Off Time
POWER SUPPLY
Operating Range
Total Quiescent Current
Amplifiers
Charge Pump
Total Quiescent Current When Powered Down
Amplifiers
Charge Pump
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
Charge Pump Output Voltage
Charge Pump Sink Current
−0.1
0.3
1.6
3
14
19
21
20
mA
mA
0.15
0.25
2
−63
−57
−2
0.3
mA
mA
dB
dB
V
mA
−2.1
Rev. B | Page 4 of 20
−60
−54
−1.8
45
Data Sheet
ADA4858-3
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Table 3.
See Figure 2
(−VS − 0.2 V) to (+VS − 1.2 V)
±VS
Observe power derating curves
−65°C to +125°C
−40°C to +105°C
300°C
The maximum power that can be safely dissipated by the
ADA4858-3 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass transition
temperature of the plastic, approximately 150°C. Temporarily
exceeding this limit may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
To ensure proper operation, it is necessary to observe the
maximum power derating curves in Figure 2.
2.5
Specification is for device in free air.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION (W)
1
Rating
6V
2.0
1.5
1.0
0.5
0
–40
–20
0
20
40
60
80
100
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. B | Page 5 of 20
07714-002
Parameter
Supply Voltage
Internal Power Dissipation1
16-Lead LFCSP
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Lead Temperature
(Soldering, 10 sec)
ADA4858-3
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADA4858-3
OUT1
–IN1
+IN1
NC
TOP VIEW
(Not to Scale)
16
15 14
13
12 +IN2
+VS 1
C1_b 3
11 –IN2
CHARGE
PUMP
10 OUT2
CPO 4
6
7
8
–IN3
OUT3
+VS
5
+IN3
9
PD
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD, CONNECT TO GROUND.
07714-003
C1_a 2
Figure 3. Pin Configuration.
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
EPAD
Mnemonic
+VS
C1_a
C1_b
CPO
+VS
+IN3
−IN3
OUT3
PD
OUT2
−IN2
+IN2
NC
+IN1
−IN1
OUT1
Exposed Pad (EPAD)
Description
Positive Supply for Charge Pump.
Charge Pump Capacitor Side a.
Charge Pump Capacitor Side b.
Charge Pump Output.
Positive Supply.
Noninverting Input 3.
Inverting Input 3.
Output 3.
Power-Down.
Output 2.
Inverting Input 2.
Noninverting Input 2.
No Connect.
Noninverting Input 1.
Inverting Input 1.
Output 1.
The exposed pad must be connected to ground.
Rev. B | Page 6 of 20
Data Sheet
ADA4858-3
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = 5 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RF = 200 Ω for G = 5, RL = 150 Ω, large signal VOUT = 2 V p-p, and small signal
VOUT = 0.1 V p-p, unless otherwise noted.
2
G=1
G=2
–2
G=5
–3
–4
–5
–6
–7
–8
1
10
100
1000
FREQUENCY (MHz)
0
–1
G=2
–2
G=5
–3
–4
–5
–6
–7
–8
1
NORMALIZED CLOSED-LOOP GAIN (dB)
G=1
G=2
–1
–2
G=5
–3
–4
–5
–6
–7
–8
10
100
1000
FREQUENCY (MHz)
VS = 3.3V
1
G=1
0
–1
G=2
–2
G=5
–3
–4
–5
–6
–7
–8
07714-005
1
100
1000
FREQUENCY (MHz)
Figure 5. Small Signal Frequency Response vs. Gain
Figure 8. Large Signal Frequency Response vs. Gain
2
1
RF = 301Ω
NORMALIZED CLOSED-LOOP GAIN (dB)
2
RF = 200Ω
0
–1
RF = 402Ω
–2
RF = 499Ω
–3
–4
–5
–6
–7
–8
1
10
100
1000
FREQUENCY (MHz)
07714-006
NORMALIZED CLOSED-LOOP GAIN (dB)
10
Figure 6. Small Signal Frequency Response vs. Feedback Resistor
1
RF = 200Ω
0
RF = 301Ω
RF = 402Ω
–1
–2
RF = 499Ω
–3
–4
–5
–6
–7
–8
1
10
100
1000
FREQUENCY (MHz)
Figure 9. Large Signal Frequency Response vs. Feedback Resistor
Rev. B | Page 7 of 20
07714-009
NORMALIZED CLOSED-LOOP GAIN (dB)
2
VS = 3.3V
1
1000
Figure 7. Large Signal Frequency Response vs. Gain
1
0
100
FREQUENCY (MHz)
Figure 4. Small Signal Frequency Response vs. Gain
2
10
07714-008
0
–1
G=1
1
07714-007
NORMALIZED CLOSED-LOOP GAIN (dB)
1
07714-004
NORMALIZED CLOSED-LOOP GAIN (dB)
2
Data Sheet
0.2
0.1
0.1
–0.1
–0.2
VS = 3.3V
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
1
10
100
1000
FREQUENCY (MHz)
–0.1
RF = 301Ω
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
1
0
–10
–20
–20
–30
–30
DISTORTION (dBc)
0
–40
–50
HD2
–70
HD3
–80
–40
–60
HD2
–70
HD3
–80
–90
–100
100
FREQUENCY (MHz)
07714-011
–90
10
1000
–50
–100
1
100
Figure 13. Large Signal 0.1 dB Flatness vs. Feedback Resistor
–10
–60
10
FREQUENCY (MHz)
Figure 10. Large Signal 0.1 dB Flatness vs. Supply Voltage
DISTORTION (dBc)
0
07714-013
VS = 5V
RF = 200Ω
1
100
10
FREQUENCY (MHz)
Figure 11. Harmonic Distortion vs. Frequency
07714-014
0
NORMALIZED CLOSED-LOOP GAIN (dB)
0.2
07714-010
NORMALIZED CLOSED-LOOP GAIN (dB)
ADA4858-3
Figure 14. Harmonic Distortion vs. Frequency, VS = 3.3 V
10
–10
0
–20
–10
CMRR (dB)
–30
–40
–40
–50
–50
–60
–70
0.1
1
10
100
400
FREQUENCY (MHz)
Figure 12. Power Supply Rejection Ratio (PSRR) vs. Frequency
–70
0.1
1
10
100
400
FREQUENCY (MHz)
Figure 15. Common-Mode Rejection Ratio (CMRR) vs. Frequency
Rev. B | Page 8 of 20
07714-015
–60
07714-012
PSRR (dB)
–30
–20
ADA4858-3
–20
–40
–30
–50
–40
CROSSTALK (dB)
–30
–70
–50
–60
–80
–70
–90
–80
–100
0.1
10
1
100
400
FREQUENCY (MHz)
–90
0.1
10
1
400
100
FREQUENCY (MHz)
Figure 16. Forward Isolation vs. Frequency
07714-019
–60
07714-016
FORWARD ISOLATION (dB)
Data Sheet
Figure 19. Crosstalk vs. Frequency
0.15
1.5
2.0
1.0
1.5
0.5
1.0
0
0.5
OUTPUT VOLTAGE, VS = 5V (V)
0.05
0
–0.05
VS = 5V
VS = 3.3V
TIME (5ns/DIV)
07714-020
VS = 3.3V
07714-017
VS = 5V
–0.15
–1.0
–1.5
TIME (5ns/DIV)
Figure 20. Large Signal Transient Response vs. Supply Voltage
Figure 17. Small Signal Transient Response vs. Supply Voltage
1.5
G=1
VOUT = 200mV p-p
CL = 4pF C = 10pF
L
1.0
OUTPUT VOLTAGE (V)
0.10
0.05
0
–0.05
CL = 6pF
0.5
0
–0.5
CL = 4pF
–1.0
–0.10
–0.15
CL = 10pF
CL = 6pF
TIME (5ns/DIV)
G=1
07714-018
OUTPUT VOLTAGE (V)
–0.5
–1.0
–0.10
0.15
0
–0.5
–1.5
TIME (5ns/DIV)
Figure 21. Large Signal Transient Response vs. Capacitive Load
Figure 18. Small Signal Transient Response vs. Capacitive Load
Rev. B | Page 9 of 20
07714-021
OUTPUT VOLTAGE (V)
0.10
OUTPUT VOLTAGE, VS = 3.3V (V)
VOUT = 200mV p-p
ADA4858-3
Data Sheet
0.15
1.5
CL = 10pF
0.10
CL = 16pF
1.0
CL = 4pF
CL = 14pF
OUTPUT VOLTAGE (V)
0.05
0
–0.05
0.5
0
–0.5
–0.10
–1.0
07714-022
VOUT = 200mV p-p
–0.15
TIME (5ns/DIV)
–1.5
TIME (5ns/DIV)
Figure 22. Small Signal Transient Response vs. Capacitive Load
2.0
1.6
07714-025
OUTPUT VOLTAGE (V)
CL = 10pF
CL = 6pF
Figure 25. Large Signal Transient Response vs. Capacitive Load
0.5
2.0
0.5
0.4
1.6
0.4
0.3
1.2
OUTPUT
0.2
0.1
0.4
0
0
–0.4
–0.1
ERROR
0.8
AMPLITUDE (V)
INPUT
ERROR (%)
AMPLITUDE (V)
0.8
0.3
ERROR
0.2
0.1
0.4
0
0
–0.1
–0.4
–0.8
–0.2
–0.8
–1.2
–0.3
–1.2
–1.6
–0.4
–1.6
ERROR (%)
1.2
–0.2
INPUT
–0.3
OUTPUT
15
20
25
30
35
–0.5
40
–2.0
–5
TIME (ns)
0
5
15
20
30
35
2.5
3.0
1.5
VIN
VS = 3.3V
2.5
2.0
1.0
2
1.0
1
0.5
0
0
–1
–0.5
–2
–1.0
OUTPUT VOLTAGE (V)
1.5
VOUT
INPUT VOLTAGE (V)
1.5
VOUT
0.5
1.0
0.5
0
0
–0.5
–0.5
–1.0
–1.5
–3
TIME (20ns/DIV)
–1.5
07714-024
OUTPUT VOLTAGE (V)
2.0
3
–0.5
40
Figure 26. Settling Time (Fall)
VIN
4
25
TIME (ns)
Figure 23. Settling Time (Rise)
5
10
–1.0
–2.0
Figure 24. Output Overdrive Recovery
TIME (20ns/DIV)
Figure 27. Output Overdrive Recovery, VS = 3.3 V
Rev. B | Page 10 of 20
07714-027
10
07714-026
5
INPUT VOLTAGE (V)
0
07714-023
–2.0
–5
–0.4
Data Sheet
ADA4858-3
1000
1000
RISE, G = 2
RISE, G = 1
800
SLEW RATE (V/µs)
700
FALL, G = 2
600
FALL, G = 1
500
400
300
500
100
2.5
0
Figure 28. Slew Rate vs. Output Voltage
2.0
1.5
6
VPD
5
1.0
VOUT
18
AMPLIFIER
CURRENT
16
–2.0
14
–2.4
0.5
4
0
3
–0.5
2
–1.0
1
12
OUTPUT
VOLTAGE
–3.2
2.5
3.0
3.5
4.0
10
4.5
8
5.0
CHARGE PUMP SUPPLY VOLTAGE (V)
0
–1.5
07714-029
–2.8
TIME (400ns/DIV)
Figure 29. Charge Pump Output Voltage and Current vs.
Charge Pump Supply Voltage
Figure 32. Enable/Power-Down Time
100
18
90
INPUT CURRENT NOISE (pA/ Hz)
20
16
14
12
10
8
6
4
2
80
70
60
50
40
30
20
–IN
10
1k
10k
100k
FREQUENCY (Hz)
1M
07714-030
0
100
07714-032
–1.6
CURRENT (mA)
–1.2
OUTPUT VOLTAGE (V)
20
POWER-DOWN VOLTAGE (V)
22
–0.8
2.5
Figure 31. Slew Rate vs. Output Voltage, VS = 3.3 V
24
CHARGE
PUMP CURRENT
–0.4
INPUT VOLTAGE NOISE (nV/ Hz)
CHARGE PUMP OUTPUT VOLTAGE (V)
0
1.0
1.5
OUTPUT VOLTAGE (V p-p)
0.5
0
07714-031
2.0
07714-028
1.0
1.5
OUTPUT VOLTAGE (V p-p)
FALL, G = 1
300
200
0.5
FALL, G = 2
400
100
0
RISE, G = 1
600
200
0
RISE, G = 2
700
Figure 30. Input Voltage Noise vs. Frequency
0
100
+IN
1k
10k
100k
FREQUENCY (Hz)
Figure 33. Input Current Noise vs. Frequency
Rev. B | Page 11 of 20
1M
07714-033
800
SLEW RATE (V/µs)
VS = 3.3V
900
900
ADA4858-3
Data Sheet
–100
–110
–110
–115
–115
POWER (dBm)
–105
–120
–125
–130
–120
–125
–130
–135
–135
–140
–140
–145
–145
–150
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FREQUENCY (MHz)
4.5
5.0
07714-201
POWER (dBm)
–105
0
VS = 3.3V
CHARGE PUMP HARMONICS
CHARGE PUMP HARMONICS
Figure 34. Output Spectrum vs. Frequency
–150
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
FREQUENCY (MHz)
Figure 35. Output Spectrum vs. Frequency, VS = 3.3 V
Rev. B | Page 12 of 20
5.0
07714-202
–100
Data Sheet
ADA4858-3
THEORY OF OPERATION
OVERVIEW
a
+VS
The ADA4858-3 can be used in applications that require both
ac- and dc-coupled inputs and outputs. The output stage on the
ADA4858-3 is capable of driving 2 V p-p video signals into two
doubly terminated video loads (150 Ω each) on a single 5 V supply.
The input range of the ADA4858-3 includes ground, and the
output range is limited by the output headroom set by the voltage
drop across the two diodes from each rail, which occurs 1.2 V
from the positive supply and the charge pump negative supply rails.
CHARGE PUMP OPERATION
The on-board charge pump creates a negative supply for the
amplifier. It provides different negative voltages depending on
the power supply voltage. For a +5 V supply, the negative supply
generated is equal to −3 V with 150 mA of output supply current,
and for a +3.3 V supply, the negative supply is equal to −2 V
with 45 mA of output supply current.
Figure 36 shows the charging cycle when the supply voltage +VS
charges C1 through Φ1 to ground. During this cycle, C1 quickly
charges to reach the +VS voltage. The discharge cycle then begins
with switching Φ1 off and switching Φ2 on, as shown in Figure 37.
When C1 = C2, the charge in C1 is divided between the two
capacitors and slowly increases the voltage in C2 until it reaches
a predetermined voltage (−3 V for +5 V supply and −2 V for
+3.3 V supply). The typical charge pump charging and discharging
frequency is 550 kHz with a 150 Ω load and no input signal;
however, this frequency changes with different loads and supply
conditions.
Φ1
+VS
C1
CPO
C2
The ADA4858-3 specifications make it especially suitable for SD
and HD video applications. It also allows dc-coupled video signals
with its black level set to 0 V and its sync tip at −300 mV for
YPbPr video.
The charge pump is always on, even when the power-down pin
(PD) is enabled and the amplifiers are off. However, if a negative
current is not used, the charge pump is in an idle state. Each
amplifier needs −6.3 mA of current, which totals −19 mA for all
three amplifiers. This means additional negative current may be
available by the charge pump for external use. Pin 4 (CPO) is
the charge pump output that provides access to the negative
supply generated by the charge pump.
If the negative supply is used to power another device in the
system, it is only possible for the 5 V supply operation. In the
3.3 V supply operation, the charge pump output current is very
limited. The capacitor C2 placed at the CPO pin, which
regulates the ripple of the negative voltage, can be used as a
coupling capacitor for the external device. However, the charge
pump current should be limited to a maximum of 50 mA for
external use. When powering down the ADA4858-3, the charge
pump is not affected and its output voltage and current are still
available for external use.
It is recommended to use 1 µF low ESR and low ESL capacitors
for C1 and C2. These capactiors should be placed very close to
the part. C1 should be placed between Pin C1_a and Pin C1_b,
and C2 should be placed between Pin CPO and ground. If the
charge pump ripple at the CPO pin is too high, larger capacitors
(that is, 4.7 µF) can replace the 1 µF at C1 and C2.
a
b
Φ1
07714-137
C2
b
Figure 37. C1 Discharging Cycle
C1
CPO
Φ2
07714-138
The ADA4858-3 is a current feedback amplifier designed for
exceptional performance as a triple amplifier with a variable
gain capability. Its specifications make it especially suitable
for SD and HD video applications. The ADA4858-3 provides
HD video output on a single supply as low as 3.0 V while only
consuming 13 mA per amplifier. It also features a power-down
pin (PD) that reduces the total quiescent current to 2 mA when
activated.
Φ2
Figure 36. C1 Charging Cycle
Rev. B | Page 13 of 20
ADA4858-3
Data Sheet
APPLICATIONS INFORMATION
GAIN CONFIGURATIONS
The ADA4858-3 is a single-supply, high speed, voltage feedback
amplifier. Table 5 provides a convenient reference for quickly
determining the feedback and gain set resistor values and bandwidth for common gain configurations.
The choice of RF and RG should be carefully considered for
maximum flatness vs. power dissipation trade-off. In this case, the
flatness is over 90 MHz, which is more than the high definition
video requirement.
5V
C1
10µF
C2
0.1µF
Table 5. Recommended Values and Frequency Performance1
Small Signal
−3 dB BW (MHz)
600
350
160
Large Signal 0.1 dB
Flatness (MHz)
88
85
35
VIN
+
ADA4858-3
Figure 38 and Figure 39 show the typical noninverting and
inverting configurations and the recommended bypass
capacitor values.
–VS
Figure 40. DC-Coupled, Single-Supply Schematic
10µF
MULTIPLE VIDEO DRIVER
In applications requiring that multiple video loads be driven
simultaneously, the ADA4858-3 can deliver 5 V supply operation.
Figure 41 shows the ADA4858-3 configured with two video
loads, and Figure 42 shows the two video load performances.
0.1µF
VIN
R3
249Ω
R2
249Ω
+
ADA4858-3
VOUT
–
RF
301Ω
RF
+VS
07714-139
RG
RG
301Ω
Figure 38. Noninverting Gain Configuration
RF
+VS
10µF
75Ω
CABLE
VIN
VIN
RG
VOUT
R5
75Ω
–
Conditions: VS = 5 V, TA = 25°C, RL = 150 Ω.
+VS
R4
75Ω
U1
R1
75Ω
10µF
0.1µF
–
75Ω
ADA4858-3
ADA4858-3
VOUT1
75Ω
+
75Ω
0.1µF
–
75Ω
CABLE
75Ω
CABLE
75Ω
VOUT2
75Ω
VOUT
07714-142
RG (Ω)
N/A
301
40
Figure 41. Video Driver Schematic for Two Video Loads
07714-140
+
6.5
RL = 150Ω
6.0
DC-COUPLED VIDEO SIGNAL
The ADA4858-3 does not have a rail-to-rail output stage. The
output can be within 1 V of the rails. Having a charge pump on
board that can provide −3 V on a +5 V supply and −2 V on
+3.3 V supply makes this part excellent for video applications. In
dc-coupled applications, the black color has a 0 V voltage reference.
This means that the output voltage should be able to reach 0 V,
which is feasible with the presence of the charge pump. Figure 40
shows the schematic of a dc-coupled, single-supply application.
It is similar to the dual-supply application in which the input is
properly terminated with a 50 Ω resistor to ground. The amplifier
itself is set at a gain of 2 to account for the input termination loss.
CLOSED-LOOP GAIN (dB)
Figure 39. Inverting Gain Configuration
Rev. B | Page 14 of 20
RL = 75Ω
5.5
5.0
4.5
4.0
3.5
VS = 5V
RF = 301Ω
G=2
VOUT = 2V p-p
3.0
2.5
1
10
100
1000
FREQUENCY (MHz)
Figure 42. Large Signal Frequency Response for Various Loads
07714-040
1
RF (Ω)
402
301
200
07714-141
Gain
1
2
5
Data Sheet
ADA4858-3
220µA
R
220µA
ADA4858-3
4.7nF
G
220µA
75Ω
B
U1
75Ω
R
301Ω
V1
301Ω
74AC86
NTA4153
4.7nF
75Ω
U2
75Ω
G
301Ω
V2
301Ω
74AC86
NTA4153
4.7nF
0.1µF
+5V
75Ω
7.15kΩ
U3
2.8kΩ
75Ω
B
301Ω
V3
07714-100
H
200kΩ
ADCMP371AKSZ
301Ω
74AC86
NTA4153
Figure 43. AC-Coupled Video Input with DC Restored Output
DC RESTORE FUNCTION
CLAMP AMPLIFIER
Having a charge pump gives the ability to take an ac-coupled
input signal and restore its dc 0 V reference. The simplest way
of accomplishing this is to use the blanking interval and the Hsync signal to set the 0 V reference. Use the H-sync to sample the
dc level during the blanking interval to charge a capacitor and
hold the charge during the video signal. Figure 43 shows the
schematic of the dc restored circuit.
The H-sync coming out of the video source can be either positive
or negative. This is why a polarity correction circuit is used to
produce only a positive going H-sync. The H-sync is fed to a
comparator that produces a high voltage if H-sync is negative and
a low voltage if the H-sync is positive. The H-sync is then fed to
an XOR with the output of the comparator. If the original H-sync
was negative, the output of the XOR is positive because of the
logic high coming from the comparator, causing the XOR to act
as an inverter. However, if the original H-sync is positive, it stays
the same because the output of the comparator is low and the
XOR acts as a buffer.
In some applications, a current output DAC driving a resistor
may not have a negative supply available. In such case, the YPbPr
video signal may be shifted up by 300 mV to avoid clamping the
sync tip. These applications require a signal dc clamp on the output
of the video driver to restore the dc level to 0 V reference. The
ADA4858-3 has a charge pump that allows the output to swing
negative; twice the sync tip (−600 mV) in G = 2 configuration.
Figure 44 shows the ADA4858-3 in a difference amplifier
configuration. The video signal is connected to the noninverting
side, and a dc bias of 600 mV is injected on the inverting side.
The result is a positive going H-sync triggering the MOSFET
during the blanking interval. This shorts the 4.7 nF capacitor to
ground, which causes it to charge up by the dc level of the current
signal. When the H-sync goes low, the MOSFET opens and the
capacitor holds the charge during the video signal, making the
output signal referenced to ground or 0 V level.
VCC = 5V
DAC1
Y
ADA4858-3
Y
U1
R7
75Ω
R12
75Ω
R2
301Ω
R1
301Ω
VCC = 5V
DAC2
Pb
Pb
U2
R8
75Ω
R13
75Ω
R4
301Ω
R3
301Ω
VCC = 5V
DAC3
Pr
Pr
U3
R9
75Ω
VCC = 5V
R14
75Ω
ADA4860-1
R11
6.02kΩ
VCC = 5V
R6
301Ω
R5
301Ω
V1
C1
0.1µF
C2
10µF
Figure 44. Clamp Amp
Rev. B | Page 15 of 20
07714-101
R10
44.2kΩ
ADA4858-3
Data Sheet
PD (POWER-DOWN) PIN
LAYOUT
The ADA4858-3 is equipped with a PD (power-down) pin for
all three amplifiers. This allows the user to reduce the quiescent
supply current when an amplifier is not active. The power-down
threshold levels are derived from ground level. The amplifiers are
powered down when the voltage applied to the PD pin is greater
than a certain voltage from ground. In a 5 V supply application, the
voltage is greater than 2 V, and in a 3.3 V supply application, the
voltage is greater than 1.5 V. The amplifier is enabled whenever the
PD pin is connected to ground. If the PD pin is not used, it is
best to connect it to ground. Note that the power-down feature
does not control the charge pump output voltage and current.
As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. The ADA4858-3 can
operate at up to 600 MHz; therefore, proper RF design techniques
must be employed. The PCB should have a ground plane covering
all unused portions of the component side of the board to provide a
low impedance return path. Removing the ground plane on all
layers from the area near and under the input and output pins
reduces stray capacitance. Keep signal lines connecting the
feedback and gain resistors as short as possible to minimize the
inductance and stray capacitance associated with these traces.
Place termination resistors and loads as close as possible to their
respective inputs and outputs. Keep input and output traces as
far apart as possible to minimize coupling (crosstalk) through the
board. Adherence to microstrip or stripline design techniques for
long signal traces (greater than 1 inch) is recommended. For
more information on high speed board layout, see “A Practical
Guide to High-Speed Printed-Circuit-Board Layout,” Analog
Dialogue, Volume 39, Number 3, September 2005.
Table 6. Power-Down Voltage Control
PD Pin
Not active
Active
5V
<1.5 V
>2 V
3.3 V
<1 V
>1.5 V
POWER SUPPLY BYPASSING
Careful attention must be paid to bypassing the power supply
pins of the ADA4858-3. High quality capacitors with low
equivalent series resistance (ESR), such as multilayer ceramic
capacitors (MLCCs), should be used to minimize supply
voltage ripple and power dissipation. A large, usually tantalum,
capacitor between 2.2 µF to 47 µF located in proximity to the
ADA4858-3 is required to provide good decoupling for lower
frequency signals. The actual value is determined by the circuit
transient and frequency requirements. In addition, place 0.1 µF
MLCC decoupling capacitors as close to each of the power
supply pins and across from both supplies as is physically
possible, no more than 1/8 inch away. The ground returns
should terminate immediately into the ground plane. Placing
the bypass capacitor return close to the load return minimizes
ground loops and improves performance.
Rev. B | Page 16 of 20
Data Sheet
ADA4858-3
OUTLINE DIMENSIONS
4.00
BSC SQ
0.60 MAX
0.60 MAX
12° MAX
1.00
0.85
0.80
0.65 BSC
TOP
VIEW
3.75
BSC SQ
0.75
0.60
0.50
8
5
4
0.25 MIN
1.95 BSC
0.05 MAX
0.02 NOM
SEATING
PLANE
PIN 1
INDICATOR
1
2.25
2.10 SQ
1.95
9
0.80 MAX
0.65 TYP
0.35
0.30
0.25
16
13
12
0.20 REF
COPLANARITY
0.08
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
072808-A
PIN 1
INDICATOR
(BOTTOM VIEW)
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 45.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-16-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADA4858-3ACPZ-R2
ADA4858-3ACPZ-R7
ADA4858-3ACPZ-RL
ADA4858-3ACP-EBZ
1
Temperature Range
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
Package Description
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
Evaluation Board
Z = RoHS Compliant Part.
Rev. B | Page 17 of 20
Package Option
CP-16-4
CP-16-4
CP-16-4
Ordering Quantity
250
1,500
5,000
ADA4858-3
Data Sheet
NOTES
Rev. B | Page 18 of 20
Data Sheet
ADA4858-3
NOTES
Rev. B | Page 19 of 20
ADA4858-3
Data Sheet
NOTES
©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07714-0-11/12(B)
Rev. B | Page 20 of 20