Product Folder Order Now Support & Community Tools & Software Technical Documents ESD204 SLVSEE2 – FEBRUARY 2018 1 Features 3 Description • The ESD204 is a bidirectional TVS ESD protection diode array for HDMI and USB surge protection up to 5.5 A (8/20 μs) . The ESD204 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). 1 • • • • • • • • • IEC 61000-4-2 Level 4 ESD Protection – ±30-kV Contact Discharge – ±30-kV Air Gap Discharge IEC 61000-4-4 EFT Protection – 80 A (5/50 ns) IEC 61000-4-5 Surge Protection – 5.5 A (8/20 μs) – Low Surge Clamping Voltage 8.5 V at 5.5 A IPP IO Capacitance: – 0.55 pF (Typical) HDMI 2.0 Compliant DC Breakdown Voltage: 5.5 V (Minimum) Ultra Low Leakage Current: 10 nA (Maximum) Supports High Speed Interfaces up to 6 Gbps Industrial Temperature Range: –40°C to +125°C Easy Flow-Through Routing Package 2 Applications • • End Equipment – DVR and NVR – Ethernet Switches and Routers – Laptops and Desktops – Set-Top Boxes – TV and Monitors – Mobile and Tablets Interfaces – HDMI 2.0 – HDMI 1.4 – USB 3.0 – Display Port 1.3 – PCI Express 3.0 – Ethernet 10,100,1000 Mbps The low clamping and high differential bandwidth provided by ESD204 enables the device to cleanly pass high speed signals while providing robust protection to downstream devices. This device features a 0.55-pF IO capacitance per channel making it suitable for protecting high-speed interfaces up to 6 Gbps such as HDMI 2.0, HDMI 1.4, USB 3.0 and Ethernet 1G. The low dynamic resistance and low clamping voltage ensure system level protection against transient events. The ESD204 is offered in the industry standard USON-10 (DQA) package. The package features flow-through routing and 0.5-mm pin pitch easing implementation and reducing design time. Device Information(1) PART NUMBER ESD204 PACKAGE USON (10) BODY SIZE (NOM) 2.50 mm × 1.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. ADVANCE INFORMATION ESD204 4-Channel Low-Capacitance Surge and ESD Protection Diode ESD204 SLVSEE2 – FEBRUARY 2018 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 4 5 Absolute Maximum Ratings ...................................... ESD Ratings -JEDEC Specifications ........................ ESD Ratings - IEC Specifications ............................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... 7.4 Device Functional Modes.......................................... 7 8 Application and Implementation .......................... 7 8.1 Application Information.............................................. 7 8.2 Typical Application ................................................... 7 9 Power Supply Recommendations........................ 8 10 Layout..................................................................... 8 10.1 Layout Guidelines ................................................... 8 10.2 Layout Examples ................................................... 9 11 Device and Documentation Support ................. 10 11.1 11.2 11.3 11.4 11.5 Detailed Description .............................................. 6 7.1 Overview ................................................................... 6 7.2 Functional Block Diagram ......................................... 6 7.3 Feature Description................................................... 6 Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 10 10 10 10 10 12 Mechanical, Packaging, and Orderable Information ........................................................... 10 ADVANCE INFORMATION 4 Revision History 2 DATE REVISION NOTES February 2018 * Initial release. Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 ESD204 www.ti.com SLVSEE2 – FEBRUARY 2018 5 Pin Configuration and Functions DQA Package 10-Pin USON Top View IO1 1 10 NC IO2 2 9 NC GND 3 8 GND IO3 4 7 NC IO4 5 6 NC Pin Functions NO. GND 3 GND 8 IO1 1 IO2 2 IO3 4 IO4 5 NC 6 NC 7 NC 9 NC 10 TYPE Ground DESCRIPTION ADVANCE INFORMATION PIN NAME Ground. Connect to ground I/O ESD protected channel NC Not connected; Used for optional straight-through routing. Can be left floating or grounded Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 3 ESD204 SLVSEE2 – FEBRUARY 2018 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Electrical Fast Transient Peak Pulse MAX UNIT 80 A IEC 61000-4-5 Surge (tp 8/20 µs) Peak Power at 25°C 50 W IEC 61000-4-5 Surge (tp 8/20 µs) Peak Current at 25°C 5.5 A IEC 61000-4-4 Peak Current at 25°C TA Operating free-air temperature -40 125 °C Tstg Storage temperature -65 155 °C (1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings -JEDEC Specifications VALUE ADVANCE INFORMATION V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2500 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings - IEC Specifications VALUE V(ESD) Electrostatic discharge IEC 61000-4-2 Contact Discharge, all pins ±30000 IEC 61000-4-2 Air Discharge, all pins ±30000 UNIT V 6.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage -3.6 3.6 V TA Operating Free Air Temperature -40 125 °C 6.5 Thermal Information ESD204 THERMAL METRIC (1) DQA (USON) UNIT 10 RθJA Junction-to-ambient thermal resistance 348.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 214.1 °C/W RθJB Junction-to-board thermal resistance 270.7 °C/W ΨJT Junction-to-top characterization parameter 81.7 °C/W ΨJB Junction-to-board characterization parameter 270.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 ESD204 www.ti.com SLVSEE2 – FEBRUARY 2018 6.6 Electrical Characteristics At TA = 25°C unless otherwise noted TEST CONDITIONS MIN TYP MAX UNIT VRWM Reverse stand-off voltage IIO < 10 nA, across operating temperature range VBRF Breakdown voltage, Pin 1, 2, 4, 5 to 3 (GND) (1) IIO = 1 mA VBRR Reverse breakdown voltage, pin 1, 2, 4, 5 to 3 (GND) (1) IIO = -1 mA, VHOLD Holding Voltage pin1, 2, 4, 5 to 3 (GND) (2) IIO = 1 mA 6.2 V VHOLD-NEG Holding Voltage pin 1, 2, 4, 5 to pin3 (GND) to (2) IIO = -1 mA -6.2 V Surge IPP = 5.5 A, pin 1, 2, 4, 5 to 3 or 8(GND), GND to pin 1, 2, 4, 5, tp=8/20 μs 8.5 V TLP IPP = 5 A, pin 1, 2, 4, 5 to 3 or 8(GND), GND to pin 1, 2, 4, 5, tp=10/100 ns 8.2 V TLP IPP = 16 A, pin 1, 2, 4, 5 to 3 or 8(GND), GND to pin 1, 2, 4, 5, tp=10/100 ns 11.5 V VCLAMP Clamping voltage -3.6 3.6 V 5 7.9 V -7.9 -5 V Pin 1, 2, 4, 5 to GND, 100 ns TLP 0.3 GND to Pin 1, 2, 4, 5 , 100 ns TLP 0.3 Line capacitance, any IO to GND VIO = 0 V, Vp-p = 30 mV, f = 1 MHz 0.55 0.65 pF ΔCLINE Variation of line capacitance CLINE1 - CLINE2, VIO = 0 V, Vp-p = 30 mV, f = 1 MHz 0.02 0.07 pF CCROSS Line-to-line capacitnace VIO = 0 V, Vrms = 30 mV, f = 1 MHz 0.25 0.35 pF RDYN Dynamic resistance CLINE (1) (2) ADVANCE INFORMATION PARAMETER Ω VBRF and VBRR are defined as the voltage obtained at 1 mA when sweeping the voltage up, before the device latches into the snapback state VHOLD is defined as the voltage when 1 mA is applied, after the device has successfully latched into the snapback state. Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 5 ESD204 SLVSEE2 – FEBRUARY 2018 www.ti.com 7 Detailed Description 7.1 Overview The ESD204 is a bidirectional ESD Protection Diode with ultra-low capacitance. This device can dissipate ESD strikes above the maximum level specified by the IEC 61000-4-2 International Standard. The ultra-low capacitance makes this device designed for protecting any super high-speed signal pins. 7.2 Functional Block Diagram IO1 IO2 IO3 IO4 ADVANCE INFORMATION GND 7.3 Feature Description 7.3.1 IEC 61000-4-2 ESD Protection The I/O pins can withstand ESD events up to ±30-kV contact and ±30-kV air gap. An ESD-surge clamp diverts the current to ground. 7.3.2 IEC 61000-4-4 EFT Protection The I/O pins can withstand an electrical fast transient burst of up to 80 A (5/50 ns waveform, 4 kV with 50-Ω impedance). An ESD-surge clamp diverts the current to ground. 7.3.3 IEC 61000-4-5 Surge Protection The I/O pins can withstand surge events up to 5.5 A and 60 W (8/20 µs waveform). An ESD-surge clamp diverts this current to ground. 7.3.4 IO Capacitance The capacitance between each I/O pin to ground is 0.55 pF (typical) and 0.65 pF (maximum). This device supports data rates up to 6 Gbps. 7.3.5 DC Breakdown Voltage The DC breakdown voltage of each I/O pin is a minimum of ±5.5 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of ±3.6 V. 7.3.6 Ultra Low Leakage Current The I/O pins feature an ultra-low leakage current of 10 nA (maximum) with a bias of ±2.5 V. 7.3.7 Low ESD Clamping Voltage The I/O pins feature an ESD clamp that can clamp the voltage to 8.5 V (TLP IPP = 5 A). 7.3.8 Supports High Speed Interfaces This device can support high speed interfaces up to 10 Gbps, because of the extremely low IO capacitance. 7.3.9 Industrial Temperature Range This device features an industrial operating range of –40°C to +125°C. 6 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 ESD204 www.ti.com SLVSEE2 – FEBRUARY 2018 Feature Description (continued) 7.3.10 Easy Flow-Through Routing Package The layout of this device makes it simple and easy to add protection to an existing layout. The packages offers flow-through routing, requiring minimal modification to an existing layout. 7.4 Device Functional Modes The ESD204 is a passive integrated circuit that triggers when voltages are above VBRF or below VBRR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. When the voltages on the protected line fall below the trigger levels of ESD204 (usually within 10s of nano-seconds) the device reverts to passive. NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The ESD204 is a diode type TVS which is used to provide a path to ground for dissipating ESD events on highspeed signal lines between a human interface connector and a system. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected IC. 8.2 Typical Application Figure 1. ESD204 Protecting the HDMI Interface Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 7 ADVANCE INFORMATION 8 Application and Implementation ESD204 SLVSEE2 – FEBRUARY 2018 www.ti.com Typical Application (continued) 8.2.1 Design Requirements In this design example, two ESD204 devices and one TPD4E05U06 device are used to protect an HDMI 2.0 interface. For HDMI 2.0 application design parameters listed in Table 1 are known. Table 1. Design Parameters DESIGN PARAMETER VALUE Signal range on high speed differential data lines 0 to 3.6 V Operating frequency of high speed data lines 3 GHz (First Harmonic) Signal range on control lines (CEC, UTILITY, DDC_CLK and DDC_DAT) 0 to 5 V 8.2.2 Detailed Design Procedure 8.2.2.1 Signal Range ADVANCE INFORMATION ESD204 supports signal ranges between –3.6 V and 3.6 V, which supports the high-speed lines on the HDMI 2.0 application. The TPD4E05U06 supports signal ranges between 0 V and 5.5 V, which supports the HDMI control lines. 8.2.2.2 Operating Frequency The ESD204 has a 0.55 pF (typical) capacitance, which supports the HDMI 2.0 rate of 6 Gbps. The TPD4E05U06 has a typical capacitance of 0.5 pF, which easily support the control lines. The ESD204 has 4 identical protection channels for the differential HDMI high-speed signal lines. The symmetrical pin out of the device with a ground pin between the two differential signal pins makes it suitable for this application. 9 Power Supply Recommendations This device is a passive ESD device so there is no need to power it. Take care not to violate the recommended I/O specification (–3.6 V to 3.6 V) to ensure the device functions properly. 10 Layout 10.1 Layout Guidelines • • • 8 The optimum placement is as close to the connector as possible. – EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. – The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector. Route the protected traces as straight as possible. Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded corners with the largest radii possible. – Electric fields tend to build up on corners, increasing EMI coupling. Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 ESD204 www.ti.com SLVSEE2 – FEBRUARY 2018 ADVANCE INFORMATION 10.2 Layout Examples Figure 2. HDMI Type-A Transmitter Port Layout Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 9 ESD204 SLVSEE2 – FEBRUARY 2018 www.ti.com 11 Device and Documentation Support 11.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. ADVANCE INFORMATION 11.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Product Folder Links: ESD204 PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) ESD204DQAR PREVIEW USON DQA 10 3000 TBD Call TI Call TI -40 to 125 PESD204DQAT ACTIVE USON DQA 10 250 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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