ICST ICS552AR-01 Oscillator, multiplier, and buffer with 8 output Datasheet

ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Description
ICS552A-01 (for B mode)
• Up to 200 MHz clock input/output at 3.3 V
• Low skew of 250 ps maximum for any bank of four
• Inputs can be connected together for a 1 to 8 buffer
The ICS552A-01 produces 8 low-skew copies of the
multiple input clock or fundamental, parallel-mode
crystal. Unlike other clock drivers, these parts do not
require a separate oscillator for the input. Using ICS’
patented Phase-Locked Loop (PLL) to multiply the
input frequency, it is ideal for generating and
distributing multiple high-frequency clocks. This is a
single chip used for 3 different applications:
with 250 ps skew between any outputs
•
•
•
•
1) ICS552A-01 (A mode) — an Oscillator mutiplier
2) ICS552A-01 (B mode) — a Dual 1:4 buffer
Ideal for clock networks
Output Enable mode tri-states outputs
Full CMOS output swing with 25 mA output drive
capability at TTL levels
• Advanced, low power, sub-micron CMOS process
3) ICS552A-01 (C mode) — a 1:8 Oscillator buffer
ICS552A-01 (for C mode)
Features (all)
•
•
•
•
Non-inverting buffer mode
• Use with 25 MHz crystal for networking
• Use with 27 MHz crystal for MPEG
Packaged as 20-pin SSOP (QSOP)
Pb-free packaging available
ICS552A-01 (for A and C modes)
Operating voltages of 3.0 V to 5.5 V
• Input frequency of 10.0 to 27.0 MHz
• Provides 8 low-skew outputs (<250 ps)
• Output clock duty cycle of 40/60 at 3.3 V
Industrial temperature available
Features (specific)
ICS552A-01 (for A mode)
• Contains on-chip multiplier with selections of x1,
x1.33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
• Power-down and Tri-state modes
Block Diagram (ICS552A-01—A mode)
VDD
S3:S0
4
CLK1
CLK2
CLK3
10.0 to 27.0 MHz
crystal or clock input
X1
CLK5
CLK6
CLK7
Crystal
Buffer/
Crystal
Oscillator
X2
External capacitors are
required with a crystal input.
CLK8
GND
1
MDS 552A-01 B
Integrated Circuit Systems, Inc.
CLK4
PLL
Multiplier
●
525 Race Street, San Jose, CA 95126
Revision 010906
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ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Pin Assignment (ICS552A-01—A mode)
Multiplier Select Table
S3
S2
S1
S0
Multiplier
0
0
0
0
Power Down
CLK8
0
0
0
1
x1
17
CLK7
0
0
1
0
x1.333
DC
1
20
S0
X2
2
19
DC
X1/ICLK
3
18
VDD
4
S2
5
16
VDD
0
0
1
1
x2
GND
6
15
S3
0
1
0
0
x2.666
CLK1
7
14
GND
CLK2
8
13
CLK6
0
1
0
1
x3
CLK3
9
12
CLK5
0
1
1
0
x3.333
CLK4
10
11
S1
0
1
1
1
x4
1
0
0
0
x5
1
0
0
1
x4.66
1
0
1
0
x6
1
1
0
1
Tri-state all
20-pin (150 mil) SSOP (QSOP)
Pin Descriptions (ICS552A-01—A mode)
Pin
Number
Pin
Name
Pin
Type
1
DC
—
Do not connect.
2
X2
XO
3
X1/ICLK
XI
4
VDD
Power
5
S2
Input
Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal.
Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal or
clock.
Connect to +3.3 V or 5 V. Decouple with pin 6. Must be same as other VDDs.
Multiplier Select pin 2 per table above.
Pin Description
6
GND
Power
Connect to ground.
7
CLK1
Output
Output clock 1.
8
CLK2
Output
Output clock 2.
9
CLK3
Output
Output clock 3.
10
CLK4
Output
Output clock 4.
11
S1
Input
12
CLK5
Output
Output clock 5.
13
CLK6
Output
Output clock 6.
14
GND
Power
Connect to ground.
Multiplier Select pin 1 per table above
15
S3
Input
16
VDD
Power
Multiplier Select pin 3 per table above
Connect to +3.3 V or 5 V. Decouple with pin 14. Must be same as other VDDs.
17
CLK7
Output
Output clock 7.
18
CLK8
Output
19
DC
—
Output clock 8.
Do not connect.
20
S0
Input
2
MDS 552A-01 B
Integrated Circuit Systems, Inc.
Multiplier Select pin 0 per table above
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
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ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Block Diagram (ICS552A-01—B mode)
QA1
INA
QA2
QA3
S1
QA4
Control
Logic
S0
QB1
QB2
QB3
QB4
INB
Pin Assignment (ICS552A-01—B mode)
INA
1
20
S0
DC
2
19
INB
DC
3
18
QB4
VDD
4
17
QB3
VDD
5
16
VDD
GND
6
15
VDD
QA1
7
14
GND
QA2
8
13
QB2
QA3
9
12
QB1
QA4
10
11
S1
20-pin (150 mil) SSOP (QSOP)
Clock Output Select Table (ICS552A-01—B mode)
S1 S0
Mode
0
0
QA1:4 and QB1:4 running
0
1
Test mode
1
0
OE. All outputs in high impedance
1
1
QA1:4 only. QB1:4 stopped low
3
MDS 552A-01 B
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
●
www.icst.com
ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Pin Descriptions (ICS552A-01—B mode)
Pin
Number
Pin
Name
Pin
Type
1
INA
CI
Input to buffer A. Outputs QA1:4 will be the same frequency. Internal pull-up resistor.
2
DC
—
Do not connect.
Pin Description
3
DC
—
4
VDD
Power
5
VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
Do not connect.
6
GND
Power
Connect to ground.
7
QA1
Output
Output 1 from buffer A.
8
QA2
Output
Output 2 from buffer A.
9
QA3
Output
Output 3 from buffer A.
10
QA4
Output
11
S1
I
12
QB1
Output
Output 4 from buffer A.
Mode Select pin 1. Selects mode for outputs. Must be at GND for all clocks on. Internal
pull-up resistor.
Output 1 from buffer B.
13
QB2
Output
Output 2 from buffer B.
14
GND
Power
Connect to ground.
15
VDD
Power
16
VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
17
QB3
Output
Output 3 from buffer B.
18
QB4
Output
19
INB
CI
Output 4 from buffer B.
Input to buffer B. Outputs QA1:4 will be the same frequency. Internal pull-up resistor.
20
S0
I
Mode Select pin 0. Selects mode for outputs. Must be at GND for all clocks on. Internal
pull-up resistor.
KEY: CI = clock input with pull-up resistor; I = input with internal pull-up resistor.
4
MDS 552A-01 B
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
●
www.icst.com
ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Block Diagram (ICS552A-01—C mode)
VDD
5
CLK1
CLK2
CLK3
CLK4
CLK5
10.0 to 27.0 MHz
crystal input
X1
CLK6
CLK7
Crystal
Oscillator
CLK8
X2
External capacitors are
required with a crystal input.
GND
3
Pin Assignment (ICS552A-01—C mode)
DC
1
20
VDD
X2
2
19
DC
X1
3
18
CLK8
VDD
4
17
CLK7
GND
5
16
VDD
GND
6
15
VDD
CLK1
7
14
GND
CLK2
8
13
CLK6
CLK3
9
12
CLK5
CLK4
10
11
VDD
20-pin (150 mil) SSOP (QSOP)
5
MDS 552A-01 B
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
●
www.icst.com
ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Pin Descriptions (ICS552A-01—C mode)
Pin
Number
Pin
Name
Pin
Type
1
DC
—
Do not connect.
2
X2
XO
Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal.
Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal.
Pin Description
3
X1
XI
4
VDD
Power
5
GND
Power
Connect to +3.3 V or 5 V. Decouple with pin 6. Must be same as other VDDs.
Connect to ground.
6
GND
Power
Connect to ground.
7
CLK1
Output
Output clock 1.
8
CLK2
Output
Output clock 2.
9
CLK3
Output
Output clock 3.
10
CLK4
Output
Output clock 4.
11
VDD
Power
Connect to +3.3 V or 5 V. Must be same as other VDDs.
12
CLK5
Output
Output clock 5.
13
CLK6
Output
Output clock 6.
14
GND
Power
Connect to ground.
15
VDD
Power
16
VDD
Power
Connect to +3.3 V or 5 V. Must be same as other VDDs.
Connect to +3.3 V or 5 V. Decouple with pin 14. Must be same as other VDDs.
17
CLK7
Output
Output clock 7.
18
CLK8
Output
19
DC
—
Output clock 8.
Do not connect.
20
VDD
Power
6
MDS 552A-01 B
Integrated Circuit Systems, Inc.
Connect to +3.3 V or 5 V. Must be same as other VDDs.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
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ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
External Components
PCB Layout Recommendations
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50Ω trace (a
commonly used trace impedance), place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω.
Decoupling Capacitors
As with any high-performance mixed-signal IC, the
ICS552A-01 must be isolated from system power
supply noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and GND on pins 4 and 6, and 16
and 14. Other VDDs and GNDs can be connected to
these pins or directly to their respective ground planes.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X2 to ground.
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) Each 0.01µF decoupling capacitor should be
mounted on the component side of the board as close
to the VDD pin as possible. No vias should be used
between decoupling capacitor and VDD pin. The PCB
trace to VDD pin should be kept as short as possible,
as should the PCB trace to the ground via.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI, the 33Ω series termination resistor
(if needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers.
The value (in pF) of these crystal caps should equal
(CL -12 pF)*2. In this equation, CL= crystal load
capacitance in pF. Example: For a crystal with a 18 pF
load capacitance, two 12 pF capacitors should be
used. For a clock input, connect it X1/ICLK and leave
X2 unconnected (floating).
7
MDS 552A-01 B
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
●
www.icst.com
ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS552A-01. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Parameter
Condition
Min.
Supply Voltage, VDD
Referenced to GND
Inputs
Referenced to GND
Clock Outputs
Referenced to GND
Storage Temperature
Soldering Temperature
Typ.
Max.
Units
7
V
-0.5
VDD+0.5
V
-0.5
VDD+0.5
V
-65
150
°C
260
°C
125
°C
Max 10 seconds
Junction Temperature
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Typ.
Max.
Units
0
+70
°C
-40
+85
°C
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85°C
Parameter
Symbol
Conditions
Operating Voltage
VDD
Input High Voltage
VIH
ICLK
Input Low Voltage
VIL
ICLK
Input High Voltage
VIH
S3:S0
Input Low Voltage
VIL
S3:S0
Output High Voltage
VOH
VDD = 3.3 V,
IOH = -8 mA
Output Low Voltage
VOL
VDD = 3.3 V,
IOL = 8 mA
Output High Voltage
VOH
VDD = 3.3 V or 5 V,
IOH = -8 mA
Short Circuit Current
IOS
VDD = 3.3 V, each
output
Typ.
3.0
VDD/2+1
●
525 Race Street, San Jose, CA 95126
Max.
Units
5.5
V
VDD/2
VDD/2
V
VDD/2-1
2
V
V
0.8
2.4
V
V
0.4
VDD-0.4
V
V
±50
mA
8
MDS 552A-01 B
Integrated Circuit Systems, Inc.
Min.
Revision 010906
●
tel (408) 297-1201
●
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ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Supply Current
IDD
at 3.3 V, no load, 25
MHz in, x4
35
mA
Operating Supply Current
IDD
at 5 V, no load, 25 MHz
in, x4
59
mA
Power-down Supply
Current
IDD
S3:S0 = 0 (GND)
55
µA
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85° C
Parameter
Symbol
Input Frequency
Conditions
FIN
Min.
Typ.
Max. Units
Fundamental crystal
10
27
MHz
Input clock
10
27
MHz
Output Rise Time
tOR
0.8 to 2.0 V
1.5
ns
Output Fall Time
tOF
2.0 to 0.8 V
1.5
ns
60
%
250
ps
Duty Cycle
at VDD/2
40
50
Output-to-Output Skew
All modes, Rising
edges at VDD/2
Absolute Jitter
Mode A, Deviation from
Mean
±75
ps
One Sigma Clock Period Jitter
Mode A
25
ps
Thermal Characteristics
Parameter
Symbol
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Min.
Typ.
Max. Units
θJA
Still air
135
°C/W
θJA
1 m/s air flow
93
°C/W
θJA
3 m/s air flow
78
°C/W
60
°C/W
θJC
9
MDS 552A-01 B
Integrated Circuit Systems, Inc.
Conditions
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
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ICS552A-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Wide Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
20
Symbol
E1
A
A1
A2
b
c
D
E
E1
e
L
α
aaa
E
INDEX
AREA
1 2
D
A
A2
Min
Max
1.35
1.75
0.10
0.25
-1.50
0.20
0.30
0.18
0.25
8.55
8.75
5.80
6.20
3.80
4.00
.635 Basic
0.40
1.27
0°
8°
-0.10
Inches
Min
Max
0.053
0.069
0.004
0.010
-0.059
0.008
0.012
0.007
0.010
0.337
0.344
0.228
0.244
0.150
0.157
.025 Basic
0.016
0.050
0°
8°
-0.004
A1
c
-Ce
SEATING
PLANE
b
L
aaa C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
ICS552AR-01
ICS552AR-01
Tubes
20-pin SSOP
0 to +70°C
ICS552AR-01T
ICS552AR-01
Tape and Reel
20-pin SSOP
0 to +70°C
ICS552AR-01LF
552AR-01LF
Tubes
20-pin SSOP
0 to +70°C
ICS552AR-01LFT
552AR-01LF
Tape and Reel
20-pin SSOP
0 to +70°C
ICS552ARI-01
ICS552ARI01
Tubes
20-pin SSOP
-40 to +85°C
ICS552ARI-01T
ICS552ARI01
Tape and Reel
20-pin SSOP
-40 to +85°C
ICS552ARI-01LF
552ARI01LF
Tubes
20-pin SSOP
-40 to +85°C
ICS552ARI-01LFT
552ARI01LF
Tape and Reel
20-pin SSOP
-40 to +85°C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
10
MDS 552A-01 B
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
Revision 010906
●
tel (408) 297-1201
●
www.icst.com
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