MP1496 High-Efficiency, 2A, 16V, 500kHz Synchronous, Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP1496 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve a 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1496 has synchronous mode operation for higher efficiency over the output-current–load range. • • • • • • Current-mode operation provides a fast transient response and eases loop stabilization. • • • • • Protective features include over-current protection and thermal shut down and external SS control. The MP1496 requires a minimal number of readily-available standard external components, and is available in a space-saving 8-pin TSOT23 package. Wide 4.5V to 16V Operating Input Range 100mΩ/40mΩ Low-RDS(ON) Internal Power MOSFETs Proprietary Switching-Loss–Reduction Technique High-Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency Can Synchronize with a 200kHz-to-2MHz External Clock Externally Programmable Soft-Start OCP Protection and Hiccup Thermal Shutdown Output Adjustable Starting from 0.8V Available in an 8-pin TSOT-23 Package APPLICATIONS • • • • Notebook Computers and I/O Power Digital Set-Top Boxes Flat-Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 2 VIN IN 4.5V-16V C1 BST C4 MP1496 22 6 EN/SYNC 5 SW 3.3V/2A 3 L1 EN 7 FB C3 0.1 1 C5 22 F MP1496 Rev. 1.05 12/26/2012 VCC SS GND 4 8 R3 33k R1 40.2k C2 R2 13k www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number* MP1496DJ Package TSOT-23-8 Top Marking ACT *For Tape & Reel, add suffix –Z (e.g. MP1496DJ–Z); For RoHS compliant packaging, add suffix –LF (e.g. MP1496DJ–LF–Z) PACKAGE REFERENCE TOP VIEW SS 1 8 FB IN 2 7 VCC SW 3 6 EN/SYNC GND 4 5 BST ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN ..................................................-0.3V to 17V VSW ...-0.3V (-5V for <10ns) to 17V (19V for 5ns) VBS ......................................................... VSW+6V (2) All Other Pins ................................ -0.3V to 6V (3) Continuous Power Dissipation (TA = +25°C) ........................................................... 1.25W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature................. -65°C to 150°C TSOT-23-8............................. 100 ..... 55... °C/W Recommended Operating Conditions (4) Supply Voltage VIN ...........................4.5V to 16V Output Voltage VOUT ..................... 0.8V to VIN-3V Operating Junction Temp. (TJ). -40°C to +125°C MP1496 Rev. 1.05 12/26/2012 (5) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) About the details of EN pin’s ABS MAX rating, please refer to Page 9, Enable section. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Supply Current (Shutdown) Supply Current (Quiescent) HS-Switch ON Resistance LS-Switch ON Resistance Switch Leakage Current Limit (6) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle Minimum ON Time (6) Sync Frequency Range IIN Iq HSRDS-ON LSRDS-ON SWLKG ILIMIT fSW fFB DMAX τON_MIN fSYNC Feedback Voltage VFB Feedback Current EN Rising Threshold EN Falling Threshold IFB EN Input Current EN Turn-Off Delay VIN Under-Voltage Lockout Threshold-Rising VIN Under Voltage Lockout Threshold-Hysteresis VCC Regulator VCC Load Regulation Soft-Start Current Thermal Shutdown (6) Thermal Hysteresis (6) Condition VEN = 0V VEN = 2V, VFB = 1V VBST-SW=5V VCC=5V VEN = 0V, VSW =12V Under 40% Duty Cycle VFB=750mV VFB<400mV VFB=700mV TA=25°C -40°C<TA<85°C (7) VFB=820mV VEN_RISING VEN_FALLING IEN Min Typ 0.7 100 40 Max Units 1 1 μA mA mΩ mΩ μA A kHz fSW % ns MHz 1 3 440 90 0.2 791 787 1.2 1.1 500 0.25 95 60 807 807 10 1.4 1.25 580 2 823 827 50 1.6 1.4 mV nA V V VEN=2V 2 μA VEN=0 0 μA 8 μs ENTd-off 3.7 INUVVth 3.9 4.1 V INUVHYS 650 mV VCC 5 3 11 150 20 V % μA °C °C ICC=5mA ISS Notes: 6) Guaranteed by design. 7) Not tested in production and guaranteed by over-temperature correlation. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section. TA = 25°C, unless otherwise noted. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. TA = 25°C, unless otherwise noted. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. TA = 25°C, unless otherwise noted. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Package Pin # 1 2 3 4 5 6 7 8 Name Description Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. Supply Voltage. The MP1496 operates from a 4.5V-to-16V input rail. C1 decouples the IN input rail. Use wide PCB trace to make the connection. SW Switch Output. Connect using a wide PCB trace. System Ground. Reference ground of the regulated output voltage. Use special care in GND PCB layout: Connect to GND with copper and vias. Bootstrap. Connect a capacitor between SW and BST pins to form a floating supply BST across the high-side switch driver. A 10Ω resistor placed between SW and BST cap. is strongly recommended to reduce SW spike voltage. Enable/Synchronize. EN high to enable the MP1496. Apply an external clock to EN/SYNC EN/SYNC pin to change the switching frequency. Bias Supply. Decouple with 0.1μF-to-0.22μF cap. The capacitance should not exceed VCC 0.22μF. VCC capacitor should be put closely to VCC pin and GND pin. Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. The frequency fold-back comparator lowers the oscillator frequency FB when the FB voltage is below 400mV to prevent current-limit runaway during a shortcircuit fault. SS MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN VCC + - VCC Regulator RSEN Currrent Sense Amplifer Bootstrap Regulator SS Oscillator HS Driver + 1pF EN 6.5V FB Reference 1MEG 50pF 400k BST Current Limit Comparator Comparator On Time Control Logic Control + + - SW VCC LS Driver Error Amplifier GND Figure 1: Functional Block Diagram MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The MP1496 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve 2A continuous output current with excellent load and line regulation over a wide input supply range, The MP1496 operates in a fixed-frequency, peak-current–control mode to regulate the output voltage. An internal clock initiates a PWM cycle. The integrated high-side power MOSFET turns on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If the current in the power MOSFET does not reach the COMP set current value within 95% of one PWM period, the power MOSFET turns off. Internal Regulator The 5V internal regulator powers most of the internal circuitries. This regulator takes the VIN input and operates in the full VIN range. When VIN exceeds 5.0V, the output of the regulator is in full regulation. When VIN is less than 5.0V, the output decreases and requires a 0.1µF ceramic decoupling capacitor. Error Amplifier The error amplifier compares the FB pin voltage against the internal 0.8V reference (REF) and outputs a COMP voltage, which controls the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Enable/SYNC Control EN is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator, drive it low to turn it off. An internal 1MΩ resistor from EN to GND allows EN to float to shut down the chip. A 6.5V-series Zener diode clamps the EN pin internally as shown in Figure 2. The EN input pin can then connect through a pullup resistor to any voltage connected to the IN pin: The pullup resistor limits the EN input current to less than 100µA. For example, with VIN=12V, RPULLUP≥[(12V – 6.5V) ÷ 100µA = 55kΩ]. MP1496 Rev. 1.05 12/26/2012 Directly connecting the EN pin a voltage source without any pullup resistor requires limiting the voltage source amplitude to below 6.5V to prevent damaging the Zener diode. EN/SYNC Zener 6.5V-typ EN LOGIC GND Figure 2: Zener Diode Circuit For external clock synchronization, connect a clock with a frequency range between 200kHz and 2MHz 2ms after setting the output voltage: The internal clock’s rising edge synchronizes with the external clock rising edge. Select an external clock signal with a pulse width less than 1.7μs. Under-Voltage Lockout Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The MP1496 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 3.9V while its falling threshold is 3.25V. External Soft-Start Adjust the soft-start time by connecting a capacitor from SS pin to ground. When the softstart begins, an internal 11µA current source charges the external capacitor. During soft-start, the soft-start capacitor connects to the noninverting input of the error amplifier. The soft-start period continues until the voltage on the soft-start capacitor exceeds the 0.8V reference. Then the non-inverting amplifier uses the reference voltage takes as the input. Use the following equation to calculate the soft-start time: t SS (ms) = 0.8V × Css(nF) 11μA www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Over-Current Protection and Hiccup The MP1496 has a cycle-by-cycle over-current limit when the inductor current peak exceeds the set current-limit threshold. Meanwhile, output voltage drops until FB falls below the undervoltage (UV) threshold—typically 50% below the reference. Once UV triggers, the MP1496 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-shorted to ground. This greatly reduces the average short circuit current, alleviates thermal issues, and protects the regulator. The MP1496 exits hiccup mode once the over current condition is removed. If both VIN and EN exceed their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltages and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. In shutdown, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 150°C, the whole chip shuts down. When the temperature drops below its lower threshold— typically 130°C—the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection with a rising threshold of 2.2V and a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, C4, L1 and C2 (see Figure 3). If (VIN-VSW) exceeds 5V, U1 will regulate M1 to maintain a 5V BST voltage across C4. A 10Ω resistor placed between SW and BST cap. is strongly recommended to reduce SW spike voltage. Figure 3: Internal Bootstrap Startup and Shutdown Charging Circuit MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage (see the Typical Application on page 1). The feedback resistor R1—in conjunction with the internal compensation capacitor—also sets the feedback loop bandwidth. R2 is then given by: R2 = R1 VOUT 0.807V −1 The T-type network shown in Figure 4 is highly recommended. FB R1 RT 8 VOUT R2 Figure 4: T-Type Network Table 1 lists the recommended T-type resistor values for common output voltages. Table 1: Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) 1.0 20.5 82 82 1.2 30.1 60.4 82 1.8 40.2 32.4 56 2.5 40.2 19.1 33 3.3 40.2 13 33 5 40.2 7.68 33 Selecting the Inductor Use a 1µH-to-10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current for most applications. Select an inductor with a DC resistance less than 15mΩ for highest efficiency. For most designs, the inductance value can be derived from the following equation. L1 = VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC Where ΔIL is the inductor ripple current. MP1496 Rev. 1.05 12/26/2012 Choose an inductor ripple current to be approximately 30% of the maximum load current. The maximum inductor peak current is: IL(MAX ) = ILOAD + ΔI L 2 Use a larger inductance for improved light-load efficiency. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, and therefore requires a capacitor to supply the AC current to the stepdown converter while maintaining the DC-input voltage. Use low-ESR capacitors for best performance, especially ceramic capacitors with X5R or X7R dielectrics for their low ESR and small temperature coefficients. For most applications, use a 22µF capacitor. Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripple current rating. Estimate the RMS current in the input capacitor with: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose an input capacitor with an RMS current rating greater than half the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, place a small, high quality ceramic capacitor—e.g. 0.1μF—as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: ΔVIN = ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 11 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or low ESR electrolytic capacitors. For best results, use low-ESR capacitors to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT ⎞ ⎛ V ⎞ ⎛ V 1 = OUT × ⎜ 1 − OUT ⎟ × ⎜ RESR + ⎟ fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠ Figure 5: Optional External Bootstrap Diode to Enhance Efficiency Where L1 is the inductor value, and RESR is the ESR value of the output capacitor. The recommended external BST diode is IN4148, and the BST capacitor value is 0.1µF to 1μF. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and causes most of the output voltage ripple. For simplification, the output voltage ripple can be estimated by: PC Board Layout (8) PCB layout is very important to achieve stable operation especially for VCC capacitor and input capacitor placement. For best results, follow these guidelines: ΔVOUT = ⎛ V ⎞ VOUT × ⎜ 1 − OUT ⎟ 2 VIN ⎠ 8 × fS × L1 × C2 ⎝ For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = VOUT ⎛ V × ⎜ 1 − OUT fS × L1 ⎝ VIN ⎞ ⎟ × RESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP1496 can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap diode can improve the regulator efficiency, given the following applicable conditions: z VOUT is 5V or 3.3V; and V z Duty cycle is high: D= OUT >65% VIN 1) Use large ground plane directly connect to GND pin. Add vias near the GND pin if bottom layer is ground plane. 2) Place the VCC capacitor to VCC pin and GND pin as close as possible. Make the trace length of VCC pin-VCC capacitor anode-VCC capacitor cathode-chip GND pin as short as possible. 3) Place the ceramic input capacitor close to IN and GND pins. Keep the connection of input capacitor and IN pin as short and wide as possible. 4) Route SW, BST away from sensitive analog areas such as FB. It’s not recommended to route SW, BST trace under chip’s bottom side. 5) Place the T-type feedback resistor R9 close to chip to ensure the trace which connects to FB pin as short as possible Notes: 8) The recommended layout is based on the Figure 6 Typical Application circuit on the last page. In these cases, use an external BST diode from the VCC pin to BST pin, as shown in Figure 5. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 12 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS GND R1 C3 R3 C4 SW 7 6 5 2 3 4 R4 8 1 R9 C5 R2 C6 R6 R5 L1 C1 C1A Vin C2 Vout C2A GND GND EN/SYNC BST SW GND MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 13 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL APPLICATION CIRCUITS VIN 4.5-16V 2 C1A NS 7 IN 1 C5 22nF R4 10 MP1496 VCC SW R5 28.7k 3.3V 3 SS R1 40.2k 6 R6 11k BST 5 EN/SYNC FB 8 R9 33k GND 4 C3 15pF R3 0 R2 13k Figure 6: 12VIN, 3.3V/2A MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 14 MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION TSOT23-8 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1496 Rev. 1.05 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 15