TI1 LM3630ATMX High-efficiency dual-string white led driver Datasheet

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LM3630A
SNVS974B – APRIL 2013 – REVISED OCTOBER 2015
LM3630A High-Efficiency Dual-String White LED Driver
1 Features
3 Description
•
•
•
•
The LM3630A is a current-mode boost converter
which supplies the power and controls the current in
up to two strings of 10 LEDs per string. Programming
is done over an I2C-compatible interface. The
maximum LED current is adjustable from 5 mA to
28.5 mA. At any given maximum LED current the
LED brightness is further adjusted with 256
exponential or linear dimming steps. Additionally,
pulsed width modulation (PWM) brightness control
can be enabled allowing for LED current adjustment
by a logic level PWM signal.
1
•
•
•
•
•
•
•
•
•
Drives up to 2 Strings of 10 Series LEDs
Wide 2.3-V to 5.5-V Input Voltage Range
Up to 87% Efficient
8-bit I2C-Compatible Programmable Exponential
or Linear Brightness Control
PWM Brightness Control for CABC Operation
Independent Current Control per String
True Shutdown Isolation for LEDs
Internal Soft-Start Limits Inrush Current
Adaptive Headroom
Programmable 16-V/24-V/32-V/40-V Overvoltage
Protection
Selectable Boost Frequency of 500 kHz or 1 MHz
with Optionally Additional Offset
Low Profile 12-Pin DSBGA Package
Solution Size 32 mm²
The boost switching frequency is programmable at
500 kHz for low switching loss performance or 1 MHz
to allow the use of tiny low-profile inductors. A setting
for a 10% offset of these frequencies is available.
Overvoltage protection is programmable at 16 V,
24 V, 32 V, or 40 V to accommodate a wide variety of
LED configurations and Schottky diode/output
capacitor combinations.
The device operates over a 2.3-V to 5.5-V operating
voltage range and –40°C to +85°C ambient
temperature range. The LM3630A is available in an
ultra-small 12-bump DSBGA package.
2 Applications
•
•
Smart-Phone LCD Backlighting
LCD and Keypad Lighting
Device Information(1)
PART NUMBER
LM3630A
PACKAGE
DSBGA (12)
BODY SIZE (MAX)
1.94 mm × 1.42 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
L
VOUT up to 40V
D1
VIN
CIN
COUT
IN
SW
OVP
SDA
SCL
AP
INTN
LM3630A
LED1
HWEN
LED2
PWM
SEL
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3630A
SNVS974B – APRIL 2013 – REVISED OCTOBER 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
I2C-Compatible Timing Requirements (SCL, SDA) .
Typical Characteristics ..............................................
Detailed Description ............................................ 19
7.1
7.2
7.3
7.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
19
19
19
26
7.5 Programming........................................................... 30
7.6 Register Maps ......................................................... 31
8
Application and Implementation ........................ 37
8.1 Application Information............................................ 37
8.2 Typical Application ................................................. 37
8.3 Initialization Setup ................................................... 40
9 Power Supply Recommendations...................... 40
10 Layout................................................................... 41
10.1 Layout Guidelines ................................................. 41
10.2 Layout Example .................................................... 44
11 Device and Documentation Support ................. 45
11.1
11.2
11.3
11.4
11.5
11.6
Device Support ....................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
45
45
45
45
45
45
12 Mechanical, Packaging, and Orderable
Information ........................................................... 45
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (January 2014) to Revision B
•
Added Device Information and Pin Configuration and Functions sections, ESD Rating table, Feature Description,
Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and
Documentation Support, and Mechanical, Packaging, and Orderable Information sections ................................................. 1
Changes from Original (April 2013) to Revision A
•
2
Page
Page
Changed equation in note 2 of Electrical Char table.............................................................................................................. 5
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5 Pin Configuration and Functions
YFQ Package
12-Pin DSBGA
Top View
YFQ Package
12-Pin DSBGA
Bottom View
SW
SCL
SDA
GND
GND
INTN
HWEN
SEL
IN
IN
SEL
PWM
ILED2
ILED1
ILED1
ILED2
OVP
SDA
SCL
SW
HWEN
INTN
PWM
OVP
Pin Functions
PIN
NO.
NAME
A1
SDA
A2
SCL
A3
SW
TYPE
DESCRIPTION
Input/Output Serial data connection for I2C-compatible interface
Input
Serial clock connection for I2C-compatible interface
PWR
Inductor connection, diode anode connection, and drain connection for internal NFET. Connect the
inductor and diode as close as possible to SW to reduce inductance and capacitive coupling to nearby
traces.
Logic high hardware enable
B1
HWEN
Input
B2
INTN
Output
B3
GND
GND
Ground
C1
PWM
Input
External PWM brightness control input
C2
SEL
Input
Selects I2C-compatible address. Ground selects 7-bit address 36h. VIN selects address 38h.
C3
IN
Input
Input voltage connection. Connect a 2.3-V to 5.5-V supply to IN and bypass to GND with a 2.2-µF or
greater ceramic capacitor.
D1
OVP
Input
Output voltage sense connection for overvoltage sensing. Connect OVP to the positive terminal of the
output capacitor.
D2
ILED2
Input
Input terminal to internal current sink 2.
D3
ILED1
Input
Input terminal to internal current sink 1.
Interrupt output for fault status change. Open drain active low signal.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
IN, HWEN, PWM, SCL, SDA, INTN, SEL to GND
–0.3
6
V
SW, OVP, ILED1, ILED2 to GND
–0.3
45
V
Continuous power dissipation (3)
Internally limited
Maximum junction temperature
T(J-MAX)
150
Maximum lead temperature (soldering)
Vapor phase (60 sec.)
(4)
Maximum lead temperature (soldering)
Infrared (15 sec.)
(4)
−45
Storage temperature, Tstg
(1)
(2)
(3)
(4)
215
°C
220
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to the potential at the GND pin.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 140°C (typical) and
disengages at TJ = 125°C (typical).
For detailed soldering specifications and information, refer to Texas Instruments Application Note 1112: DSBGA Wafer Level Chip Scale
Package (SNVA009).
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
Input voltage
TA
Operating ambient temperature
NOM
MAX
UNIT
2.3
5.5
V
−40
85
°C
6.4 Thermal Information
LM3630A
THERMAL METRIC (1)
YFQ (DBSGA)
UNIT
12 PINS
RθJA
(1)
4
Junction-to-ambient thermal resistance
78.1
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
Typical limits are for TA = 25°C; minimum and maximum limits apply over the full operating ambient temperature range
(−40°C ≤ TA ≤ 85°C); VIN = 3.6 V, unless otherwise specified. (1)
PARAMETER
ILED1,
ILED2
Output current regulation
IMATCH
ILED1 to ILED2 current
matching (2)
TEST CONDITION
2.5 V ≤ VIN ≤ 5.5 V, full-scale current = 20 mA
2.5 V ≤ VIN ≤ 5.5 V, ILED = 10 mA,
TA = 25°C
2.5 V ≤ VIN ≤ 5.5 V, ILED = 10 mA,
0°C ≤ TA ≤ 70°C
ILED1 on A
ILED2 on B
MIN
TYP
MAX
19
20
21
–1%
0.5%
1%
–2.5%
0.5%
2.5%
VREG_CS
Regulated current sink
headroom voltage
ILED = 5 mA
250
VHR
Current sink minimum
headroom voltage
ILED = 95% of nominal, ILED = 20 mA
160
RDSON
NMOS switch on resistance ISW = 100 mA
NMOS switch current limit
VOVP
Output overvoltage
protection
2.5 V ≤ VIN ≤ 5.5 V
640
800
960
800
1000
1200
960
1200
1440
24-V option
23
24
25
40-V option
39
41
44
2.5 V ≤ VIN ≤ 5.5 V
500-kHz shift = 0
1.12-MHz shift = 1
500
518
1120
1163
962
1000
1038
1
4
HWEN = GND
1
4
Full-scale current = 20 mA, BRT = 0x01, Exponential
mapping mode
13
2.3 V ≤ VIN ≤ 5.5 V
(2)
481
1077
HWEN = VIN, I2C
shutdown
Shutdown current
Thermal shutdown
kHz
µA
140
Hysteresis
Initialization timing
582
350
ISHDN
tWAIT
V
94%
VIN = 3.6 V
TSD
560
ILED1 = ILED2 =
20 mA, feedback
disabled.
Quiescent current into
device, not switching
(1)
538
Maximum duty cycle
Minimum LED current in
ILED1 or ILED2
mA
1
IQ
ILED_MIN
Ω
720
ON threshold, 2.3 V ≤ VIN ≤ 5.5 V
1-MHz shift = 0
DMAX
600
ON threshold, 2.3 V ≤ VIN ≤ 5.5 V
560-kHz shift = 1
Switching frequency
240
0.25
Hysteresis
ƒSW
mA
mV
480
ICL
UNIT
15
Time period to wait from the assertion of HWEN or after
software reset, before an I2C transaction will be ACK'ed.
During this time period an I2C transaction will be NAK'ed
1
µA
°C
ms
Minimum and maximum limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6 V and TA = 25°C.
LED current sink matching between LED1 and LED2 is given by taking the difference between ILED1 and ILED2 and dividing by the
sum of ILED1 and ILED2. The formula is (ILED1 − ILED2)/(ILED1 + ILED2) at ILED = 10 mA. ILED1 is driven by Bank A and ILED2 is driven by
Bank B.
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Electrical Characteristics (continued)
Typical limits are for TA = 25°C; minimum and maximum limits apply over the full operating ambient temperature range
(−40°C ≤ TA ≤ 85°C); VIN = 3.6 V, unless otherwise specified.(1)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
LOGIC INPUTS (PWM, HWEN, SEL, SCL, SDA)
VIL
Input logic low
2.3 V ≤ VIN ≤ 5.5 V
0
0.4
VIH
Input logic high
2.3 V ≤ VIN ≤ 5.5 V
1.2
VIN
VOL
Output logic low (SDA,
INTN)
2.3 V ≤ VIN ≤ 5.5 V
ƒPWM
PWM input frequency
2.3 V ≤ VIN ≤ 5.5 V
CIN
Input capacitance
400
mV
80
kHz
10
SDA
4.5
SCL
5
V
pF
6.6 I2C-Compatible Timing Requirements (SCL, SDA)
See (1).
MIN
t1
SCL (clock period)
2.5
t2
Data in setup time to SCL high
100
t3
Data in setup time to SCL low
t4
SDA low setup time to SCL low (start)
100
t5
SDA high hold time to SCL high (stop)
100
(1)
6
0
NOM
MAX
UNIT
µs
ns
SCL and SDA must be glitch-free in order for proper brightness to be realized.
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6.7 Typical Characteristics
90
90
80
80
Efficiency %
Efficiency %
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
70
60
50
VIN = 2.5V
Freq = 500kHz
LED = 2p6s
L = 22uH
Boost
LED
70
60
50
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 2.5 V
Frequency = 500 kHz
2p6s
0
L = 22 µH
VIN = 2.7 V
Frequency = 500 kHz
80
Efficiency %
Efficiency %
80
70
60
VIN = 3.6V
Freq = 500kHz
LED = 2p6s
L = 22uH
LED
60
80
2p6s
100
C058
L = 22 µH
Figure 2. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C001
Figure 1. Boost and LED Efficiency
70
60
50
VIN = 4.2V
Freq = 500kHz
LED = 2p6s
L = 22uH
Boost
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 3.6 V
2p6s
Frequency = 500 kHz
0
L = 22 µH
VIN = 4.2 V
Frequency = 500 kHz
60
80
2p6s
100
C060
L = 22 µH
Figure 4. Boost And LED Efficiency
80
80
Efficiency %
90
70
VIN = 5.5V
Freq = 500kHz
LED = 2p6s
L = 22uH
50
40
Brightness %
90
60
20
C059
Figure 3. Boost and LED Efficiency
Efficiency %
VIN = 2.7V
Freq = 500kHz
LED = 2p6s
L = 22uH
Boost
70
60
50
Boost
VIN = 2.5V
Freq = 500kHz
LED = 2p6s
L = 10uH
Boost
LED
LED
40
40
0
20
40
60
80
Brightness %
VIN = 5.5 V
Frequency = 500 kHz
2p6s
100
0
20
L = 22 µH
40
60
80
Brightness %
C061
VIN = 2.5 V
Frequency = 500 kHz
Figure 5. Boost and LED Efficiency
2p6s
C003
L = 10 µH
Figure 6. Boost and LED Efficiency
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Typical Characteristics (continued)
90
90
80
80
Efficiency %
Efficiency %
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
70
60
50
VIN = 2.7V
Freq = 500kHz
LED = 2p6s
L = 10uH
Boost
LED
70
60
50
LED
40
40
0
20
40
60
80
Brightness %
VIN = 2.7 V
Frequency = 500 kHz
2p6s
100
0
L = 10 µH
VIN = 3.6 V
Frequency = 500 kHz
80
Efficiency %
Efficiency %
80
70
60
VIN = 4.2V
Freq = 500kHz
LED = 2p6s
L = 10uH
LED
80
2p6s
100
C005
L = 10 µH
70
60
50
VIN = 5.5V
Freq = 500kHz
LED = 2p6s
L = 10uH
Boost
LED
40
40
0
20
40
60
80
Brightness %
VIN = 4.2 V
Frequency = 500 kHz
2p6s
100
0
L = 10 µH
VIN = 5.5 V
Frequency = 500 kHz
80
Efficiency %
80
70
60
VIN = 2.5V
Freq = 500kHz
LED = 1p10s
L = 22uH
LED
60
80
2p6s
100
C007
L = 10 µH
Figure 10. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C006
Figure 9. Boost and LED Efficiency
Efficiency %
60
Figure 8. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C004
Figure 7. Boost and LED Efficiency
70
60
50
VIN = 2.7V
Freq = 500kHz
LED = 1p10s
L = 22uH
Boost
LED
40
40
0
20
40
60
80
Brightness %
VIN = 2.5 V
Frequency = 500 kHz
1p10s
100
0
20
L = 22 µH
40
60
80
Brightness %
C008
VIN = 2.7 V
Frequency = 500 kHz
Figure 11. Boost and LED Efficiency
8
VIN = 3.6V
Freq = 500kHz
LED = 2p6s
L = 10uH
Boost
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1p10s
100
C009
L = 22 µH
Figure 12. Boost and LED Efficiency
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Typical Characteristics (continued)
90
90
80
80
Efficiency %
Efficiency %
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
70
60
50
VIN = 3.6V
Freq = 500kHz
LED = 1p10s
L = 22uH
Boost
LED
70
60
50
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 3.6 V
Frequency = 500 kHz
0
1p10s
L = 22 µH
40
60
80
Brightness %
VIN = 4.2 V
Frequency = 500 kHz
Figure 13. Boost and LED Efficiency
1p10s
100
C011
L = 22 µH
Figure 14. Boost and LED Efficiency
90
80
80
VIN = 5.5V
Freq = 500kHz
LED = 1p10s
L = 22uH
70
Efficiency %
Efficiency %
20
C010
90
60
50
70
60
50
Boost
VIN = 2.5V
Freq = 500kHz
LED = 1p10s
L = 10uH
Boost
LED
LED
40
40
0
20
40
60
80
Brightness %
VIN = 5.5 V
Frequency = 500 kHz
1p10s
100
0
L = 22 µH
VIN = 2.5 V
Frequency = 500 kHz
80
Efficiency %
80
70
60
VIN = 2.7V
Freq = 500kHz
LED = 1p10s
L = 10uH
LED
60
80
1p10s
100
C013
L = 10 µH
Figure 16. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C012
Figure 15. Boost and LED Efficiency
Efficiency %
VIN = 4.2V
Freq = 500kHz
LED = 1p10s
L = 22uH
Boost
70
60
50
VIN = 3.6V
Freq = 500kHz
LED = 1p10s
L = 10uH
Boost
LED
40
40
0
20
40
60
80
Brightness %
VIN = 2.7 V
Frequency = 500 kHz
1p10s
100
0
20
L = 10 µH
40
60
80
Brightness %
C014
VIN = 3.6 V
Frequency = 500 kHz
Figure 17. Boost and LED Efficiency
1p10s
C015
L = 10 µH
Figure 18. Boost and LED Efficiency
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Typical Characteristics (continued)
90
90
80
80
70
60
VIN = 4.2V
Freq = 500kHz
LED = 1p10s
L = 10uH
50
Boost
Efficiency %
Efficiency %
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
70
VIN = 5.5V
Freq = 500kHz
LED = 1p10s
L = 10uH
60
50
Boost
LED
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 4.2 V
Frequency = 500 kHz
1p10s
0
L = 10 µH
VIN = 5.5 V
Frequency = 500 kHz
80
80
70
60
100
1p10s
C017
L = 10 µH
70
VIN = 2.7V
Freq = 1MHz
LED = 2p10s
L = 10uH
60
Boost
LED
LED
40
0
20
40
60
80
Brightness %
VIN = 2.5 V
Frequency = 1 MHz
2p10s
100
0
L = 10 µH
VIN = 2.7 V
Frequency = 1 MHz
80
Efficiency %
80
70
60
VIN = 3.6V
Freq = 1MHz
LED = 2p10s
L = 10uH
LED
60
80
100
2p10s
C019
L = 10 µH
Figure 22. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C018
Figure 21. Boost and LED Efficiency
Efficiency %
80
50
Boost
40
70
VIN = 4.2V
Freq = 1MHz
LED = 2p10s
L = 10uH
60
50
Boost
LED
40
40
0
20
40
60
80
Brightness %
VIN = 3.6 V
Frequency = 1 MHz
2p10s
100
0
20
L = 10 µH
40
60
80
Brightness %
C020
VIN = 4.2 V
Frequency = 1 MHz
Figure 23. Boost and LED Efficiency
10
60
Figure 20. Boost and LED Efficiency
90
Efficiency %
Efficiency %
Figure 19. Boost and LED Efficiency
VIN = 2.5V
Freq = 1MHz
LED = 2p10s
L = 10uH
40
Brightness %
90
50
20
C016
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2p10s
100
C021
L = 10 µH
Figure 24. Boost and LED Efficiency
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Typical Characteristics (continued)
90
90
80
80
70
Efficiency %
Efficiency %
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
VIN = 5.5V
Freq = 1MHz
LED = 2p10s
L = 10uH
60
50
70
60
50
Boost
LED
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 5.5 V
Frequency = 1 MHz
2p10s
0
L = 10 µH
VIN = 2.7 V
Frequency = 500 kHz
80
Efficiency %
80
70
60
VIN = 3.6V
Freq = 500kHz
LED = 2p10s
L = 10uH
LED
60
80
100
2p10s
C023
L = 10 µH
Figure 26. Boost and LED Efficiency
90
Boost
40
Brightness %
90
50
20
C022
Figure 25. Boost and LED Efficiency
Efficiency %
VIN = 2.7V
Freq = 500kHz
LED = 2p10s
L = 10uH
Boost
70
60
50
VIN = 4.2V
Freq = 500kHz
LED = 2p10s
L = 10uH
Boost
LED
40
40
0
20
40
60
80
100
Brightness %
VIN = 3.6 V
Frequency = 500 kHz
2p10s
0
20
40
L = 10 µH
60
80
100
Brightness %
C024
VIN = 4.2 V
Frequency = 500 kHz
Figure 27. Boost and LED Efficiency
2p10s
C025
L = 10 µH
Figure 28. Boost and LED Efficiency
90
3.0
2p6s, L=10uH,Freq=500kHz
2.5
2.0
70
IIN (mA)
Efficiency %
80
VIN = 5.5V
Freq = 500kHz
LED = 2p10s
L = 10uH
60
50
1.5
1.0
Boost
0.5
LED1 & 2 on DACA
IIN vs VIN
LED
40
2.7V
3.05V
3.6V
4.2V
5.5V
0.0
0
20
40
60
80
Brightness %
VIN = 5.5 V
Frequency = 500 kHz
2p10s
100
0
20
40
L = 10 µH
60
80
Brightness %
C026
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
Figure 29. Boost and LED Efficiency
Product Folder Links: LM3630A
C029
LED1 and 2 on DACA
2p6s
L = 10 µH
Figure 30. IIN Across VIN
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Typical Characteristics (continued)
17.0
2.7V
3.05V
3.6V
4.2V
5.5V
24
22
20
18
16
14
12
10
8
6
4
2
0
LED1 & 2 on DACA
PWR_IN vs VIN
2.7V
3.05V
3.6V
4.2V
5.5V
16.5
16.0
2p6s, L=10uH,Freq=500kHz
VOUT (V)
PWR_IN (mW)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
15.5
15.0
2p6s, L=10uH,Freq=500kHz
14.5
LED1 & 2 on DACA
VOUT vs VIN
14.0
0
20
40
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
100
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
LED1 and 2 on DACA
2p6s
L = 10 µH
800
2p6s, L=10uH,Freq=500kHz
30
20
700
C003
2p6s, L=10uH,Freq=500kHz
600
500
400
300
LED1 & 2 on DACA
PWR_OUT vs VIN
100
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
LED1 and 2 on DACA
2p6s
L = 10 µH
60
80
100
C033
LED1 and 2 on DACA
2p6s
L = 10 µH
Figure 34. PWR_OUT Across VIN
450
2.7V
3.05V
3.6V
4.2V
5.5V
400
350
I_Inductor (mA)
20
40
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
2.7V
3.05V
3.6V
4.2V
5.5V
2p6s, L=10uH,Freq=500kHz
25
20
C032
Figure 33. IOUT Across VIN
30
ILED (mA)
100
LED1 and 2 on DACA
2p6s
L = 10 µH
200
LED1 & 2 on DACA
IOUT vs VIN
10
80
2.7V
3.05V
3.6V
4.2V
5.5V
900
PWR_OUT (mW)
IOUT (mA)
40
60
Figure 32. VOUT Across VIN
1000
2.7V
3.05V
3.6V
4.2V
5.5V
50
40
Brightness %
Figure 31. PWR_IN Across VIN
60
20
C030
15
10
300
2p6s,L=10uH,Freq=500kHz
250
200
150
100
LED1 & 2 on DACA
ILED vs VIN
5
LED1 & 2 On DACA
I_Inductor vs VIN
50
0
0
0
20
40
60
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
80
100
0
LED1 and 2 on DACA
2p6s
L = 10 µH
40
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
Figure 35. ILED Across VIN
12
20
C034
100
C035
LED1 and 2 on DACA
2p6s
L = 10 µH
Figure 36. I_INDUCTOR Across VIN
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Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
3.0
2p6s, L=10uH,Freq=500kHz
2.5
PWR_IN (mW)
IIN (mA)
2.0
1.5
1.0
2.7V
3.05V
3.6V
4.2V
5.5V
LED1 DACA
LED2 DACB
IIN vs VIN
0.5
0.0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
2.7V
3.05V
3.6V
4.2V
5.5V
2p6s, L=10uH,Freq=500kHz
24
22
20
18
16
14
12
10
8
6
4
2
0
0
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
2.7V
3.05V
3.6V
4.2V
5.5V
50
15.5
2p6s, L=10uH,Freq=500kHz
15.0
100
C030
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
2p6s, L=10uH,Freq=500kHz
30
20
LED1 DACA
LED 2 DACB
VOUT vs VIN
14.5
LED1 DACA
LED2 DACB
IOUT vs VIN
10
14.0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
60
80
100
C032
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
Figure 40. IOUT Across VIN
30
2.7V
3.05V
3.6V
4.2V
5.5V
25
20
ILED (mA)
800
40
Brightness %
2.7V
3.05V
3.6V
4.2V
5.5V
1000
20
C003
Figure 39. VOUT Across VIN
1200
PWR_OUT (mW)
80
40
IOUT (mA)
VOUT (V)
16.0
60
Figure 38. PWR_IN Across VIN
60
2.7V
3.05V
3.6V
4.2V
5.5V
16.5
40
Brightness %
C029
Figure 37. IIN Across VIN
17.0
20
LED1 DACA
LED2 DACB
PWR_IN vs VIN
2p6s, L=10uH,Freq=500kHz
600
400
2p6s, L=10uH,Freq=500kHz
15
10
LED1 DACA
LED2 DACB
PWR_OUT vs VIN
200
LED1 DACA
LED2 DACB
ILED vs VIN
5
0
0
0
20
40
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
100
0
20
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
40
60
80
100
Brightness %
C033
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
Figure 41. PWR_OUT Across VIN
LED1 on DACA
LED2 on DACB
C034
2p6s
L = 10 µH
Figure 42. ILED Across VIN
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Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
450
2.7V
3.05V
3.6V
4.2V
5.5V
400
300
4.0
3.5
2p6s,L=10uH,Freq=500kHz
250
2p10s, L=10uH,Freq=1MHz
4.5
3.0
IIN (mA)
I_Inductor (mA)
350
5.0
LED1 DACA
LED2 DACB
I_Inductor vs
VIN
200
2.5
2.0
150
1.0
50
0.5
0
LED1 & 2 on DACA
IIN vs VIN
0.0
0
20
40
60
80
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
100
Brightness %
20
LED1 on DACA
LED2 on DACB
2p6s
L = 10 µH
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
100
C029
LED1 and LED2 on DACA
2p10s
L = 10 µH
2.7V
3.05V
3.6V
4.2V
5.5V
LED1 & 2 on DACA
PWR_IN vs VIN
27
2p10s, L=10uH,Freq=1MHz
26
2p10s, L=10uH,Freq=1MHz
25
LED1 & 2 on DACA
VOUT vs VIN
24
0
20
40
60
80
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
0
100
Brightness %
80
100
C003
LED1 and LED2 on DACA
2p10s
L = 10 µH
2.7V
3.05V
3.6V
4.2V
5.5V
1600
1400
2p10s, L=10uH,Freq=1MHz
30
20
1200
2p10s, L=10uH,Freq=1MHz
1000
800
600
400
LED1 & 2 on DACA
IOUT vs VIN
10
60
Figure 46. VOUT Across VIN
1800
PWR_OUT (mW)
40
40
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
LED1 and LED2 on DACA
2p10s
L = 10 µH
2.7V
3.05V
3.6V
4.2V
5.5V
50
20
C030
Figure 45. PWR_IN Across VIN
60
IOUT (mA)
80
Figure 44. IIN Across VIN
28
2.7V
3.05V
3.6V
4.2V
5.5V
60
Brightness %
VOUT (V)
PWR_IN (mW)
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
40
C035
Figure 43. I_INDUCTOR Across VIN
LED1 & 2 on DACA
PWR_OUT vs VIN
200
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
0
20
LED1 and LED2 on DACA
2p10s
L = 10 µH
40
60
80
Brightness %
C032
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
Figure 47. IOUT Across VIN
14
2.7V
3.05V
3.6V
4.2V
5.5V
1.5
100
100
C033
LED1 and LED2 on DACA
2p10s
L = 10 µH
Figure 48. PWR_OUT Across VIN
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Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
30
20
2.7V
3.05V
3.6V
4.2V
5.5V
800
700
I_Inductor (mA)
25
ILED (mA)
900
2.7V
3.05V
3.6V
4.2V
5.5V
2p10s, L=10uH,Freq=1MHz
15
10
600
2p10s,L=10uH,Freq=1MHz
500
400
300
200
LED1 & 2 on DACA
ILED vs VIN
5
LED1 & 2 On DACA
I_Inductor vs VIN
100
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
0
LED1 and LED2 on DACA
2p10s
L = 10 µH
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
Figure 49. ILED Across VIN
2p10s, L=10uH,Freq=1MHz
35
PWR_IN (mW)
IIN (mA)
40
3.5
3.0
2.5
2.0
2.7V
3.05V
3.6V
4.2V
5.5V
1.5
LED1 DACA
LED2 DACB
IIN vs VIN
0.0
0
20
40
60
80
20
15
5
0
0
2p10s
L = 10 µH
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
C030
LED1 on DACA
LED2 on DACB
2p10s
L = 10 µH
Figure 52. PWR_IN Across VIN
60
2.7V
3.05V
3.6V
4.2V
5.5V
2p10s, L=10uH,Freq=1MHz
50
40
IOUT (mA)
VOUT (V)
20
C029
LED1 on DACA
LED2 on DACB
LED1 DACA
LED2 DACB
PWR_IN vs VIN
10
2.7V
3.05V
3.6V
4.2V
5.5V
27
C035
25
Figure 51. IIN Across VIN
28
100
2p10s, L=10uH,Freq=1MHz
30
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
80
LED1 and LED2 on DACA
2p10s
L = 10 µH
2.7V
3.05V
3.6V
4.2V
5.5V
45
4.0
0.5
60
Figure 50. I_INDUCTOR Across VIN
50
1.0
40
Brightness %
5.0
4.5
20
C034
26
2p10s, L=10uH,Freq=1MHz
30
20
25
LED1 DACA
LED 2 DACB
VOUT vs VIN
LED1 DACA
LED2 DACB
IOUT vs VIN
10
24
0
0
20
40
60
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
LED1 on DACA
LED2 on DACB
80
100
0
20
2p10s
L = 10 µH
40
60
80
100
Brightness %
C003
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
Figure 53. VOUT Across VIN
LED1 on DACA
LED2 on DACB
C032
2p10s
L = 10 µH
Figure 54. IOUT Across VIN
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Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
1800
1200
20
2p10s, L=10uH,Freq=1MHz
1000
2.7V
3.05V
3.6V
4.2V
5.5V
25
ILED (mA)
1400
PWR_OUT (mW)
30
2.7V
3.05V
3.6V
4.2V
5.5V
1600
800
2p10s,L=10uH,Freq=1MHz
15
10
600
LED1 DACA
LED2 DACB
PWR_OUT vs VIN
400
200
LED1 DACA
LED2 DACB
ILED vs VIN
5
0
0
0
20
40
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
0
100
2.7V
3.05V
3.6V
4.2V
5.5V
900
LED1 on DACA
LED2 on DACB
2p10s
L = 10 µH
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
700
600
C034
LED1 on DACA
LED2 on DACB
2p10s
L = 10 µH
2.5
2.0
2p10s,L=10uH,Freq=1MHz
400
1.5
1.0
300
0.5
0
2.7V
3.05V
3.6V
4.2V
5.5V
LED1 & 2 on DACA
IIN vs VIN
100
0.0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 1 MHz
0
20
LED1 on DACA
LED2 on DACB
2p10s
L = 10 µH
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
100
C029
LED1 and LED2 on DACA
2p6s
L = 22 µH
Figure 58. IIN Across VIN
17.0
2.7V
3.05V
3.6V
4.2V
5.5V
40
C035
Figure 57. I_INDUCTOR Across VIN
24
22
20
18
16
14
12
10
8
6
4
2
0
100
2p6s, L=22uH,Freq=500kHz
LED1 DACA
LED2 DACB
I_Inductor vs
VIN
500
LED1 & 2 on DACA
PWR_IN vs VIN
2.7V
3.05V
3.6V
4.2V
5.5V
16.5
16.0
2p6s, L=22uH,Freq=500kHz
VOUT (V)
PWR_IN (mW)
80
Figure 56. ILED Across VIN
200
15.5
2p6s, L=22uH,Freq=500kHz
15.0
14.5
LED1 & 2 on DACA
VOUT vs VIN
14.0
0
20
40
60
80
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
100
0
20
LED1 and LED2 on DACA
2p6s
L = 22 µH
40
60
Brightness %
C030
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
80
100
C003
LED1 and LED2 on DACA
2p6s
L = 22 µH
Figure 60. VOUT Across VIN
Figure 59. PWR_IIN Across VIN
16
60
3.0
IIN (mA)
I_Inductor (mA)
800
40
Brightness %
Figure 55. PWR_OUT Across VIN
1000
20
C033
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SNVS974B – APRIL 2013 – REVISED OCTOBER 2015
Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
60
40
2.7V
3.05V
3.6V
4.2V
5.5V
1000
PWR_OUT (mW)
50
IOUT (mA)
1200
2.7V
3.05V
3.6V
4.2V
5.5V
2p6s, L=22uH,Freq=500kHz
30
20
800
2p6s, L=22uH,Freq=500kHz
600
400
LED1 & 2 on DACA
IOUT vs VIN
10
LED1 & 2 on DACA
PWR_OUT vs VIN
200
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
LED1 and LED2 on DACA
2p6s
L = 22 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
400
2p6s,L=22uH,Freq=500kHz
15
10
350
300
C033
2p6s,L=22uH,Freq=500kHz
250
200
150
LED1 & 2 On DACA
I_Inductor vs VIN
50
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
LED1 and LED2 on DACA
2p6s
L = 22 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
2.5
PWR_IN (mW)
2.0
1.5
1.0
2.7V
3.05V
3.6V
4.2V
5.5V
LED1 DACA
LED2 DACB
IIN vs VIN
0.0
20
40
60
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
LED1 on DACA
LED2 on DACB
60
80
100
C035
LED1 and LED2 on DACA
2p6s
L = 22 µH
Figure 64. I_INDUCTOR Across VIN
2p6s, L=22uH,Freq=500kHz
0
40
Brightness %
Figure 63. ILED Across VIN
0.5
20
C034
3.0
IIN (mA)
100
LED1 and LED2 on DACA
2p6s
L = 22 µH
100
LED1 & 2 on DACA
ILED vs VIN
5
80
2.7V
3.05V
3.6V
4.2V
5.5V
450
I_Inductor (mA)
ILED (mA)
20
60
Figure 62. PWR_IOUT Across VIN
500
2.7V
3.05V
3.6V
4.2V
5.5V
25
40
Brightness %
Figure 61. IOUT Across VIN
30
20
C032
80
100
2.7V
3.05V
3.6V
4.2V
5.5V
2p6s, L=22uH,Freq=500kHz
24
22
20
18
16
14
12
10
8
6
4
2
0
0
20
60
80
100
Brightness %
C029
2p6s
L = 22 µH
40
LED1 DACA
LED2 DACB
PWR_IN vs VIN
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
Figure 65. IIN Across VIN
LED1 on DACA
LED2 on DACB
C030
2p6s
L = 22 µH
Figure 66. PWR_IIN Across VIN
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Typical Characteristics (continued)
TA = 25°C, ILED full-scale = 20 mA, unless specified otherwise.
17.0
16.0
2.7V
3.05V
3.6V
4.2V
5.5V
50
15.5
2p6s, L=22uH,Freq=500kHz
15.0
30
20
LED1 DACA
LED 2 DACB
VOUT vs VIN
14.5
LED1 DACA
LED2 DACB
IOUT vs VIN
10
14.0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
20
LED1 on DACA
LED2 on DACB
2p6s
L = 22 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
80
100
C032
LED1 on DACA
LED2 on DACB
2p6s
L = 22 µH
Figure 68. IOUT Across VIN
30
2.7V
3.05V
3.6V
4.2V
5.5V
25
20
ILED (mA)
800
60
Brightness %
2.7V
3.05V
3.6V
4.2V
5.5V
1000
40
C003
Figure 67. VOUT Across VIN
1200
PWR_OUT (mW)
2p6s, L=22uH,Freq=500kHz
40
IOUT (mA)
16.5
VOUT (V)
60
2.7V
3.05V
3.6V
4.2V
5.5V
2p6s, L=22uH,Freq=500kHz
600
400
2p6s, L=22uH,Freq=500kHz
15
10
LED1 DACA
LED2 DACB
PWR_OUT vs VIN
200
LED1 DACA
LED2 DACB
ILED vs VIN
5
0
0
0
20
40
60
80
100
Brightness %
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
0
20
LED1 on DACA
LED2 on DACB
2p6s
L = 22 µH
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
LED1 on DACA
LED2 on DACB
80
100
C034
2p6s
L = 22 µH
Figure 70. ILED Across VIN
500
2.7V
3.05V
3.6V
4.2V
5.5V
450
400
350
300
60
Brightness %
Figure 69. PWR_OUT Across VIN
I_Inductor (mA)
40
C033
LED1 DACA
LED2 DACB
I_Inductor vs
VIN
2p6s,L=22uH,Freq=500kHz
250
200
150
100
50
0
0
20
ILED Full Scale = 28.5 mA
Frequency = 500 kHz
40
60
80
100
Brightness %
C035
LED1 on DACA
LED2 on DACB
2p6s
L = 22 µH
Figure 71. I_INDUCTOR Across VIN
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7 Detailed Description
7.1 Overview
The LM3630A provides the power for two high-voltage LED strings (up to 40 V at 28.5 mA each). The two highvoltage LED strings are powered from an integrated asynchronous boost converter. The device is programmable
over an I2C-compatible interface. Additional features include a PWM input for content adjustable brightness
control, programmable switching frequency, and programmable overvoltage protection (OVP).
7.2 Functional Block Diagram
VIN
CIN
COUT
SW
HWEN
Global Enable/
Disable
Reference and
Thermal Shutdown
OVP
Programmable Over
Voltage Protection
(16V, 24V, 32V, 40V)
Boost
Converter
1A Current Limit
Current Sinks
Programmable
500 kHz/1 Mhz
Switching
Frequency
LED1
LED String Open/
Short Detection
LED2
Backlight LED Control
PWM
PWM Sampler
1. 5-bit Full Scale
Current Select
2. 8-bit brightness
adjustment
3. Linear/Exponential
Dimming
SDA
SCL
2
I CCompatible
Interface
4. LED Current Ramping
Fault Detection
OVP
OCP
TSD
INTN
SEL
7.3 Feature Description
7.3.1 Operation
7.3.1.1 Control Bank Mapping
Control of the LM3630A device current sinks is not done directly, but through the programming of Control Banks.
The current sinks are then assigned to the programmed Control Bank (see Figure 72). Both current sinks can be
assigned to Control Bank A or LED1 can use Control Bank A while LED2 uses Control Bank B. Assigning LED1
to Control Bank A and LED2 to Control Bank B allows for better LED current matching. Assigning each current
sink to different control banks allows for each current sink to be programmed with a different current or have the
PWM input control a specific current sink.
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Feature Description (continued)
Current Sinks
Control
Banks
Internal PWM
Filter
PWM
Input
(Assigned to Control Banks)
LED1
BANK A
LE
D2
PWM
Input
PWM
_O
N_
A
=1
LED2
BANK B
LED2_ON_A = 0
Figure 72. Control Diagram
Table 1. Bank Configuration Examples: Register Values
(1)
REGISTERS TO
PROGRAM
ILED1 on A, ILED2 ON B WITH
PWM DIMMING (1)
ILED1 AND ILED2 ON A WITH PWM
DIMMING
ILED1 ON A WITH PWM
ILED2 ON B NO PWM
1EH linear or 06h exp
Control
1EH linear or 06h exp
15h linear or 05h exp
Configuration
1Bh
09h
19h
Brightness A
used for A
used for both
used for A
Brightness B
used for B
not used
used for B
(A and B do not have to be equal)
LED current matching is specified using this configuration.
7.3.1.2 PWM Input Polaritiy
The PWM Input can be set for active high (default) or active low polarity. With active low polarity the LED current
is a function of the negative duty cycle at PWM.
7.3.1.3 HWEN Input
HWEN is the global hardware enable to the LM3630A. HWEN must be pulled high to enable the device. HWEN
is a high-impedance input so it cannot be left floating. When HWEN is pulled low the LM3630A is placed in
shutdown and all the registers are reset to their default state.
7.3.1.4 SEL Input
SEL is the select pin for the serial bus device address. When this pin is connected to ground, the seven-bit
device address is 36H. When this pin is tied to the VIN power rail, the device address is 38H.
7.3.1.5 INTN Output
The INTN pin is an open-drain active-low output signal which indicates detected faults. The signal asserts low
when either OCP, OVP, or TSD is detected by the LED driver. The Interrupt Enable register must be set to
connect these faults to the INTN pin.
7.3.1.6 Boost Converter
The high-voltage boost converter provides power for the two current sinks (ILED1 and ILED2). The boost circuit
operates using a 10-μH to 22-μH inductor and a 1-μF output capacitor. The selectable 500-kHz or 1-MHz
switching frequency allows for the use of small external components and provides for high boost converter
efficiency. Both LED1 and LED2 feature an adaptive voltage regulation scheme where the feedback point (LED1
or LED2) is regulated to a minimum of 300 mV. When there are different voltage requirements in both highvoltage LED strings, because of different programmed voltages or string mismatch, the LM3630A regulates the
feedback point of the highest voltage string to 300 mV and drop the excess voltage of the lower voltage string
across the lower strings current sink.
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7.3.1.7 Boost Switching Frequency Select
The LM3630A’s boost converter can have a 500-kHz or 1-MHz switching frequency. For a 500-kHz switching
frequency the inductor value must be between 10 μH and 22 μH. For the 1-MHz switching frequency the inductor
can be between 10 μH and 22 μH. Additionally, there is a Frequency Shift bit which offsets the frequency
approximately 10%. For the 500 kHz setting, shift = 0. The boost frequency is shifted to 560 kHz when Shift = 1.
For the 1-MHz setting, Shift = 0. The boost frequency is shifted to 1120 kHz when shift = 1.
7.3.1.8 Adaptive Headroom
Reference Figure 73 and Figure 74 for the following description.
The adaptive headroom circuit controls the boost output voltage to provide the minimal headroom voltage
necessary for the current sinks to provide the specified ILED current. The headroom voltage is fed back to the
Error Amplifier to dynamically adjust the Boost output voltage. The error amplifier's reference voltage is adjusted
as the brightness level is changed, because the currents sinks require less headroom at lower ILED currents than
at higher ILED currents. Note that the VHR Min block dynamically selects the LED string that requires the higher
boost voltage to maintain the ILED current; this string has the lower headroom voltage. In Figure 74 this is LED
string 2. The headroom voltage on LED string 1 is higher, but this is due to LED string 2 have an overall higher
forward voltage than LED string 1. LED strings that have closely matched forward voltages have closely matched
headroom voltages and better overall efficiency.
In a single string LED configuration the Feedback enable must be enabled for only that string (LED1 or LED2).
The adaptive headroom circuit is control by that single string. In a two string LED configuration the Feedback
enable must be enabled for both strings (LED1 and LED2). The VHR Min block then dynamically selects the LED
string to control the adaptive headroom circuit.
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VIN
SW
COUT
OVP
Headroom
Control
Boost
Controller
+
IIN
Error
Amplifier
CIN
Brightness
Control
LED1
VHR
Min
LED2
Feedback
Enable
GND
Figure 73. Adaptive Headroom Block Diagram
0.35
VHR1
Headroom Voltage (V)
VHR2
0.30
0.25
0.20
0
20
40
60
80
100
Brightness %
C001
Figure 74. Typical Headroom Voltage Curve
7.3.1.9 Current Sinks
LED1 and LED2 control the current up to a 40-V LED string voltage. Each current sink has 5-bit full-scale current
programmability and 8-bit brightness control. Either current sink has its current set through a dedicated
brightness register and can additionally be controlled via the PWM input.
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7.3.1.10 Current String Biasing
Each current string can be powered from the LM3630A device’s boost or from an external source. When
powered from an external source the feedback input for either current sink can be disabled in the Configuration
Register so it no longer controls the boost output voltage.
7.3.1.11 Full-Scale LED Current
The LM3630A device’s full-scale current is programmable with 32 different full-scale levels. The full-scale current
is the LED current in the control bank when the brightness code is at max code (0xFF). The 5-bit full-scale
current vs code is given by Equation 1:
ILED_FULLSCALE = 5 mA + Code × 0.75 mA
(1)
With a maximum full-scale current of 28.5 mA.
7.3.1.12 Brightness Register
Each control bank has its own 8-bit brightness register. The brightness register code and the full-scale current
setting determine the LED current depending on the programmed mapping mode.
7.3.1.13 Exponential Mapping
In exponential mapping mode the brightness code to backlight current transfer function is given by Equation 2:
ILED = ILED_FULLSCALE x 0.85
(44 -
Code + 1
5.8181818
)
x DPWM
where
•
•
•
ILED_FULLSCALE is the full-scale LED current setting
Code is the backlight code in the brightness register
DPWM is the PWM input duty cycle
(2)
Figure 75 and Figure 76 show the approximate backlight code to LED current response using exponential
mapping mode. Figure 75 shows the response with a linear Y axis, and Figure 76 shows the response with a
logarithmic Y axis. In exponential mapping mode the current ramp (either up or down) appears to the human eye
as a more uniform transition then the linear ramp. This is due to the logarithmic response of the eye.
100
90
LED CURRENT (% of Full Scale)
LED CURRENT (% of Full Scale)
100
80
70
60
50
40
30
20
10
1
10
0
0
51
102
153
204
0.1
0
255
BACKLIGHT CODE (D)
51
102
153
204
255
BACKLIGHT CODE (D)
Figure 75. Exponential Mapping Mode (Linear
Scale)
Figure 76. Exponential Mapping Mode (Log Scale)
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7.3.1.14 Linear Mapping
In linear mapping mode the brightness code to backlight current has a linear relationship and follows Equation 3:
ILED = ILED_FULLSCALE x
1 x Code x D
PWM
255
where
•
•
•
ILED_FULLSCALE is the full scale LED current setting
Code is the backlight code in the brightness register
DPWM is the PWM input duty cycle
(3)
Figure 77 shows the backlight code-to-LED current response using linear-mapping mode. The Configuration
Register must be set to enable linear mapping.
100
LED CURRENT (% Full Scale)
90
80
70
60
50
40
30
20
10
0
0
16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256
BACKLIGHT CODE (D)
Figure 77. Linear Mapping Mode
7.3.2 Test Features
The LM3630A contains an LED open, an LED short, and overvoltage manufacturing fault detection. This fault
detection is designed to be used during the manufacturing process only and not normal operation. These faults
do not set the INTN pin.
7.3.2.1 Open LED String (LED1 And LED2)
An open LED string is detected when the voltage at the input to either LED1 or LED2 has fallen below 200 mV,
and the boost output voltage has hit the OVP threshold. This test assumes that the LED string that is being
detected for an open is being powered from the boost output (Feedback Enabled). For an LED string not
connected to the boost output, and connected to another voltage source, the boost output would not trigger the
OVP flag. In this case an open LED string would not be detected.
7.3.2.2 Shorted LED String
The LM3630A features an LED short fault flag indicating if either of the LED strings have experienced a short.
There are two methods that can trigger a short in the LED strings:
1. An LED current sink with feedback enabled, and the difference between OVP input and the LED current sink
input voltage goes below 1 V.
2. An LED current sink is configured with feedback disabled (not powered from the boost output) and the
difference between VIN and the LED current sink input voltage goes below 1 V.
7.3.2.3 Overvoltage Protection (Manufacturing Fault Detection and Shutdown)
The LM3630A provides an overvoltage Protection (OVP) mechanism specifically for manufacturing test where a
display may not be connected to the device. The OVP threshold on the LM3630A has 4 different programmable
options (16 V, 24 V, 32 V, and 40 V). The manufacturing protection is enabled in the Fault Status register bit 0.
When enabled, this feature causes the boost converter to shutdown anytime the selected OVP threshold is
exceeded. The OVP_fault bit in the Fault Status register is set to one. The boost converter does not resume
operation until the LM3630A is reset with either a write to the Software Reset bit in the Software Reset register or
a cycling of the HWEN pin. The reset clears the fault.
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7.3.3 Fault Flags/Protection Features
The Interrupt Status register contains the status of the protection circuits of the LM3630A. The corresponding bits
are set to one if an OVP, OCP, or TSD event occurs. These faults do set the INTN pin when the corresponding
bit is set in the Interrupt Enable register.
7.3.3.1 Overvoltage Protection (Inductive Boost Operation)
The overvoltage protection threshold (OVP) on the LM3630A has 4 different programmable options (16 V, 24 V,
32 V, and 40 V). OVP protects the device and associated circuitry from high voltages in the event the feedback
enabled LED string becomes open. During normal operation, the LM3630A device’s inductive boost converter
boosts the output up so as to maintain at least 300 mV at the active current sink inputs. When a high-voltage
LED string becomes open the feedback mechanism is broken, and the boost converterinadvertently over boosts
the output. When the output voltage reaches the OVP threshold the boost converter stops switching, thus
allowing the output node to discharge. When the output discharges to VOVP – 1 V the boost converter begins
switching again. The OVP sense is at the OVP pin, so this pin must be connected directly to the inductive boost
output capacitor’s positive terminal.
For current sinks that have feedback disabled the over voltage sense mechanism is not in place to protect from
potential over-voltage conditions. In this situation the application must ensure that the voltage at LED1 or LED2
doesn’t exceed 40 V.
The default setting for OVP is set at 24 V. For applications that require higher than 24 V at the boost output the
OVP threshold has to be programmed to a higher level at power up.
7.3.3.2 Current Limit
The switch current limit for the LM3630A device’s inductive boost is set at 1 A. When the current through the
NFET switch hits this over current protection threshold (OCP) the device turns the NFET off and the energy of
the inductor is discharged into the output capacitor. Switching is then resumed at the next cycle. The current limit
protection circuitry can operate continuously each switch cycle. The result is that during high output power
conditions the device can continuously run in current limit. Under these conditions the device inductive boost
converter stops regulating the headroom voltage across the high voltage current sinks. This results in a drop in
the LED current.
7.3.3.3 Thermal Shutdown
The LM3630A contains thermal shutdown protection. In the event the die temperature reaches 140°C, the boost
power supply and current sinks shut down until the die temperature drops to typically 125°C.
7.3.4 Initialization Timing
7.3.4.1 Initialization Timing With HWEN Tied to VIN
If the HWEN input is tied to VIN, then the tWAIT time starts when VIN crosses 2.5 V as shown in Figure 78. The
initial I2C transaction can occur after the tWAIT time expires. Any I2C transaction during the tWAIT period are
NAK'ed.
2.5V
twait = 1 ms
VIN
HWEN
SCL
SDA
Figure 78. Initialization Timing With HWEN Is Tied to VIN
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7.3.4.2 Initialization Timing With HWEN Driven by GPIO
If the HWEN input is driven by a GPIO then the tWAITtime starts when HWEW crosses 1.2 V as shown in
Figure 79. The initial I2C transaction can occur after the tWAIT time expires. Any I2C transaction during the tWAIT
period are NAK'ed.
VIN
twait = 1 ms
1.2V
HWEN
SCL
SDA
Figure 79. Initialization Timing With HWEN Driven by a GPIO
7.3.4.3 Initialization After Software Reset
The time between the I2C transaction that issues the software reset, and the subsequent I2C transaction (that is,
to configure the LM3630A) must be at greater or equal to the tWAIT period of 1 ms. Any I2C transaction during the
tWAIT period are NAK'ed.
7.4 Device Functional Modes
7.4.1 LED Current Ramping
7.4.1.1 Start-Up/Shutdown Ramp
The LED current turn on time from 0 to the initial LED current set-point is programmable. Similarly, the LED
current shutdown time to 0 is programmable. Both the startup and shutdown times are independently
programmable with 8 different levels. The start-up times are independently programmable from the shutdown
times, but not independently programmable for each Control bank. For example, programming a start-up or
shutdown time, programs the same ramp time for each control bank. The start-up time is used when the device
is first enabled to a non-zero brightness value. The shutdown time is used when the brightness value is
programmed to zero. If HWEN is used to disable the device, the action is immediate and the Shutdown time is
not used. The zero code does take a small amount of time which is approximately 0.5 ms.
Table 2. Start-Up/Shutdown Times
CODE
START-UP TIME
000
4 ms
SHUTDOWN TIME
0
001
261 ms
261 ms
010
522 ms
522 ms
011
1.045 s
1.045 s
100
2.091 s
2.091 s
101
4.182 s
4.182 s
110
8.364 s
8.364 s
111
16.73 s
16.73 s
7.4.1.2 Run-Time Ramp
Current ramping from one brightness level to the next is programmable. There are 8 different ramp up times and
8 different ramp down times. The ramp up time is independently programmable from the ramp down time, but not
independently programmable for each Control Bank. For example, programming a ramp up time or a ramp down
time programs the same ramp time for each control bank. The run time ramps are used whenever the device is
enabled with a non-zero brightness value and a new non-zero brightness value is written.
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Table 3. LED Current Run Ramp Times
CODE
RAMP-UP TIME
RAMP-DOWN TIME
000
0
0
001
261 ms
261 ms
010
522 ms
522 ms
011
1.045s
1.045s
100
2.091s
2.091s
101
4.182s
4.182s
110
8.364s
8.364s
111
16.73s
16.73s
7.4.2 PWM Operation
Current Scaling
2 MHz clock
Filter
Strength
PWM Input
Sample
Period
LPF
ILED
Brightness R3 & R4
Hysteresis
Min
PWM value
Full Scale R5 & R6
Figure 80. PWM Sampler
Hysteresis Block
Output Previous
Previous Value
No
LPF
Output
Sampled
Value
Sampled > Previous +2?
or
Sampled < Previous
Yes
Output Sample
Figure 81. Hysteresis Block (Details)
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Min Block
Input <= 2
Hysteresis
Output
Input
Value
Is input >
code 6?
No
Output = 0
Yes
Output =
Input
PWM
Value
Output = 6
Figure 82. Min Block (Details)
7.4.2.1 PWM Input
The PWM input can be assigned to any control bank. When assigned to a control bank, the programmed current
in the control bank also becomes a function of the duty cycle at the PWM input. The PWM input is sampled by a
digital circuit which outputs a brightness code that is equivalent to the PWM input duty cycle. The resultant
brightness value is a combination of the maximum current setting, the brightness registers, and the equivalent
PWM brightness code.
7.4.2.2 PWM Input Frequency
The specified input frequency of the PWM signal is 10 kHz to 80 kHz. The recommended frequency is 30 kHz or
greater. The PWM input sampler operates beyond those frequency limits. Performance changes based on the
input frequency used. Using frequencies outside the specified range is not recommended. Lower PWM input
frequency increases the likelihood that the output of the sampler may change and that a single brightness step
may be visible on the screen. This may be visible at low brightness because the step change is large relative to
the output level.
7.4.2.3 Recommended Settings
For best performance of the PWM sampler it is recommended to have a PWM input frequency of at least 30 kHz.
The Filter Strength (register 50h) must be set to 03h. The Hysteresis 1 bit must be set in register 05h to 1 when
setting the maximum current for bank A. For example if max current is 20 mA, register 05h is set to 14h, change
that to 94h for 1 bit hysteresis and a smooth min-to-max brightness transition.
7.4.2.4 Adjustments to PWM Sampler
The digital sampler has controls for hysteresis and minimum output brightness which allow the optimization of
sampler output. The default hysteresis mode of the PWM sampler requires detecting a two code change in the
input to increase brightness. Reducing the hysteresis to change on 1 code allows a smoother brightness
transition when the brightness control is swept across the screen in a system. The filter strength bits affect the
speed of the output transitions from the PWM sampler. A lower bound to the brightness is enabled by default
which limits the minimum output of the PWM sampler to an equivalent code of 6 when the LEDs are turned on. A
detected code of 1 is forced to off. A minimum 2% PWM input duty cycle is recommended. Input duty cycles of
1% or less causes delayed off-to-on transitions.
7.4.2.4.1 Filter Strength, Register 50h Bits [1:0]
•
•
28
Filter Strength controls the amount of sampling cycles that are fed back to the PWM input sampler. A filter
strength of 00b allows the output of the PWM sampler to change on every Sample Period. A filter strength of
01b allows the output of the PWM sampler to change every two Sample Periods. A filter strength of 10b
allows the output of the PWM sampler to change every four Sample Periods. A filter strength of 11b allows
the output of the PWM sampler to change every eight Sample Periods.
he effect of setting this value to 11b forces the output of the PWM sampler to change less frequently then
lower values. The benefit is this reduces the appearance of flicker because the output is slower to change.
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The negative is that the output is slower to change.
7.4.2.4.2 Hysteresis 1 Bit, Register 05h, Bit 7
•
•
The default setting for the LM3630A has Bit 7 of register 05h is 0b. This requires the detection of a PWM
input change that is at least 3 equivalent codes higher than the present code. If this bit is set to 1b, the
hysteresis is turned off and the PWM sampler output is allowed to change by 2 code.
Setting this bit to 1b turns off the 2 code requirement for the PWM sampler output to change. The benefit is
that the output change is smoother. The negative is that there may be some PWM input value where the
output could change by one code and it might appear as flicker.
7.4.2.4.3 Lower Bound Disable, Register 05h, Bit 6
•
•
•
The default setting for the LM3630A has Bit 6 of register 05h is 0b. This turns on the lower bound where the
minimum output value of the PWM sampler is an equivalent code of 6. If the PWM sampler detects an
equivalent code of 0 or 1, the output is 0, and the LEDs are off. If the PWM sampler detects an equivalent
code of 2 through 6, a current equal to code 6 is output. Detection of any higher code outputs that code
conforming to the rules of hysteresis above.
Setting Bit 6 of register 05h to 1b can be used to allow the output to be below an equivalent code 6. The
output of the PWM sampler matches the input pulse width conforming to the rules of Hysteresis and
equivalent codes 1, 2, 3, 4, and 5 are also allowed. The benefit is the output is allowed to go dimmer than in
the default mode. The negative is at the low codes of 1 and 2, the LEDs may not turn on or the LEDs may
appear to flicker.
Disabling the Lower Bound (05h Bit 6 = 1b) allows the minimum duty cycle to be detected at 0.35% PWM
input duty cycle. At 30-kHz PWM input frequency, the minimum pulse width required to turn on the LEDs is
0.39% × 33 µS = 129 ns. There is no specified tolerance to this value.
7.4.2.5 Minimum TON Pulse Width
The minimum TON pulse width required to produce a non-zero output is dependent upon the LM3630A settings.
The default setting of the LM3630A requires a minimum of 0.78% duty cycle for the output to be turned on.
Because the lower bound feature is enabled, a value of 0.78% (equivalent brightness code 2) up to 2.35%
(equivalent brightness code 6) all produce an output equivalent to brightness code 6. At 30-kHz PWM input
frequency, the minimum pulse width required to turn on the LEDs is 0.78% × 33 µS = 260 ns.
Because of the hysteresis on the PWM input, this pulse width may not be sufficient to turn on the LEDs. It is
recommended that a minimum pulse width of 2% be used. 2% × 33 µS = 660 ns at 30 kHz input frequency.
Disabling the lower bound as described allows a smaller minimum pulse width.
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7.5 Programming
7.5.1 I2C-Compatible Interface
7.5.1.1 Data Validity
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of
the data line can only be changed when SCL is LOW.
SCL
SDA
data
change
allowed
data
valid
data
change
allowed
data
valid
data
change
allowed
Figure 83. Data Validity Diagram
A pullup resistor between the VIO line of the controller and SDA must be greater than [(VIO – VOL) / 3 mA] to
meet the VOL requirement on SDA. Using a larger pullup resistor results in lower switching current with slower
edges, while using a smaller pullup results in higher switching currents with faster edges.
7.5.1.2 Start and Stop Conditions
START and STOP conditions classify the beginning and the end of the I2C session. A START condition is
defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as
the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and
STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.
During data transmission, the I2C master can generate repeated START conditions. First START and repeated
START conditions are equivalent, function-wise.
SDA
SCL
S
P
START condition
STOP condition
Figure 84. Start and Stop Conditions
7.5.1.3 Transferring Data
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each
byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM3630A pulls down
the SDA line during the 9th clock pulse, signifying an acknowledge. The LM3630A generates an acknowledge
after each byte is received.
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LM3630A address is 36h. For the eighth bit, a “0” indicates a
WRITE and a “1” indicates a READ. The second byte selects the register to which the data is written. The third
byte contains data to write to the selected register.
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Programming (continued)
I2C Compatible Address
MSB
0
Bit 7
LSB
1
Bit 6
1
Bit 5
0
Bit 4
1
Bit 3
1
Bit 2
0
Bit 1
R/W
Bit 0
Figure 85. I2C-Compatible Chip Address (0x36), SEL = 0
I2C Compatible Address
MSB
0
Bit 7
LSB
1
Bit 6
1
Bit 5
1
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
R/W
Bit 0
Figure 86. I2C-Compatible Chip Address (0x38), SEL = 1
7.6 Register Maps
7.6.1 LM3630A I2C Register Map
This table summarizes LM3630A I2C-compatible register usage and shows default register bit values after reset,
as programmed by the factory. The following sub-sections provide additional details on the use of individual
registers. Register bits which are blank in the following tables are considered undefined. Undefined bits should
be ignored on reads and written as zero.
SLAVE ADDRESS [0x36h for SEL = 0, 0x38h for SEL = 1]
BASE REGISTERS
REGISTER NAME
ADDRESS
TYPE
DEFAULT RESET VALUES
Control
0x00
R/W
0xC0
Configuration
0x01
R/W
0x18
Boost Control
0x02
R/W
0x38
Brightness A
0x03
R/W
0x00
Brightness B
0x04
R/W
0x00
Current A
0x05
R/W
0x1F
Current B
0x06
R/W
0x1F
On/Off Ramp
0x07
R/W
0x00
Run Ramp
0x08
R/W
0x00
Interrupt Status
0x09
R/W
0x00
Interrupt Enable
0x0A
R/W
0x00
Fault Status
0x0B
R/W
0x00
Software Reset
0x0F
R/W
0x00
PWM Out Low
0x12
Read
0x00
PWM Out High
0x13
Read
0x00
Revision
0x1F
Read
0x02
Filter Strength
0x50
R/W
0x00
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7.6.2 Register Descriptions
Table 4. Control (Offset = 0x00, Default = 0xC0)
Register Bits
7
6
SLEEP_CMD
SLEEP_
STATUS
5
4
3
2
1
0
LINEAR_A
LINEAR_B
LED_A_EN
LED_B_EN
LED2_ON_A
Name
Bit
Access
SLEEP_CMD
7
R/W
Description
The device is put into sleep mode when set to '1'
SLEEP_STATUS
6
Read
Reflects the sleep mode status. A '1' indicates the part is in sleep mode.
Used to determine when part has entered or exited sleep mode after writing the
SLEEP_CMD bit.
5
Read
LINEAR_A
4
R/W
Enables the linear output mode for Bank A when set to '1'.
LINEAR_B
3
R/W
Enables the linear output mode for Bank B when set to '1'.
LED_EN_A
2
R/W
Enables the LED A output
LED_EN_B
1
R/W
Enables the LED B output
LED2_ON_A
0
R/W
Connect the LED2 output to Bank A Control
Table 5. Configuration (Offset = 0x01, Default = 0x18)
Register Bits
7
Name
6
5
Bit
Access
7
Read
6
Read
4
3
2
1
0
FB_EN_B
FB_EN_A
PWM_LOW
PWM_EN-B
PWM_EN_A
Description
5
Read
FB_EN_B
4
R/W
Enable Feedback on Bank B
FB_EN_A
3
R/W
Enable Feedback on Bank A
PWM_LOW
2
R/W
Sets the PWM to active low
PWM_EN_B
1
R/W
Enables the PWM for Bank B
PWM_EN_A
0
R/W
Enables the PWM for Bank A
Table 6. Boost Control (Offset = 0x02, Default = 0x38)
Register Bits
7
6
5
4
3
2
BOOST_OVP[1] BOOST_OVP[0] BOOST_OCP[1] BOOST_OCP[0] SLOW_STAR
T
1
0
SHIFT
FMODE
Name
Bit
Access
7
Read
BOOST_OVP
6:5
R/W
Selects the voltage limit for over-voltage protection:
00 = 16 V
01 = 24 V
10 = 32 V
11 = 4 0V
BOOST_OCP
4:3
R/W
Selects the current limit for over-current protection:
00 = 600 mA
01 = 800 mA
10 = 1 A
11 = 1.2 A
SLOW_START
2
R/W
Slows the boost output transition
SHIFT
1
R/W
Enables the alternate oscillator frequencies:
For FMODE = 0: SHIFT = 0F = 500 kHz; SHIFT 1F = 560 kHz
For FMODE = 1: SHIFT = 0F = 1 MHz; SHIFT 1F = 1120 MHz
32
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Table 6. Boost Control (Offset = 0x02, Default = 0x38) (continued)
Register Bits
7
6
5
FMODE
0
R/W
4
3
2
1
0
Selects the boost frequency:
0 = 500 kHz, 1 = 1MHz
Table 7. Brightness A (Offset = 0x03, Default = 0x00) (1)
Register Bits
(1)
7
6
5
4
3
2
1
0
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
Name
Bit
Access
A
[7:0]
R/W
Description
Sets the 8-bit brightness value for outputs connected to Bank A. Minimum brightness
setting is code 04h.
These registers are not update if the device is in Sleep Mode (Control: SLEEP_STATUS = 1).
Table 8. Brightness B (Offset = 0x04, Default = 0x00) (1)
Register Bits
(1)
7
6
5
4
3
2
1
0
B[7]
B[6]
B[5]
B[4]
B[3]
B[2]
B[1]
B[0]
Name
Bit
Access
B
[7:0]
R/W
Description
Sets the 8-bit brightness value for outputs connected to Bank B. Minimum brightness
setting is code 04h.
These registers are not update if the device is in Sleep Mode (Control: SLEEP_STATUS = 1).
Table 9. Current A (Offset = 0x05, Default 0x1F)
Register Bits
7
6
Hysteresis
Lower Bound
5
4
3
2
1
0
A[4]
A[3]
A[2]
A[1]
A[0]
Name
Bit
Access
Hysteresis
7
R/W
Description
Determines the hysteresis of the PWM Sampler. Clearing this bit, the PWM sampler
changes its output upon detecting at least 3 equivalent code changes on the PWM
input. Setting this bit, the PWM sampler changes its output upon detecting 2 equivalent
code changes on the PWM input.
Lower Bound
6
R/W
Determines the lower bound of the PWM Sampler. Clearing this bit, the PWM sampler
outputs code 6 when it detects equivalent codes 2 thru 6; and code 0 when it detects
equivalent codes 0 thru 1. Setting this bit, the PWM sampler can output codes below 6,
based upon the Hysteresis setting and equivalent code sampled from the input PWM.
5
Read
A
[4:0]
R/W
Sets the 5-bit full-scale current for outputs connected to Bank A.
Table 10. Current B (Offset = 0x06, Default = 0x1F)
Register Bits
7
6
5
Name
Bit
Access
B
[4:0]
R/W
4
3
2
1
0
B[4]
B[3]
B[2]
B[1]
B[0]
Description
Sets the 5-bit full-scale current for outputs connected to Bank B
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Table 11. On/Off Ramp (Offset = 0x07, Default 0x00)
Register Bits
7
6
5
Name
Bit
Access
7
Read
6
Read
T_START
[5:3]
R/W
Ramp time for startup events.
T_SHUT
[2:0]
R/W
Ramp time for shutdown events.
T_START[2]
Code
4
3
2
1
0
T_START[1]
T_START[0]
T_SHUT[2]
T_SHUT[1]
T_SHUT[0]
Description
Start-Up Time
Shutdown Time
000
4 ms
0*
001
261 ms
261 ms
010
522 ms
522 ms
011
1.045s
1.045 s
100
2.091s
2.091 s
101
4.182s
4.182 s
110
8.364s
8.364 s
111
16.73s
16.73 s
*Code 0 results in approximately 0.5 ms ramp time.
Table 12. Run Ramp (Offset = 0x08, Default = 0x00)
Register Bits
7
6
5
Name
Bit
Access
7
Read
T_UP[2]
4
3
2
1
0
T_UP[1]
T_UP[0]
T_DOWN[2]
T_DOWN[1]
T_DOWN[0]
Description
6
Read
T_UP
[5:3]
R/W
Time for ramp-up events
T_DOWN
[2:0]
R/W
Time for ramp-down events
Code
Ramp-Up Time
000
0*
Ramp-down Time
0*
001
261 ms
261 ms
010
522 ms
522 ms
011
1.045s
1.045 s
100
2.091s
2.091 s
101
4.182s
4.182 s
110
8.364s
8.364 s
111
16.73s
16.73 s
*Code 0 results in approximately 0.5 ms ramp time.
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Table 13. Interrupt Status (Offset = 0x09, Default = 0x00)
Register Bits
7
6
5
4
3
Name
Bit
Access
7
Read
6
Read
5
Read
4
Read
3
Read
OCP
2
R/W
An overcurrent condition occurred.
OVP
1
R/W
An overvoltage condition occurred.
TSD
0
R/W
A thermal shutdown event occurred.
2
1
0
OCP
OVP
TSD
Description
The interrupt status register is cleared upon a read of the register. If the condition that caused the interrupt is still
present, then the bit is set to one again and another interrupt is signaled on the INTN output pin. The interrupt
status register is not cleared if the device is in sleep mode (Control: SLEEP_STATUS = 1). To disconnect the
interrupt condition from the INTN pin during sleep mode, disable the fault connection in the Interrupt Enable
register. An interrupt condition sets the status bit and causes an event on the INTN pin only if the corresponding
bit in the Interrupt Enable register is one and the Global Enable bit is also one.
Table 14. Interrupt Enable (Offset = 0x0A, Default = 0x00)
Register Bits
7
6
5
Access
4
3
2
1
0
OCP
OVP
TSD
Name
Bit
Description
GLOBAL
7
R/W
6
Read
5
Read
4
Read
3
Read
OCP
2
R/W
Set to '1' to enable the over-current condition interrupt.
OVP
1
R/W
Set to '1' to enable the over-voltage condition interrupt.
TSD
0
R/W
Set to '1' to enable the thermal shutdown interrupt.
Set to '1' to enable interrupts to drive the INTN pin.
Table 15. Fault Status (Offset = 0x0B, Default = 0x00)
Register Bits
7
6
5
Name
Bit
Access
7
Read
OPEN
4
3
2
1
0
LED2_SHORT
LED1_SHORT
SHORT_EN
OVP_FAULT
OVP_F_EN
Description
.
6
Read
OPEN
5
R/W
An open circuit was detected on one of the LED strings.
LED2_SHORT
4
R/W
A short was detected on LED string 2.
LED1_SHORT
3
R/W
A short was detected on LED string 1.
SHORT_EN
2
R/W
Set to '1' to enable short test.
OVP_FAULT
1
R/W
An OVP occurred in manufacturing test.
OVP_F_EN
0
R/W
Set to '1' to enable OVP manufacturing test.
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Table 16. Software Reset (Offset = 0x0F, Default = 0x00)
Register Bits
7
6
5
Name
Bit
Access
7
Read
6
Read
5
Read
4
Read
3
Read
2
Read
1
Read
0
R/W
4
3
2
1
0
SW_RESET
SW_RESET
Description
.
Set to '1' to reset the device. This is a full reset which clears the registers, executes a
power-on reset, and reads the EPROM configuration.
Table 17. PWM_OUT Low (Offset = 0x12, Default 0x00)
Register Bits
7
6
5
4
3
2
1
0
PWM_OUT[7]
PWM_OUT[6]
PWM_OUT[5]
PWM_OUT[4]
PWM_OUT[3]
PWM_OUT[2]
PWM_OUT[1]
PWM_OUT[0]
Table 18. PWM_OUT High (Offset = 0x13, Default 0x00)
Register Bits
7
6
5
4
3
2
1
0
PWM_OUT[8]
Name
Bit
Access
PWM_OUT
[7:0]
R/W
Description
The value of the PWM detector. Maximum value is 256 or 100h. If PWM_OUT[7:0] is
non-zero PWM_OUT[8] is zero.
Table 19. Revision (Offset = 0x1F, Default = 0x02)
Register Bits
7
6
5
4
3
2
1
0
REV[7]
REV[6]
REV[5]
REV[4]
REV[3]
REV[2]
REV[1]
REV[0]
Name
Bit
Access
Description
REV
[7:0]
R/W
Revision value
Table 20. Filter Strength (Offset = 0x50, Default = 0x00)
Register Bits
7
36
6
5
Name
Bit
Access
FLTR_STR
[1:0]
R/W
4
3
2
1
0
FLTR_STR[1]
FLTR_STR[0]
Description
Filter Strength
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM3630A is a dual-channel backlight driver. The device has 5-bit full-scale current programmability (5 mA to
30 mA) and for every full-scale current there is 8 bits of LED current adjustment from 0 to IFULL_SCALE. Both
current sinks can be independently controlled via two separate full-scale current registers and two separate 8-bit
brightness registers, or can be made to track together via a single brightness register.
8.2 Typical Application
L
VOUT up to 40V
D1
VIN
CIN
COUT
IN
SW
OVP
SDA
SCL
AP
INTN
LM3630A
LED1
HWEN
LED2
PWM
SEL
GND
Figure 87. LM3630A Typical Application
8.2.1 Design Requirements
For typical white LED applications, use the parameters listed in Table 21.
Table 21. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Minimum input voltage
2.3 V
Minimum output voltage
VIN
Output current
28.5 mA per channel
Switching frequency
500 kHz or 1 MHz
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8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection
The LM3630A is designed to work with a 10-µH to 22-µH inductor. When selecting the inductor, ensure that the
saturation rating for the inductor is high enough to accommodate the peak inductor current. Equation 4 calculates
the peak inductor current based upon LED current, VIN, VOUT, and efficiency.
I PEAK =
I LED VOUT
+ 'I L
×
K
VIN
(4)
where:
'IL =
VIN x (VOUT - VIN )
2 x f SW x L x VOUT
(5)
When choosing L, the inductance value must also be large enough so that the peak inductor current is kept
below the LM3630A device's switch current limit. This forces a lower limit on L given by Equation 6.
VIN x (VOUT - VIN)
L>
§
I LED _ MAX x VOUT
©
K x VIN
2 x f SW x VOUT x ¨
¨I SW_MAX -
·
¸¸
¹
(6)
ISW_MAX is given in Electrical Characteristics, efficiency (η) is shown in theTypical Characteristics, and ƒSW is
typically 500 kHz or 1 MHz.
Table 22. Inductors
CURRENT
RATING
MANUFACTURER
PART NUMBER
VALUE
SIZE
DC RESISTANCE
TDK
VLF4014ST-100M1R0
10 µH
3.8 mm × 3.6 mm × 1.4 mm
1A
0.22 Ω
TDK
VLF302512MT-220M
22 µH
3 mm × 2.5 mm × 1.2 mm
0.43A
0.583 Ω
8.2.2.2 Maximum Power Output
The LM3630A device's maximum output power is governed by two factors: the peak current limit (ICL = 1.2 A
maximum), and the maximum output voltage (VOVP = 40 V minimum). When the application causes either of
these limits to be reached, it is possible that the proper current regulation and matching between LED current
strings may not be met.
In the case of a peak current limited situation, when the peak of the inductor current hits the LM3630A device's
current limit the NFET switch turns off for the remainder of the switching period. If this happens, each switching
cycle the LM3630A begins to regulate the peak of the inductor current instead of the headroom across the
current sinks. This can result in the dropout of the feedback-enabled current sinks and the current dropping
below its programmed level.
The peak current in a boost converter is dependent on the value of the inductor, total LED current (IOUT), the
output voltage (VOUT) (which is the highest voltage LED string + 0.3 V regulated headroom voltage), the input
voltage VIN, and the efficiency (Output Power/Input Power). Additionally, the peak current is different depending
on whether the inductor current is continuous during the entire switching period (CCM) or discontinuous (DCM)
where it goes to 0 before the switching period ends.
For CCM the peak inductor current is given by:
IPEAK =
VIN x efficiency
VIN
IOUT x VOUT
x 1+
VOUT
2 x fsw x L
VIN x efficiency
(7)
For DCM the peak inductor current is given by:
IPEAK =
2 x IOUT
fsw x L x efficiency
x VOUT - VIN x efficiency
(8)
To determine which mode the circuit is operating in (CCM or DCM), a calculation must be done to test whether
the inductor current ripple is less than the anticipated input current (IIN). If ΔIL is < IIN, the device operates in
CCM. If ΔIL is > IIN then the device is operating in DCM.
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VIN x efficiency
VIN
IOUT x VOUT
x 1>
VOUT
VIN x efficiency fsw x L
(9)
Typically at currents high enough to reach the LM3630A device's peak current limit, the device is operating in
CCM.
Application Curves show the output current and output voltage derating for a 10-µH and a 22-µH inductor, at
switch frequencies of 500 kHz and 1 MHz. A 10-µH inductor is typically a smaller device with lower on
resistance, but the peak currents are higher. A 22-µH inductor provides for lower peak currents, but to match the
DC resistance of a 10 µH requires a larger-sized device.
8.2.3 Application Curves
43
43
42
3.0
3.1
40
3.2
3.3
39
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
34
4.3
4.4
33
4.5
4.6
32
4.7
4.8
31
4.9
5.0
30
5.1
5.2
5.3
5.4
38
Vout (V)
37
36
35
Freq = 500kHz
L = 10uH
VIN = 3.0V to 5.5V
29
28
42
41
Vout (V)
41
40
39
38
Freq = 1MHz
L = 10uH
VIN = 3.0V to 5.5V
37
5.5
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
5.5
27
36
0
10
20
30
40
50
60
70
80
0
10
20
30
IOUT (mA)
40
50
60
70
80
IOUT (mA)
C002
Frequency = 500 kHz
C002
L = 10 µH
Frequency = 1 MHz
Figure 89. Maximum Boost Output Power vs VIN
41
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
40
Freq = 500kHz
L = 22uH
VIN = 3.0V to 5.5V
3.0
3.1
39
3.0
3.1
3.2
3.3
38
3.2
3.3
3.4
3.5
3.4
3.5
3.6
3.7
3.6
3.7
3.8
3.9
34
3.8
3.9
4.0
4.1
33
4.0
4.1
4.3
4.4
32
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
37
36
35
Vout (V)
Vout (V)
Figure 88. Maximum Boost Output Power vs VIN
L = 10 µH
31
4.5
4.6
4.7
4.8
4.9
5.0
28
5.1
5.2
27
5.4
26
5.3
30
29
Freq = 1MHz
L = 22uH
VIN = 3.0V to 5.5V
25
5.5
5.5
24
0
10
20
30
40
50
60
70
0
80
10
20
IOUT (mA)
30
40
50
60
70
Frequency = 500 kHz
80
IOUT (mA)
C002
L = 22 µH
C002
Frequency = 1 MHz
Figure 90. Maximum Boost Output Power vs VIN
L = 22 µH
Figure 91. Maximum Boost Output Power vs VIN
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8.3 Initialization Setup
8.3.1 Recommended Initialization Sequence
The recommended initialization sequence for the device registers is as follows:
1. Set Filter Strength register (offset = 50h) to 03h.
2. Set Configuration register (offset = 01h) to enable the PWM and the feedback for Bank A; for example,
writing 09h to the Configuration register, enables PWM and feedback for Bank A. Note the Bank B PWM and
feedback need to be configured if Bank B is used, otherwise disable the Bank B feedback by clearing bit 4
and disable the Bank B PWM by clearing bit 1.
3. Configure the Boost Control register (offset = 02h) to select the OVP, OCP and FMODE. For example,
writing 78h to the Boost Control register sets OVP to 40 V, OCP to 1.2 A and FMODE to 500 kHz.
4. Set the full scale LED current for Bank A and Bank B (if used), by writing to the Current A (offset = 05h), and
Current B(offset = 06) registers. For example, writing 14h to the Current A register selects a full scale LED
current of 20 mA for Bank A.
5. Set the PWM Sampler Hysteresis to 2 codes by setting Bit 7 of the Current A register. Set the PWM Sampler
Lower Bound code to 6 by clearing Bit 6 of the Current A register. Note these settings apply to both Bank A
and Bank B. If only Bank B is used, these setting are still necessary when PWM is enabled.
6. Select the current control and enable or disable the LED Bank A and/or B by writing to Control register(offset
= 00h). For example, writing 14h to the Control register select linear current control and enables Bank A.
7. Set the LED brightness by writing to Brightness A (offset = 03h) and Brightness B (Offset = 04h) registers.
For example, writing FFh to Brightness A sets the LED current to 20 mA, with the Current A register set to
14h, and the PWM input is high.
9 Power Supply Recommendations
The LM3630A operates from a 2.3-V to 5.5-V input voltage. The boost switching frequency is programmable at
500 kHz for low switching loss performance or 1 MHz to allow the use of tiny low-profile inductors. This input
supply must be well regulated and provide the peak current required by the LED configuration and inductor
selected.
40
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10 Layout
10.1 Layout Guidelines
The LM3630A contains an inductive boost converter which detects a high switched voltage (up to 40 V) at the
SW pin, and a step current (up to 900 mA) through the Schottky diode and output capacitor each switching cycle.
The high switching voltage can create interference into nearby nodes due to electric field coupling (I = CdV/dt).
The large step current through the diode and the output capacitor can cause a large voltage spike at the SW pin
and the OVP pin due to parasitic inductance in the step current conducting path (V = Ldi/dt). Board layout
guidelines are geared towards minimizing this electric field coupling and conducted noise. Figure 92 highlights
these two noise generating components.
Voltage Spike
VOUT + VF Schottky
Pulsed voltage at SW
Current through
Schottky Diode and COUT
IPEAK
IAVE = IIN
Paracitic
Circuit Board
Inductances
Current through
inductor
Affected Node
due to capacitive
coupling
Cp1
L
Lp1
D1
Lp2
Up to 40 V
2.7 V to 5.5 V
VLOGIC
COUT
IN
10 k:
SW
Lp3
10 k:
SCL
OVP
SDA
LM3630A
LCD Display
LED1
LED2
GND
Figure 92. LM3630A Boost Converter Showing Pulsed Voltage At SW (High Dv/Dt) and
Current Through Schottky and COUT (High Di/Dt)
The following lists the main (layout sensitive) areas of the LM3630A in order of decreasing importance:
• Output Capacitor
– Schottky Cathode to COUT+
– COUT– to GND
• Schottky Diode
– SW Pin to Schottky Anode
– Schottky Cathode to COUT+
• Inductor
– SW Node PCB capacitance to other traces
• Input Capacitor
– CIN+ to IN pin
– CIN– to GND
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Layout Guidelines (continued)
10.1.1 Output Capacitor Placement
The output capacitor is in the path of the inductor current discharge path. As a result COUT detects a high current
step from 0 to IPEAK each time the switch turns off and the Schottky diode turns on. Any inductance along this
series path from the cathode of the diode through COUT and back into the LM3630A GND pin will contribute to
voltage spikes (VSPIKE = LP_ × dI/dt) at SW and OUT which can potentially overvoltage the SW pin, or feed
through to GND. To avoid this, COUT+ must be connected as close as possible to the Cathode of the Schottky
diode and COUT– must be connected as close as possible to the device GND bump. The best placement for COUT
is on the same layer as the LM3630A so as to avoid any vias that can add excessive series inductance (see
Figure 94).
10.1.2 Schottky Diode Placement
The Schottky diode is in the path of the inductor current discharge. As a result the Schottky diode detects a high
current step from 0 to IPEAK each time the switch turns off and the diode turns on. Any inductance in series with
the diode will cause a voltage spike (VSPIKE = LP_ × dI/dt) at SW and OUT which can potentially overvoltage the
SW pin, or feed through to VOUT and through the output capacitor and into GND. Connecting the anode of the
diode as close as possible to the SW pin and the cathode of the diode as close as possible to COUT+ will reduce
the inductance (LP_) and minimize these voltage spikes (see Figure 94).
10.1.3 Inductor Placement
The node where the inductor connects to the LM3630A SW bump has 2 issues. First, a large switched voltage (0
to VOUT + VF_SCHOTTKY) appears on this node every switching cycle. This switched voltage can be capacitively
coupled into nearby nodes. Second, there is a relatively large current (input current) on the traces connecting the
input supply to the inductor and connecting the inductor to the SW bump. Any resistance in this path can cause
large voltage drops that will negatively affect efficiency.
To reduce the capacitively coupled signal from SW into nearby traces, the SW bump to inductor connection must
be minimized in area. This limits the PCB capacitance from SW to other traces. Additionally, the other traces
need to be routed away from SW and not directly beneath. This is especially true for high impedance nodes that
are more susceptible to capacitive coupling such as (SCL, SDA, HWEN, PWM, and possibly ASL1 and ALS2). A
GND plane placed directly below SW will dramatically reduce the capacitive coupling from SW into nearby traces
To limit the trace resistance of the VBATT to inductor connection and from the inductor to SW connection, use
short, wide traces (see Figure 94).
10.1.4 Input Capacitor Selection and Placement
The input bypass capacitor filters the inductor current ripple, and the internal MOSFET driver currents during
turnon of the power switch.
The driver current requirement can range from 50 mA at 2.7 V to over 200 mA at 5.5 V with fast durations of
approximately 10 ns to 20 ns. This will appear as high di/dt current pulses coming from the input capacitor each
time the switch turns on. Close placement of the input capacitor to the IN pin and to the GND pin is critical since
any series inductance between IN and CIN+ or CIN– and GND can create voltage spikes that could appear on the
VIN supply line and in the GND plane.
Close placement of the input bypass capacitor at the input side of the inductor is also critical. The source
impedance (inductance and resistance) from the input supply, along with the input capacitor of the LM3630A,
form a series RLC circuit. If the output resistance from the source (RS) is low enough the circuit will be
underdamped and will have a resonant frequency (typically the case). Depending on the size of LS the resonant
frequency could occur below, close to, or above switching frequency of the device. This can cause the supply
current ripple to be:
1. Approximately equal to the inductor current ripple when the resonant frequency occurs well above the
LM3630A switching frequency;
2. Greater then the inductor current ripple when the resonant frequency occurs near the switching frequency;
and
3. Less then the inductor current ripple when the resonant frequency occurs well below the switching frequency.
42
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Layout Guidelines (continued)
Figure 93 shows the series RLC circuit formed from the output impedance of the supply and the input capacitor.
The circuit is re-drawn for the AC case where the VIN supply is replaced with a short to GND and the LM3630A
plus inductor is replaced with a current source (ΔIL). In Figure 93, equation 1 is the criteria for an underdamped
response, equation 2 is the resonant frequency, and equation 3 is the approximated supply current ripple as a
function of LS, RS, and CIN.
As an example, consider a 3.6-V supply with 0.1-Ω of series resistance connected to CIN through 50 nH of
connecting traces. This results in an underdamped input filter circuit with a resonant frequency of 712 kHz. Since
the switching frequency lies near to the resonant frequency of the input RLC network, the supply current is
probably larger then the inductor current ripple. In this case using equation 2 from Figure 93 the supply current
ripple can be approximated as 1.68 multiplied by the inductor current ripple. Increasing the series inductance (LS)
to 500 nH causes the resonant frequency to move to around 225 kHz and the supple current ripple to be
approximately 0.25 multiplied by the inductor current ripple.
'IL
ISUPPLY
RS
L
LS
SW
IN
+
LM3630A
CIN
-
VIN
Supply
ISUPPLY
RS
LS
'IL
CIN
2
1.
RS
1
>
L S x C IN
4 x L S2
2.
f RESONANT =
3.
1
2S
LS x CIN
1
2S x 500 kHz x CIN
I SUPPLYRIPPLE | ' I L x
2
RS
§
·
1
¨2S x 500 kHz x LS ¸
¨
¸
x
x
S
500
kHz
C
2
IN
©
¹
2
Figure 93. Input RLC Network
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10.2 Layout Example
Schottky
(SOD-323 40V)
COUT (603 1uF)
Inductor
(VLF302512MT)
CIN (0402 2.2uF)
4mm
8mm
Figure 94. Typical LP3630A PCB Layout (2 × 10 Led Application)
44
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Documentation Support
11.2.1 Related Documentation
For additional information, see the following:
Texas Instruments Application Note 1112: DSBGA Wafer Level Chip Scale Package (SNVA009).
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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45
PACKAGE OPTION ADDENDUM
www.ti.com
10-Sep-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM3630ATME
ACTIVE
DSBGA
YFQ
12
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
D6
LM3630ATMX
ACTIVE
DSBGA
YFQ
12
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
D6
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Sep-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jan-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LM3630ATME
DSBGA
YFQ
12
250
178.0
8.4
LM3630ATME
DSBGA
YFQ
12
250
178.0
LM3630ATMX
DSBGA
YFQ
12
3000
178.0
LM3630ATMX
DSBGA
YFQ
12
3000
178.0
1.52
2.04
0.76
4.0
8.0
Q1
8.4
1.5
2.02
0.74
4.0
8.0
Q1
8.4
1.52
2.04
0.76
4.0
8.0
Q1
8.4
1.5
2.02
0.74
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jan-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM3630ATME
DSBGA
YFQ
12
250
210.0
185.0
35.0
LM3630ATME
DSBGA
YFQ
12
250
220.0
220.0
35.0
LM3630ATMX
DSBGA
YFQ
12
3000
210.0
185.0
35.0
LM3630ATMX
DSBGA
YFQ
12
3000
220.0
220.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
YFQ0012xxx
D
0.600
±0.075
E
TMD12XXX (Rev B)
D: Max = 1.94 mm, Min = 1.88 mm
E: Max = 1.42 mm, Min = 1.36 mm
4215079/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
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12/12
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