ON MC100EP29MNTXG 3.3v / 5v ecl dual differential data and clock d flip−flop with set and reset Datasheet

MC10EP29, MC100EP29
3.3V / 5VECL Dual
Differential Data and Clock
D Flip−Flop With Set and
Reset
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Description
The MC10/100EP29 is a dual master−slave flip−flop. The device
features fully differential Data and Clock inputs as well as outputs.
The MC10/100EP29 is functionally equivalent to the
MC10/100EL29. Data enters the master latch when the clock is LOW
and transfers to the slave upon a positive transition on the clock input.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to VEE and the D input will
bias around VCC/2. The outputs will go to a defined state, however the
state will be random based on how the flip flop powers up.
Both flip flops feature asynchronous, overriding Set and Reset
inputs. Note that the Set and Reset inputs cannot both be HIGH
simultaneously.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
• Maximum Frequency > 3 GHz Typical
• 500 ps Typical Propagation Delays
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
TSSOP−20
DT SUFFIX
CASE 948E
20
1
QFN−20
MN SUFFIX
CASE 485E
xxx
A
L
Y
W
G
XXXX
EP29
ALYWG
G
= MC10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
with VEE = 0 V
with VEE = −3.0 V to −5.5 V
ORDERING INFORMATION
• Open Input Default State
• Safety Clamp on Inputs
• These are Pb−Free Devices
December, 2006 − Rev. 4
XXXX
EP29
ALYWG
G
*For additional marking information, refer to
Application Note AND8002/D.
• NECL Mode Operating Range: VCC = 0 V
© Semiconductor Components Industries, LLC, 2006
MARKING
DIAGRAM*
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
1
Publication Order Number:
MC10EP29/D
MC10EP29, MC100EP29
VCC
R0
S0
Q0
Q0
Q1
Q1
S1
R1
VEE
20
19
18
17
16
15
14
13
12
11
Q
S
R
S
Q
Q
D
R
Q
CLK
CLK
1
2
3
4
5
D0
D0
VBB
CLK0
CLK0
7
8
9
CLK1
D1
D1
6
CLK1
D
10
VCC
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. 20−Lead Pinout (Top View) and Logic Diagram
Exposed Pad
D0
D0
VCC
R0
S0
20
19
18
17
16
VBB
1
15
Q0
CLK0
2
14
Q0
CLK0
3
CLK1
4
12
Q1
CLK1
5
11
S1
MC10/100EP17
6
NOTE:
7
8
13
9
Q1
10
D1 D1 VCC VEE R1
The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to VEE.
Figure 1. QFN−20 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin
Function
D0*, D0*; D1*, D1*
ECL Differential Data Inputs
R0*, R1*
ECL Reset Inputs
CLK0*, CLK0*
ECL Differential Clock Inputs
CLK1*, CLK1*
ECL Differential Clock Inputs
S0* S1*
ECL Set Inputs
Q0, Q0; Q1, Q1
ECL Differential Data Outputs
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative Supply
EP
Exposed Pad
Table 2. TRUTH TABLE
R
S
D
CLK
Q
Q
L
L
L
Z
L
H
L
L
H
Z
H
L
H
L
X
X
L
H
L
H
X
X
H
L
H
H
X
X
Undef
Undef
Z = LOW to HIGH Transition
X = Don’t Care
*Pins will default LOW when left open.
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2
MC10EP29, MC100EP29
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
TSSOP−20
QFN−20
Flammability Rating
Oxygen Index: 28 to 34
Pb Pkg
Pb−Free Pkg
Level 1
N/A
Level 3
Level 1
UL 94 V−0 @ 0.125 in
Transistor Count
383 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
20 TSSOP
20 TSSOP
140
100
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
20 TSSOP
23 to 41
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
QFN−20
QFN−20
47
33
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
QFN−20
18
°C/W
Tsol
Wave Solder
265
265
°C
Pb
Pb−Free
Condition 2
VI v VCC
VI w VEE
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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MC10EP29, MC100EP29
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
57
48
40
49
60
mA
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2480
2355
2290
2415
2540
mV
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1680
1555
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1460
1755
1490
1815
mV
VBB
Output Voltage Reference
1790
1990
1855
2055
2115
mV
VIHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 4)
3.3
2.0
3.3
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
IEE
Power Supply Current
VOH
VOL
1890
2.0
150
0.5
1955
1915
2015
2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
IEE
Power Supply Current
35
46
55
37
48
57
40
VOH
Output HIGH Voltage (Note 6)
3865
3990
4115
3930
4055
4180
3990
VOL
Output LOW Voltage (Note 6)
3065
3190
3315
3130
3255
3380
3190
3315
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
VBB
Output Voltage Reference
3490
3690
3555
3755
3615
VIHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 7)
5.0
2.0
5.0
2.0
IIH
Input HIGH Current
IIL
Input LOW Current
Max
Unit
35
46
55
37
57
48
40
49
60
mA
2165
2290
2415
2230
2480
2355
2290
2415
2540
mV
49
60
mA
4115
4240
mV
3440
mV
4240
mV
3515
mV
3815
mV
5.0
V
150
mA
3590
2.0
150
0.5
3655
150
0.5
0.5
3715
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 8)
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
35
46
55
37
48
57
40
49
60
mA
VOH
Output HIGH Voltage (Note 9)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
VOL
Output LOW Voltage (Note 9)
−1935
−1810
−1685
−1870
−1745
−1620
−1810
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VBB
Output Voltage Reference
−1510
−1310
−1445
−1245
−1385
−1185
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
−1410
VEE + 2.0
0.0
−1345
VEE + 2.0
150
0.5
0.0
−1285
VEE + 2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 W to VCC − 2.0 V.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 12)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 12)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1355
1675
1355
1675
1355
1675
mV
VBB
Output Voltage Reference
1775
1975
1775
1975
1775
1975
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
1875
2.0
150
0.5
1875
150
0.5
0.5
1875
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12. All loading with 50 W to VCC − 2.0 V.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
Output HIGH Voltage (Note 15)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
Output LOW Voltage (Note 15)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3055
3375
3055
3375
3055
3375
mV
VBB
Output Voltage Reference
3475
3675
3475
3675
3475
3675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
3575
2.0
3575
150
0.5
3575
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15. All loading with 50 W to VCC − 2.0 V.
16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
35
46
55
37
48
57
40
49
60
mA
VOH
Output HIGH Voltage (Note 18)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 18)
−1945
−1820
−1695
−1945
−1820
−1695
−1945
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625
−1945
−1625
−1945
−1625
mV
VBB
Output Voltage Reference
−1525
−1325
−1525
−1325
−1525
−1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
−1425
VEE + 2.0
0.0
150
0.5
−1425
VEE + 2.0
0.0
150
0.5
−1425
VEE + 2.0
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 W to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
Min
Characteristic
Symbol
fmax
Maximum Frequency
(See Figure 2 Fmax/JITTER)
tPLH,
tPHL
Propagation Delay to
Output Differential S
R
tS
tH
Typ
25°C
Max
Min
> 3.0
CLK
300
275
300
380
380
400
Setup Time
Hold Time
100
100
tRR/tRR2
Set/Reset Recovery
tPW
Minimum Pulse Width
Set, Reset
tJITTER
Cycle−to−Cycle Jitter
(See Figure 2 Fmax/JITTER)
VPP
Input Voltage Swing (Note 21)
tr
tf
Output Rise/Fall Times
(20% − 80%)
Q, Q
Typ
85°C
Max
Min
> 3.0
450
475
500
350
300
325
420
400
420
20
20
100
100
150
80
500
300
.2
<1
150
800
1200
100
180
250
Typ
Max
> 3.0
500
500
525
Unit
GHz
400
350
375
470
450
470
20
20
100
100
20
20
ps
150
80
150
80
ps
500
300
500
300
.2
<1
150
800
1200
150
210
300
550
550
575
ps
ps
.2
<1
ps
150
800
1200
mV
175
230
325
ps
900
9
800
8
700
7
600
6
500
5
400
4
300
3
200
2
ÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉ
(JITTER)
100
0
0
1000
2000
3000
FREQUENCY (MHz)
Figure 2. Fmax/Jitter
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7
1
4000
5000
JITTER OUT ps (RMS)
VOUTpp (mV)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC−2.0 V.
21. VPP(min) is the minimum input swing for which AC parameters are guaranteed.
ÉÉ
ÉÉ
MC10EP29, MC100EP29
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
ORDERING INFORMATION
Package
Shipping †
MC10EP29DT
TSSOP−20
75 Units / Rail
MC10EP29DTG
TSSOP−20
(Pb−Free)
75 Units / Rail
MC10EP29DTR2
TSSOP−20
2500 / Tape & Reel
MC10EP29DTR2G
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC10EP29MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC10EP29MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
MC100EP29DT
TSSOP−20
75 Units / Rail
MC100EP29DTG
TSSOP−20
(Pb−Free)
75 Units / Rail
MC100EP29DTR2
TSSOP−20
2500 / Tape & Reel
MC100EP29DTR2G
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC100EP29MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC100EP29MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8090/D
− AC Characteristics of ECL Devices
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MC10EP29, MC100EP29
Resource Reference of Application Notes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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MC10EP29, MC100EP29
PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
20X
0.15 (0.006) T U
2X
L
K REF
0.10 (0.004)
S
L/2
20
M
T U
S
V
K
K1
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
S
J J1
11
B
−U−
PIN 1
IDENT
SECTION N−N
0.25 (0.010)
N
1
10
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
G
D
H
DETAIL E
0.100 (0.004)
−T− SEATING
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
PLANE
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
10
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
−−− 0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
MC10EP29, MC100EP29
PACKAGE DIMENSIONS
QFN−20
CASE 485E−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
−X−
A
M
−Y−
N
B
0.25 (0.010) T
0.25 (0.010) T
R
J
C
0.08 (0.003) T
−T−
K
SEATING
PLANE
E
H
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
MILLIMETERS
MIN
MAX
4.00 BSC
4.00 BSC
0.80
1.00
0.23
0.35
2.75
2.85
2.75
2.85
0.50 BSC
1.38
1.43
0.20 REF
0.00
0.05
0.35
0.45
2.00 BSC
2.00 BSC
1.38
1.43
0.60
0.80
INCHES
MIN
MAX
0.157 BSC
0.157 BSC
0.031
0.039
0.009
0.014
0.108
0.112
0.108
0.112
0.020 BSC
0.054
0.056
0.008 REF
0.000
0.002
0.014
0.018
0.079 BSC
0.079 BSC
0.054
0.056
0.024
0.031
G
L
6
10
5
11
1
15
F
20
D
16
NOTE 3
0.10 (0.004)
M
P
T X Y
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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MC10EP29/D
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