NJRC NJW1106FC2-80 Dolby pro logic surround decoder Datasheet

NJW1106
PPRELIMINARY
DOLBY PRO LOGIC SURROUND DECODER
n GENERAL DESCRIPTION
The NJW1106 is a surround processor including all of the
necessary circuits of Dolby Pro Logic Surround decoder and
digital delay.
2
All of internal statuses are controlled by I C BUS interface.
In addition to Dolby Pro Logic Surround function, it
performs easily other surround function such as Hall, Live,
Disco and others.
n PACKAGE OUTLINE
NJW1106FC2-80
NJW1106FC2
Dolby and double-D symbol are trademarks of Dolby Laboratories Licensing Corporation.
San Francisco, CA94103-4813.USA.
This device is available only to licensees of Dolby Lab.
Licensing and application information may be obtained from Dolby Lab.
Purchase of I2C components of New Japan Radio Co., Ltd. or one of its sublicensed Associated
Companies conveys a license under the Philips I2C Patent Rights to use these components in an
I2C system, provided that the system conforms to the I2C Standard Specification as defined by
Philips.
n FEATURES
l Operating Voltage : VCC=10V(Analog Block), VDD=5V(Digital Block)
l Digital Delay on chip
2
l I C BUS Interface
SDA, SCL
l Bi-CMOS Technology
l Package Outline
QFP80, QFP100
n FUNCTION
[Dolby Pro Logic Surround]
l Automatic input balance
l Noise sequencer
l Adaptive matrix
l Center channel control (Wide, Normal, Phantom, Off)
l Modified B-type noise reduction
l 7kHz low-pass filter
l Dolby 3 stereo mode
l Digital time delay (15,20,25,30msec.)
[Other Surround]
l Surround Signal Selector
(L+R, L-R, EXTIN)
l Front mixing control
l Digital time delay
(15,20,25,30,40,50,60msec.)
[Other Function]
l Digital auxiliary outputs
(AUX0-AUX7)
n SYSTEM BLOCK DIAGRAM
LIN
Center Mode
Input Autobalance
Noise Sequencer
Adaptive Matrix
RIN
LOUT
COUT
ROUT
L+R
L-R
Modified
BNR
Delay
EXTIN
SOUT
7KHz
LPF
I2C Interface
SW. Controller
ADD/SUB
MD2
MD1
AUX0-7
SCL
SDA
Ver.1.0
-1-
NJW1106
n ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
SYMBOL
RATING
Supply Voltage
VCC
VDD
Power Dissipationó
PD
Operating Temperature Range
Topr
13
6.5
(QFP80) 1.3
(QFP100) 1.3
-40 to +85
UNIT
°C
Storage Temperature Range
Tstg
-40 to +150
°C
V
W
*On board
n ELECTRICAL CHARACTERISTICS (VCC=10V, VDD=5V, Ta=25°C)
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
9
10
13
V
4.5
5
5.5
V
-
37
50
mA
XOVERALL
Supply Voltage Range
VCC
VDD
Supply Current
ICC
No Signal
IDD
No Signal
-
6
10
mA
Reference Voltage
VREF
No Signal
3.6
4.0
4.4
V
Threshold Voltage
Vthh
Digital input high level
0.7VDD
-
VDD
V
Vthl
Digital input low level
0.0
-
0.3VDD
V
XINPUT AUTO BALANCE
Capture Range
CPR
-
5
-
Error Correction
CER
-
4
-
-0.5
0
0.5
XADAPTIVE MATRIX (0dB=300mVrms, f=1kHz at Cin Cout)
Output Level Accuracy
'Vol
L,R,S’ch.out
dB
relative to Cch
Matrix Rejection relative
MR
Headroom
HR-AM
Total Harmonic Distortion
THD-AM
Signal to Noise Ratio
SNAM
L,R,S’ch.out
25
40
-
dB
VCC=9V at THD=1%
15
17
-
dB
L,R,C,S’ch.out at 4ch.mode
-
0.05
0.2
%
L,R,ch.out at 2ch.mode
-
0.002
0.1
%
Rg=0,wt:CCIR-ARM at 4ch.mode
75
80
-
dB
L,R,ch.out at 2ch.mode
93
100
-
dB
-15.0
-12.5
-10.0
dB
-0.5
0.0
0.5
dB
-
9.5
-
dB
XNOISE SEQUENCER
Output Noise Level
Vno
Output Noise Level
'Vno
L,R,S’ch.out
Accuracy relative to Cch
XMODIFIED B-TYPE NOISE REDUCTION (0dB=300mVrms, f=100Hz at Sin Sout)
Voltage Gain
GV-NR
Vin=0dBd,f=100Hz
Decode Responce1
DEC1
Vin=0dBd,f=1kHz
-1.6
-0.1
1.4
dB
Decode Responce2
DEC2
Vin=-15dBd,f=1.4kHz
-3.0
-1.5
0.0
dB
Decode Responce3
DEC3
Vin=-20dBd,f=1.4kHz
-4.9
-3.4
-1.9
dB
Decode Responce4
DEC4
Vin=-40dBd,f=5kHz
-6.8
-5.3
-3.8
dB
Total Harmonic Distortion
THDNR
Vin=0dBd,f=1kHz
-
0.07
0.3
%
Headroom
HRNR
VCC=9V at THD=1%
15
17
-
dB
Signal to Noise Ratio
SNNR
Rg=0,weightted:CCIR/ARM
73
78
-
dB
Ver.1.0
-2-
NJW1106
n ELECTRICAL CHARACTERISTICS (VCC=10V, VDD=5V, Ta=25°C)
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
-
0.05
0.2
dB
15
17
-
dB
75
80
-
dB
XOTHER SURROUND
Total Harmonic Distortion
THDOS
Vin=0dBd,f=1kHz
L+R,L-R output
Headroom
HROS
VCC=9V at THD=1%
Signal to Noise Ratio
SNOS
Rg=0,weighted:CCIR/ARM
L+R,L-R mode
L+R,L-R mode
XDIGITAL TIME DELAY
Delay Time
Total Gain
Total Harmonic Distortion
Td
fOSC=4MHz
Gv
THD
Vomax
15.4
18.4
ms
20.5
23.5
ms
22.6
25.6
28.6
ms
27.7
30.7
33.7
ms
38.0
41.0
44.0
ms
48.2
51.2
54.2
ms
58.4
61.4
64.4
ms
-3.0
0.0
3.0
dB
Vin=0.3Vrms
Td=15.4ms
-
0.3
0.6
%
f=1kHz
Td=20.5ms
-
0.3
0.6
%
30kHz LPF
Td=25.6ms
-
0.4
0.8
%
Td=30.7ms
-
0.5
1.0
%
Td=41.0ms
-
0.6
1.2
%
Td=51.2ms
-
0.7
1.4
%
Td=61.4ms
Maximum Output Voltage
12.4
17.5
Vin:f=1kHz
-
0.8
1.6
%
1.5
1.8
-
Vrms
30kHz LPF,THD=3%
Output Noise Voltage
No
Rg=600:
Td=15.4ms
-
-85
-75
dBV
Vin=0Vrms
Td=20.5ms
-
-85
-75
dBV
JIS-A
Td=25.6ms
-
-85
-75
dBV
Td=30.7ms
-
-80
-70
dBV
Td=41.0ms
-
-80
-70
dBV
Td=51.2ms
-
-80
-70
dBV
Td=61.4ms
-
-75
-65
dBV
XDIGITAL AUXILIARY OUTPUT
Low Level Output
VOL
Output Current=-1mA
0.0
-
0.3V DD
dB
High Level Output
VOH
Output Current=1mA
0.7VDD
-
VDD
dB
Ver.1.0
-3-
NJW1106
n PACKAGE OUTLINE
(QFP100-C2)
0 - 10°
±0.4
23.9
±0.3
20.0
14.0
0.30
30
0.12
3.0MAX
±0.1
0.65
M
±0.1
0.8
0.15
0.1
±0.1
0.15
±0.1
1
2.7
31
17.9
100
±0.1
50
±0.3
81
±0.4
51
80
n PIN CONNECTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Ver.1.0
-4-
Pin Name
RLC3
RLC8
RLC6
LLI
LBPF
RLI
RBPF
LT
RT
LIN
RIN
HOLDC
NGC3
NGC2
NGC1
GND
MD1
MD2
VSS
NC
NC
NC
NC
NC
NC
Pin No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin Name
NC
NC
NC
NC
NC
VSS
SM0
SM1
AUX7
AUX6
AUX5
AUX4
AUX3
AUX2
AUX1
AUX0
RST
NC
SDA
SCL
NC
CLK2
CLK1
VDD
NC
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Pin Name
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VDD
VCC
SDOUT
LPF1IN
LPF1OUT
OPA1IN
OPA1OUT
CC1
CC2
OPA2IN
OPA2OUT
LPF2IN
LPF2OUT
LPFIN
Pin No.
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin Name
DBIN
DBC1
DBC2
DBC3
LOUT
ROUT
COUT
SOUT
CMC
SMRO
SMRI
EXTIN
VREF
IREF
PSC3
PSC6
PSC2
PSC5
PSC1
PSC4
RLC5
RLC2
RLC1
RLC4
RLC7
NJW1106
n PACKAGE OUTLINE
(QFP80-C2)
0 - 10°
±0.4
23.9
±0.3
20.0
64
41
40
80
25
0.12
M
±0.1
0.8
0.15
0.1
±0.1
0.15
±0.1
±0.1
0.35
±0.1
24
0.8
2.7
1
3.0MAX
±0.3
14.0
±0.4
17.9
65
n PIN CONNECTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
MD2
MD2
VSS
SM0
SM1
AUX7
AUX6
AUX5
AUX4
AUX3
AUX2
AUX1
AUX0
RST
NC
SDA
SCL
NC
CLK2
CLK1
Pin No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Name
NC
VDD
VCC
VCC
SDOUT
SDOUT
LPF1IN
LPF1OUT
OP1IN
OP1OUT
CC1
CC2
OP2IN
OP2OUT
LPF2IN
LPF2OUT
LPFIN
DBIN
DBC1
DBC2
Pin No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Pin Name
DBC3
LOUT
ROUT
COUT
SOUT
CMC
SMRO
SMRI
EXTIN
VREF
IREF
PSC3
PSC6
PSC2
PSC5
PSC1
PSC4
RLC5
RLC2
RLC1
Pin No.
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Pin Name
RLC4
RLC7
RLC3
RLC8
RLC6
LLI
LBPF
RLI
RBPF
LT
RT
LIN
RIN
HOLDC
NGC3
NGC2
NGC1
GND
MD1
MD1
Ver.1.0
-5-
NJW1106
MEMO
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
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