IRF IRF8308MTRPBF Rohs compliant containing no lead and bromide Datasheet

PD -97671
IRF8308MPbF
IRF8308MTRPbF
DirectFET™ Power MOSFET ‚
l
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l
l
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Typical values (unless otherwise specified)
RoHs Compliant Containing No Lead and Bromide 
VDSS
VGS
RDS(on)
RDS(on)
Low Profile (<0.7 mm)
30V max ±20V max 1.9mΩ@ 10V 2.7mΩ@ 4.5V
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
Optimized for High Frequency Switching 
28nC
8.2nC 3.5nC
34nC
20nC
1.8V
Ideal for CPU Core DC-DC Converters
Optimized for Sync. FET socket of Sync. Buck Converter
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques 
100% Rg tested
MX
DirectFET™ ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF8308MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF8308MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF8308MPbF has been optimized for parameters that are critical in synchronous buck
including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF8308MPbF offers particularly low Rds(on) and high Cdv/dt
immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
VDS
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
VGS, Gate-to-Source Voltage (V)
Typical R DS (on) (mΩ)
8
ID = 27A
6
4
TJ = 125°C
2
TJ = 25°C
0
2.0
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance Vs. Gate Voltage
10.0
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
Max.
Units
30
±20
27
21
150
212
12
21
V
A
mJ
A
12
ID= 21A
10
VDS = 24V
VDS= 15V
8
6
4
2
0
0
20
40
60
80
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.051mH, RG = 25Ω, IAS = 21A.
1
5/4/11
IRF8308MPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
VGS = 0V, ID = 250μA
BVDSS
Drain-to-Source Breakdown Voltage
30
–––
–––
ΔΒVDSS/ΔTJ
Breakdown Voltage Temp. Coefficient
–––
22
RDS(on)
Static Drain-to-Source On-Resistance
–––
1.90
–––
2.70
mV/°C Reference to 25°C, ID = 1mA
2.50
mΩ VGS = 10V, ID = 27A
VGS = 4.5V, ID = 21A
3.50
VGS(th)
Gate Threshold Voltage
1.35
1.8
2.35
V
ΔVGS(th)/ΔTJ
Gate Threshold Voltage Coefficient
–––
-6.1
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
1.0
μA
–––
–––
150
–––
–––
100
IGSS
gfs
Qg
Qgs1
Gate-to-Source Forward Leakage
V
–––
i
i
VDS = VGS, ID = 100μA
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
130
–––
–––
Total Gate Charge
–––
28
42
Pre-Vth Gate-to-Source Charge
–––
8.4
–––
VDS = 15V
VGS = 4.5V
S
VDS = 15V, ID =21A
Qgs2
Post-Vth Gate-to-Source Charge
–––
3.5
–––
Qgd
Gate-to-Drain Charge
–––
8.2
–––
ID = 21A
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
7.9
–––
See Fig. 15
Qsw
–––
12
–––
Qoss
Output Charge
–––
20
–––
nC
RG
Gate Resistance
–––
1.2
2.2
Ω
td(on)
Turn-On Delay Time
–––
11
–––
VDD = 15V, VGS = 4.5V
tr
Rise Time
–––
19
–––
ID = 21A
td(off)
Turn-Off Delay Time
–––
23
–––
tf
Fall Time
–––
16
–––
Ciss
Input Capacitance
–––
4404
–––
Coss
Output Capacitance
–––
885
–––
Crss
Reverse Transfer Capacitance
–––
424
–––
Min.
Typ. Max. Units
nC
VDS = 16V, VGS = 0V
ns
RG= 1.8Ω
pF
VDS = 15V
i
VGS = 0V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
–––
–––
ISM
MOSFET symbol
150
(Body Diode)
A
Pulsed Source Current
g
–––
–––
Conditions
showing the
212
integral reverse
VSD
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 21A, VGS = 0V
trr
Reverse Recovery Time
–––
20
30
ns
TJ = 25°C, IF =21A
Qrr
Reverse Recovery Charge
–––
34
51
nC
di/dt = 300A/μs
(Body Diode)
i
i
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
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IRF8308MPbF
Absolute Maximum Ratings
e
e
f
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
Max.
Units
2.8
1.8
89
270
-40 to + 150
W
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
Units
–––
12.5
20
–––
1.0
45
–––
–––
1.4
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
0.022
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
0.20
0.10
0.05
1
R1
R1
0.02
τJ
0.01
τJ
τ1
R2
R2
R3
R3
R4
R4
τa
τ1
τ2
τ2
τ3
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
0.1
SINGLE PULSE
( THERMAL RESPONSE )
Ri (°C/W) τι (sec)
0.99292 0.000074
2.171681 0.007859
24.14602
0.959
17.69469
32.6
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
ˆ Used double sided cooling, mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF8308MPbF
1000
1000
100
BOTTOM
10
2.5V
1
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
BOTTOM
2.5V
10
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 25°C
Tj = 150°C
0.1
1
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
Typical RDS(on) (Normalized)
ID = 27A
ID, Drain-to-Source Current (Α)
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
TJ = 150°C
TJ = 25°C
TJ = -40°C
10
1
VGS = 4.5V
VGS = 10V
1.5
1.0
VDS = 10V
≤60μs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
0.5
4.0
-60 -40 -20 0
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
6
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Typical RDS (on) (mΩ)
C, Capacitance(pF)
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
5
Coss = Cds + Cgd
10000
Ciss
Coss
1000
20 40 60 80 100 120 140 160
Crss
4
3
2
TJ = 25°C
1
100
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
20
40
60
80
100
ID, Drain Current (A)
Fig 9. Typical On-Resistance Vs.
Drain Current and Gate Voltage
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IRF8308MPbF
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000.0
TJ = 150°C
TJ = 25°C
100.0
TJ = -40°C
10.0
1.0
VGS = 0V
0.4
0.6
0.8
1.0
100
10
100μsec
10msec
1
TA = 25°C
Tj = 150°C
Single Pulse
0.1
1.2
1.0
10.0
100.0
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
2.5
Typical VGS(th) Gate threshold Voltage (V)
150
ID, Drain Current (A)
1msec
0.1
0.1
0.2
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
50
2.0
ID = 100μA
1.5
1.0
0.5
0
25
50
75
100
125
-75
150
-50
-25
0
25
50
75
100
125
150
TJ , Junction Temperature ( °C )
TC , Case Temperature (°C)
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS, Single Pulse Avalanche Energy (mJ)
50
ID
7.2A
8.4A
BOTTOM 21A
TOP
40
30
20
10
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF8308MPbF
Id
Vds
Vgs
L
VCC
DUT
0
1K
Vgs(th)
Qgs1 Qgs2
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
VDS
VGS
RG
RD
VDS
90%
D.U.T.
+
- VDD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF8308MPbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
Re-Applied
Voltage
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, MX Outline
(Medium Size Can, X-Designation).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G = GATE
D = DRAIN
S = SOURCE
D
D
S
G
S
D
D
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
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7
IRF8308MPbF
DirectFET™ Outline Dimension, MX Outline
(Medium Size Can, X-Designation)
Please see AN-1035 for DirectFET assembly details, stencil and substrate design recommendations
DIMENSIONS
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
METRIC
MIN MAX
6.25 6.35
4.80 5.05
3.85 3.95
0.35 0.45
0.68 0.72
0.68 0.72
1.38 1.42
0.80 0.84
0.38 0.42
0.88 1.02
2.28 2.42
0.59 0.70
0.03 0.08
0.08 0.17
IMPERIAL
MAX
MIN
0.250
0.246
0.199
0.189
0.156
0.152
0.018
0.014
0.028
0.027
0.028
0.027
0.054
0.056
0.031
0.033
0.017
0.015
0.040
0.035
0.095
0.090
0.028
0.023
0.001
0.003
0.007
0.003
Dimensions are shown in
millimeters (inches)
DirectFET™ Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF8308MPbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF8308MTRPBF). For 1000 parts on 7"
reel, order IRF8308MTR1PBF
REEL DIMENSIONS
TR1 OPTION (QTY 1000)
STANDARD OPTION (QTY 4800)
METRIC
METRIC
IMPERIAL
IMPERIAL
MIN
MAX
MIN
CODE
MAX
MAX
MAX
MIN
MIN
6.9
A
N.C
12.992
330.0
N.C
177.77
N.C
N.C
0.75
0.795
B
N.C
20.2
N.C
19.06
N.C
N.C
0.53
C
0.504
0.50
12.8
13.5
0.520
13.2
12.8
0.059
D
0.059
N.C
1.5
1.5
N.C
N.C
N.C
2.31
E
3.937
100.0
N.C
58.72
N.C
N.C
N.C
F
N.C
N.C
N.C
0.53
N.C
0.724
18.4
13.50
G
0.47
0.488
12.4
N.C
11.9
0.567
14.4
12.01
H
0.47
0.469
11.9
11.9
0.606
N.C
15.4
12.01
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MIN
MAX
MAX
0.311
0.319
7.90
8.10
0.154
3.90
0.161
4.10
0.469
11.90
0.484
12.30
0.215
0.219
5.45
5.55
0.201
5.10
0.209
5.30
0.256
6.50
0.264
6.70
0.059
1.50
N.C
N.C
0.059
1.50
0.063
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.05/11
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9
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