FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Features Description ■ Low-Noise, Constant-Frequency Operation at Heavy The FAN5602 is a universal switched capacitor DC/DC converter capable of step-up or step-down operation. Due to its unique adaptive fractional switching topology, the device achieves high efficiency over a wider input/ output voltage range than any of its predecessors. The FAN5602 utilizes resistance-modulated loop control, which produces lower switching noise than other topologies. Depending upon actual load conditions, the device automatically switches between constant-frequency and pulse-skipping modes of operation to extend battery life. Load ■ High-Efficiency, Pulse-Skip (PFM) Operation at Light Load ■ Switch Configurations (1:3, 1:2, 2:3, 1:1, 3:2, 2:1, 3:1) ■ 92% Peak Efficiency ■ Input Voltage Range: 2.7V to 5.5V ■ Output Current: 3.3V, 200mA at VIN = 3.6V ■ ±3% Output Voltage Accuracy ■ ICC < 1µA in Shutdown Mode ■ 1MHz Operating Frequency ■ Shutdown Isolates Output from Input ■ Soft-Start Limits Inrush Current at Start-up ■ Short-Circuit and Over-Temperature Protection ■ Minimum External Component Count ■ No Inductors The FAN5602 produces a fixed regulated output within the range of 2.7V to 5.5V from any type of voltage source. High efficiency is achieved under various input/ output voltage conditions because an internal logic circuit automatically reconfigures the system to the best possible topology. Only two 1µF bucket capacitors and one 10µF output capacitor are needed. During power on, soft-start circuitry prevents excessive current drawn from the supply. The device is protected against short-circuit and over-temperature conditions. Applications ■ Cell Phones ■ Handheld Computers The FAN5602 is available with 3.3V, 4.5V, and 5.0V output voltage. Any other output voltage option within the 1.5V to 5V range is available upon request. The FAN5602 is available 3x3mm 8-lead MLP packages. ■ Portable RF Communication Equipment ■ Core Supply to Low-Power Processors ■ Low-Voltage DC Bus ■ DSP Supplies Ordering Information Package(1) Part Number Pb-Free Output Voltage, VNOM FAN5602MP33X 3x3mm 8-Lead MLP Yes 3.3V FAN5602MP45X 3x3mm 8-Lead MLP Yes 4.5V FAN5602MP5X 3x3mm 8-Lead MLP Note: 1. Reference MLP08D Option B ONLY. Yes 5.0V Application Diagram Input 2.7V to 5.5V VIN ENABLE 1 C2+ CIN CB C2- GND 2 FAN5602 8 6 3 7 4 5 C1+ VOUT COUT C1- Figure 2. Typical Application Diagram © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter March 2007 VIN ENABLE C1- C1+ BAND GAP VOUT FB ERROR AMP SOFT-START BG Light load FB EN S W I T C H Heavy Load CURRENT SENSE EN C2+ PFM BG A R R A Y VIN MODE 150mV VOUT SC CONTROL LOGIC REF DRIVER C2- 1.6V VIN UVLO OSCILLATOR GND VIN VOUT Figure 3. Block Diagram © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 2 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Block Diagram VIN 1 8 ENABLE C2+ 2 7 C1+ C2- 3 6 VOUT GND 4 5 C1- 3x3mm 8-Lead MLP Figure 4. Pin Assignments Pin Descriptions Pin # Name Description 1 VIN Supply Voltage Input. 2 C2+ Bucket Capacitor2. Positive Connection. 3 C2- Bucket Capacitor2. Negative Connection. 4 GND 5 C1- 6 VOUT Regulated Output Voltage. Bypass this pin with 10μF ceramic low-ESR capacitor. 7 C1+ Bucket Capacitor1. Positive Connection. 8 ENABLE Ground Bucket Capacitor1. Negative Connection. Enable Input. Logic high enables the chip and logic low disables the chip, reducing the supply current to less than 1µA. Do not float this pin. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 3 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Pin Assignments Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN Parameter Min. Max. Unit VIN, VOUT, ENABLE,Voltage to GND -3.0 6.0 V Voltage at C1+,C1-,C2+, and C2-to GND -3.0 VIN +0.3 V PD Power Dissipation TL Lead Soldering Temperature (10 seconds) 300 C° TJ Junction Temperature 150 C° TSTG Storage Temperature 150 C° ESD Internally Limited -55 Human Body Model (HBM) 2 kV Charged Device Model (CDM) 2 kV Note: 2. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIAJ/JESD22C101-A (Charged Device Model). Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VIN IL Parameter Condition Input Voltage Load Current 1.8 Typ. Max. Unit 5.5 V VIN < 2V 30 3.3V, VIN = 3.6V 200 4.5& 5.5,VIN = 3.6V 100 Ambient Temperature TA Note: 3. Refer to Figure 9 in Typical Performance Characteristics. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 Min. -40 +85 mA C° www.fairchildsemi.com 4 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Absolute Maximum Ratings VIN = 2.7V to 5.5V, C1 = C2 = 1µF, CIN = COUT = 10µF, ENABLE = VIN, TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = 25°C. Symbol Parameter Condition Min. Typ. Max. Unit 1.5 1.7 2.2 v 0.97 x VNOM VNOM 1.03 x VNOM V VUVLO Input Under-Voltage Lockout VOUT Output Voltage VIN ≥ 0.75 x VNOM, 0mA < ILOAD <100mA Quiescent Current VIN ≥ 1.1 x VNOM, ILOAD = 0mA 170 300 µA Off Mode Supply Current ENABLE = GND 0.1 1.0 µA Output Short-Circuit VOUT < 150mV 200 mA IQ Efficiency VIN = 0.85 x VNOM, ILOAD = 30mA 3.3V 75 4.5,5.0V 80 VIN = 1.1 x VNOM, ILOAD = 30mA 3.3V 90 4.5,5.0V 92 fOSC Oscillator Frequency TSD Thermal Shutdown Threshold 145 °C Thermal Shutdown Threshold Hysteresis 15 °C TSDHYS TA = 25°C 0.7 1.0 % 1.3 MHz VIH ENABLE Logic Input High Voltage VIL ENABLE Logic Input Low Voltage IEN ENABLE Logic Input Bias ENABLE =VIN or GND Current tON VOUT Turn-On Time VIN = 0.9 x VNOM, ILOAD = 0mA,10% to 90% 0.5 ms VOUT Ripple VIN = 2.5V, ILOAD = 200mA 10 mVpp 1.5 © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 V -1 0.5 V 1 µA www.fairchildsemi.com 5 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter DC Electrical Characteristics TA = 25°C, VOUT = 4.5V unless otherwise noted. 180 80 160 70 Shutdown Current (nA) Quiescent Current (µA) 140 120 100 80 60 40 20 60 50 40 30 20 10 0 0 1.5 2.5 3.5 4.5 1 5.5 2 Input Voltage (V) Figure 4. Quiescent Current vs. Input Voltage 5 6 100 90 4.50 ILOAD = 100mA VOUT = 4.5V 80 Efficiency 4.45 4.40 70 60 50 Load Current = 10mA Load Current = 50mA Load Current = 100mA Load Current = 150mA 40 4.35 30 4.30 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 20 2.500 6.0 3.000 3.500 Input Voltage (V) 4.000 4.500 5.000 5.500 Input Voltage Figure 6. Line Regulation Figure 7. Efficiency vs. Input Voltage 4.6 700.0 600.0 4.5 VIN = 3.6V Load Current (mA) Output Voltage (V) 4 Figure 5. Shutdown Current vs. Input Voltage 4.55 Output Voltage (V) 3 Input Voltage (V) 4.4 4.3 4.2 4.1 DVOUT < 10% DVOUT < 3% 500.0 400.0 300.0 200.0 100.0 4.0 0.0 1 50 100 150 200 250 300 350 2 Load Currrent (mA) 3 3.5 4 4.5 5 Input Voltage (V) Figure 8. Load Regulation Figure 9. Output Current Capacity vs. Input Voltage © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 2.5 www.fairchildsemi.com 6 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Typical Performance Characteristics TA = 25°C and VOUT = 4.5V unless otherwise noted. 5 4.5 Load Current = 10mA Output Voltage (V) Output Voltage (V) 4.5 4 3.5 3 Load Current = 10mA Load Current = 50mA Load Current = 100mA Load Current = 150mA Load Current = 200mA 2.5 4.45 4.4 4.35 4.3 2 2 3 4 5 6 -60 -40 -20 Input Voltage (V) 0 20 40 60 80 100 120 140 Ambient Temperature (C) Figure 10. Output Voltage vs. Input Voltage Figure 11. Output Voltage vs. Ambient Temperature 1.4 80 1.3 VIN = 3.6V Enable (V) Efficiency (%) 75 70 1.2 1.1 1 65 0.9 60 0.8 0 50 100 150 200 250 300 2 Figure 12. Peak Efficiency vs. Load Current 2.5 3 3.5 4 4.5 5 5.5 6 Figure 13. Enable Threshold vs. Input Voltage 5.5 Mode Change Threshold (V) Mode 1 5 4.5 Mode 2 4 3.5 3 Mode 3 2.5 Mode 4 2 0 50 100 150 200 Load Current (mA) Figure 14. Mode Change Threshold and Hysteresis © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 7 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Typical Performance Characteristics (Continued) FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Typical Performance Characteristics (Continued) Outp ut Volt age (50mV/div) Lo ad Curr ent (100mA /div ) TA = 25°C, VOUT = 3.3V unless otherwise noted. VIN = 3.7V C OUT = 5µF o TA = 25 C Time (10µs/div) Figure 15. Load Transient Response (LDO Mode) Outp ut Voltag e (50mV/div) Loa d Cur rent (100mA/di v) V IN = 3.0 V C OU T = 5µF TA = 25 oC Time (10µs/div) (50mV/di v) VIN = 2.5 V, TA = 25oC COUT = 5µF (100mA /div ) Load Current Output Voltage Figure 16. Load Transient Response (2:3 Mode) Figure 17. Load Transient Response (1:2 Mode) © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 8 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Typical Performance Characteristics (Continued) TA = 25°C, CIN = COUT = 10µF, CB = 1µF, VOUT = 4.5V unless otherwise noted. IOUT = 200mA VIN = 2.5V VIN = 3.6V Output Ripple (20 mV/div) Output Ripple (20 mV/div) IOUT = 200mA Time (100 µs/div) Time (100 µs/div) Figure 18. Output Ripple Figure 19. Output Ripple IOUT = 200mA IOUT = 300mA VIN = 4.2V Output Ripple (20 mV/div) Output Ripple (20 mV/div) VIN = 2.5V Time (100 µs/div) Time (100 µs/div) Figure 20. Output Ripple Figure 21. Output Ripple IOUT = 300mA VIN = 3.6V VIN = 4.2V Output Ripple (20 mV/div) Output Ripple (20 mV/div) IOUT= 300mA Time (100 µs/div) Time (100 µs/div) Figure 22. Output Ripple Figure 23. Output Ripple © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 9 FAN5602 is a high-efficiency and low-noise switched capacitor DC/DC converter capable of step-up and stepdown operations. It has seven built-in switch configurations. Based on the ratio of the input voltage to the output voltage, the FAN5602 automatically reconfigures the switch to achieve the highest efficiency. The regulation of the output is achieved by a linear regulation loop, which modulates the on-resistance of the power transistors so that the amount of charge transferred from the input to the flying capacitor at each clock cycle is controlled and is equal to the charge needed by the load. The current spike is reduced to minimum. At light load, the FAN5602 automatically switches to Pulse Frequency Modulation (PFM) mode to save power. The regulation at PFM mode is achieved by skipping pulses. input is connected to the bottom the capacitors so that the top of the capacitors is boosted to a voltage that equals VIN/2 + VIN, i.e., 3/2 x VIN. By connecting the top of the capacitors to the output, one can ideally charge the output to 3/2 x VIN. If 3/2 x VIN is higher than the needed VOUT, the linear regulation loop adjusts the onresistance to drop some voltage. Boosting the voltage of the top of the capacitors to 3/2 x VIN by connecting VIN the bottom of the capacitors, boosts the power efficiency 3/2 times. In 2:3 mode, the ideal power efficiency is VOUT/1.5 x VIN. For example, if VIN = 2V, VOUT = 2 x VIN = 4V, the ideal power efficiency is 100%. When 2 x VIN > VOUT > 1.5 x VIN, the 1:2 mode (step-up) shown in Figure 33 is used. Both in the charging phase and in pumping phase, two flying capacitors are placed in parallel. In charging phase, the capacitors are charged to the input voltage. In the pumping phase, the input voltage is placed to the bottom of the capacitors. The top of the capacitors is boosted to 2 x VIN. By connecting the top of the capacitors to the output, one can ideally charge the output to 2 x VIN. Boosting the voltage on the top of the capacitors to 2VIN boosts the power efficiency 2 times. In 1:2 mode, the ideal power efficiency is VOUT/2 x VIN. For example, VIN = 2V, VOUT = 2 x VIN = 4V, the ideal power efficiency is 100%. Linear Regulation Loop The FAN5602 operates at constant frequency at load higher than 10mA. The linear regulation loop consisting of power transistors, feedback (resistor divider), and error amplifier is used to realize the regulation of the output voltage and to reduce the current spike. The error amplifier takes feedback and reference as inputs and generates the error voltage signal. The error voltage signal is then used as the gate voltage of the power transistor and modulates the on-resistance of the power transistor and, therefore, the charge transferred from the input to the output is controlled and the regulation of the output is realized. Since the charge transfer is controlled, the FAN5602 has a small ESR spike. When 3 x VIN > VOUT > 2 x VIN, the 1:3 mode (step-up) shown in Figure 34 is used. In charging phase, two flying capacitors are placed in parallel and each is charged to VIN. In the pumping phase, the two flying capacitors are placed in series and the input is connected to the bottom of the series connected capacitors. The top of the series connected capacitors is boosted to 3 x VIN. The ideal power efficiency is boosted 3 times and is equal to VOUT/ 3VIN. For example, VIN = 1V, VOUT = 3 x VIN = 3V, the ideal power efficiency is 100%. By connecting the output to the top of the series connected capacitors, one can charge the output to 3 x VIN. Switch Array Switch Configurations The FAN5602 has seven built-in switch configurations, including 1:1, 3:2, 2:1 and 3:1 for step-down and 2:3, 1:2 and 1:3 for step-up. When 1.5 x VOUT > VIN > VOUT, the 1:1 mode shown in Figure 31 is used. In this mode, the internal oscillator is turned off. The power transistors connecting the input and the output become pass transistors and their gate voltages are controlled by the linear regulation loop, the rest of power transistors are turned off. In this mode, the FAN5602 operates exactly like a low dropout (LDO) regulator and the ripple of the output is in the micro-volt range. The internal logic in the FAN5602 monitors the input and the output compares them, and automatically selects the switch configuration to achieve the highest efficiency. The step-down modes 3:2, 2:1, and 3:1 can be understood by reversing the function of VIN and VOUT in the above discussion. When 1.5 x VIN > VOUT > VIN, the 2:3 mode (step-up) shown in Figure 32 is used. In the charging phase, two flying capacitors are placed in series and each capacitor is charged to a half of the input voltage. In pumping phase, the flying capacitors are placed in parallel. The The built-in modes improve power efficiency and extend the battery life. For example, if VOUT = 5V, mode 1:2 needs a minimum VIN = 2.5V. By built-in 1:3 mode, the minimum battery voltage is extended to 1.7V. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 10 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Functional Description TOP TOP C1+ S1A S1A C1+ S1A S2A MID C1 C1 S2A MID S3A S5 C1- C1- C1- Figure 25. Mode 2 (2:3 or 3:2) All Switches Set for Phase 1 and Reverse State for Phase 2 TOP S1A S1B S2A S2B TOP S3A S3B S4A S4B C1+ C2+ C2+ S1A S2A C1 MID MID C2 S2B C2 S3B C1- C1- S4B GND Figure 24. Mode 1 (1:1) C1 C2 S3B GND C1+ C1+ S4A S5 S4B C2- C2GND Figure 27. Mode 4 (1:3 or 3:1) All Switches Set for Phase 1 and Reverse State for Phase 2 Figure 26. Mode 3 (1:2 or 2:1) All Switches Set for Phase 1 and Reverse State for Phase 2 Light-Load Operation Short Circuit The power transistors used in the charge pump are very large in size. The dynamic loss from the switching the power transistors is not small and increases its proportion of the total power consumption as the load gets light. To save power, the FAN5602 switches, when the load is less than 10mA, from constant frequency to pulse-skipping mode (PFM) for modes 2:3(3:2), 1:2(2:1) and 1:3(3:1), except mode 1:1. In PFM mode, the linear loop is disabled and the error amplifier is turned off. A PFM comparator is used to setup an upper threshold and a lower threshold for the output. When the output is lower than the lower threshold, the oscillator is turned on and the charge pump starts working and keeps delivering charges from the input to the output until the output is higher than the upper threshold. The oscillator shuts off power transistors and delivers the charge to the output from the output capacitor. PFM operation is not used for Mode 1:1, even if at light load. Mode 1:1 is designed as an LDO with the oscillator off. The power transistors at LDO mode are not switching and therefore do not have the dynamic loss. When the output voltage is lower than 150mV, the FAN5602 enters short-circuit condition. In this condition, all power transistors are turned off. A small transistor shorting the input and the output turns on and charges the output. This transistor stays on as long as the VOUT < 150mV. Since this transistor is very small, the current from the input to the output is limited. Once the short at the output is eliminated, this transistor is large enough to charge the output higher than 150mV and the FAN5602 enters soft-start period. Soft Start The FAN5602 uses a constant current, charging a lowpass filter to generate a ramp. The ramp is used as reference voltage during the startup. Since the ramp starts at zero and goes up slowly, the output follows the ramp and inrush current is restricted. When the ramp is higher than bandgap voltage, the bandgap voltage supersedes ramp as reference and the soft start is over. The soft start takes about 500µs. Switching from linear operation to PFM mode (ILOAD<10mA) and from PFM to linear mode (ILOAD>10mA) is automatic, based on the load current, which is monitored all the time. Thermal Shutdown The FAN5602 goes to thermal shutdown if the junction temperature is over 150°C with 15°C hysteresis. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 11 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Switch Array Modes Using the FAN5602 to Drive LCD Backlighting The FAN5602 4.5V option is ideal for driving the backlighting and flash LEDs for portable devices. One FAN5602 device can supply the roughly 150mA needed to power both the backlight and the flash LEDs. Even though drawing this much current from the FAN5602 drives the part out of the 3% output regulation, it is not a VIN BATTERY 3.2 to 4.2V 10F problem. The backlight and flash LEDs still produce optimal brightness at the reduced regulation. When building this circuit, use ceramic capacitors with low ESR. All capacitors should be placed as close as possible to the FAN5602 in the PCB layout. FOL216CIW VOUT FAN5602 10F 50 1F FOL625CIW 50 50 50 20 1F BACKLIGHT FLASH Figure 28. Circuit for Backlighting / Flash Application © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 12 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Application Information FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Package Dimensions Dimensions are in millimeters unless otherwise noted. Figure 29. 8-Lead 3x3mm Molded Leadless Package (MLP), .8mm Thick © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 13 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.0 www.fairchildsemi.com 14