ANSALDO Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - Ansaldo Trasporti s.p.a. Unita' Semiconduttori PHASE CONTROL THYRISTOR AT607 Repetitive voltage up to Mean on-state current Surge current 800 V 2585 A 36 kA FINAL SPECIFICATION feb 97 - ISSUE : 03 Symbol Characteristic Tj [°C] Conditions Value Unit BLOCKING V RRM Repetitive peak reverse voltage 140 800 V V RSM Non-repetitive peak reverse voltage 140 900 V V DRM Repetitive peak off-state voltage 140 800 V I RRM Repetitive peak reverse current V=VRRM 140 100 mA I DRM Repetitive peak off-state current V=VDRM 140 100 mA CONDUCTING I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 2585 A I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 2420 A I TSM Surge on-state current sine wave, 10 ms I² t I² t without reverse voltage V T On-state voltage On-state current = 25 1.55 V T(TO) Threshold voltage 140 0.8 T On-state slope resistance 140 0.120 mohm r 140 6000 A 36 6480 x1E3 kA A²s V V SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 2600 A, gate 10V 5ohm 140 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 140 500 V/µs td Gate controlled delay time, typical VD=100V, gate source 25V, 10 ohm , tr=.5 µs 25 tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 75% VDRM Q rr 3 µs 250 µs Reverse recovery charge di/dt=-20 A/µs, I= 1730 A I rr Peak reverse recovery current VR= 50 V 140 µC I H Holding current, typical VD=5V, gate open circuit 25 300 mA I L Latching current, typical VD=5V, tp=30µs 25 700 mA 25 3.5 V A GATE V GT Gate trigger voltage VD=5V I GT Gate trigger current VD=5V 25 200 mA V GD Non-trigger gate voltage, min. VD=VDRM 140 0.25 V V FGM Peak gate voltage (forward) 30 V I FGM Peak gate current 10 A V RGM Peak gate voltage (reverse) P GM Peak gate power dissipation P G Average gate power dissipation Pulse width 100 µs 5 V 150 W 2 W 21 °C/kW 6 °C/kW -30 / 140 22.0 / 24.5 520 °C kN g MOUNTING R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled R th(c-h) Thermal impedance Case to heatsink, double side cooled T F j Operating junction temperature Mounting force Mass ORDERING INFORMATION : AT607 S 08 standard specification VDRM&VRRM/100 ANSALDO AT607 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 DISSIPATION CHARACTERISTICS SQUARE WAVE Th [°C] 140 130 120 110 100 30° 90 60° 80 90° 70 120° 180° 60 DC 50 0 500 1000 1500 2000 2500 3000 3500 IF(AV) [A] PF(AV) [W] 4500 4000 DC 180° 3500 120° 90° 3000 60° 2500 30° 2000 1500 1000 500 0 0 500 1000 1500 2000 IF(AV) [A] 2500 3000 3500 ANSALDO AT607 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 DISSIPATION CHARACTERISTICS SINE WAVE Th [°C] 140 130 120 110 100 30° 90 60° 80 90° 70 120° 180° 60 50 0 500 1000 1500 2000 2500 3000 3500 3000 3500 IF(AV) [A] PF(AV) [W] 4000 180° 3500 90° 120° 60° 3000 30° 2500 2000 1500 1000 500 0 0 500 1000 1500 2000 IF(AV) [A] 2500 ANSALDO AT607 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 SURGE CHARACTERISTIC Tj = 140 °C 8000 40 7000 35 6000 30 5000 25 ITSM [kA] On-state Current [A] ON-STATE CHARACTERISTIC Tj = 140 °C 4000 3000 20 15 2000 10 1000 5 0 0 0.6 1.1 1.6 1 On-state Voltage [V] 10 n° cycles TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 25.0 Zth j-h [°C/kW] 20.0 15.0 10.0 5.0 0.0 0.001 0.01 0.1 1 t[s] 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. 100