epc700/epc702 24V/50mA General-Purpose Output-Driver General Description Features The epc70x family is a general purpose low-side power switch for 24V interfaces. A high-side switch is also available, please refer to the separate data sheet of epc701/703. The device is very easy to use and capable to drive a load of 50mA at 30VDC. If a higher driving current is necessary or if the output voltage shall be higher than 30VDC, these chips can be used to drive an external power transistor. In this mode of operation, the external transistor is fully protected against over-current by the epc chip. Low-side power switch Driving capability without external transistor 50 mA/30VDC Programmable short-circuit detection delay-time and recovery time Static (epc700) or flashing (epc702) indication of the over-current status Self-healing output mode Available in CSP6 package with very small footprint and standard QFN16 package If the current through the external load exceeds a specified threshold during a longer time period than a predefined time, the Applications output is turned off to protect the output switch. The switch is turned on again after a predefined off-time, thus enabling the load PLC again in a self-healing mechanism. The over-current information is Sensors indicated on the STATUS pin. Controllers epc700 and epc702 are easy to use and reduce the need of external components to the minimum, thus saving pcb space and money. Functional Block Diagram VDD Configuration registers ISource Control logic IN OUT Isink GND Over-current delay / release STATUS SENSE + Over current sense – GND + ref GND © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice GND 1 RSENSE GND Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions Min. Max. Units Power Supply Voltage V DD -0.3 to +36.0 V (Note 2) Power Supply Voltage (V DD) 9.6 30 V Maximum Power Dissipation 100mW Storage Temperature Range (T S) -40°C to +85°C Operating Temperature (T O) -40° +85° C Lead Temperature solder, 4 sec. (T L) +260°C Humidity (non-condensing) +5 +95 % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifica tions and test conditions, see Electrical Characteristics. Note 2: Supply voltages up to 36 Volts may be present for 10 seconds only. Note 3: This device is a highly sensitive CMOS amplifier with an ESD rating of JEDEC HBM class 1C (>1kV). Handling and assembly of this device should only be done at ESD protected workstations. Electrical Characteristics VDD = 9.6V < V DD < 30V, -40°C < T A < +85°C Symbol Parameter Conditions/Comments Values Min. VDD ΔVDD Supply Voltage Typ. 9.6 Ripple on Supply Voltage Peak-Peak no load Max. Units 30 V 10 %VDD 400 μA 30 V 1 2 V IDD Supply Current VOUT Output Voltage VSat Output Saturation Voltage @50mA output current ISENS Sens Current Current trigger threshold -50 -60 -70 mA VSENS Current Sens Voltage Over-current trigger threshold voltage (by using an external power switch) 0.18 0.2 0.25 V Short Circuit Peak Current Initial current during a short circuit (<1ms, 50Ω series resistor) -0.5 A Status Output Logical high 2 5.5 Logical low -0.3 0.8 IPeak VStatus fStatus VIN 300 0 V Sink driving capability -8 -10 -12 mA Status Output Frequency epc702 only, duty cycle 50% 1.5 1.7 1.9 Hz Input Logical high 2.0 5.5 Logical low -0.3 0.8 V Hysteresis 0.25 Pull-down resistance 100 200 kΩ 100 mW 150 PDIS Power Dissipation On-chip power dissipation tON Response Time On 1.0 1.2 μs tOFF Response Time Off 0.7 1.0 μs tdel Off-delay Time Time between over-current detection and STATUS/OUT change (default value), refer to section Programming 50.0 60.0 Programmable off-delay values tminOFF Recovery Time Minimum down time of the OUT pin to protect the external transistor (default value), refer to section Programming tSTARTUP Start-up time CL_max External Load Capacitance Load capacitance that can be driven through OUT without triggering over-current @2kOhm load and 5μs delay time Characteristics subject to change without notice 400 500 600 ms 10/20/50/100/200/500/1,000/ 1,500 Short circuit recovery delay tminoff/tdelay = frt (when used without external driver transistor, time factor refer to section “Over-current Reset Sequence”) © 2011 ESPROS Photonics Corporation μs 5/10/20/50/100/200/500/1,000 Programmable values frt 40.0 1,000 VDD ramp > 100 V/ms 200 2 30 μs nF Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 Connection Diagrams GND IN IN Top View 3 6 2 GND 15 1 SENS 8 Top View OUT 7 12 4 11 5 10 6 9 VDD 14 SENS 13 OUT 5 VDD 16 STATUS 1 6-Pin Chip Scale Package (CSP) 6-Pin CSP 16-Pin QFN Pin Name 1 8 GND 2 7 IN 3 5 STATUS 4 16 VDD 5 14 SENS 6 13 OUT n/a 1-4, 6, 9-12, 15 NC 2 3 STATUS 4 16-Pin QFN Package Description Negative power supply pin Input from the controller Output status signal to the controller Positive power supply pin Input either to switch internal/external mode or to measure the voltage drop on an external shunt resistor to detect over-current Output Not connected. Connect these pins to GND. PIN Connections QFN16-VEED1VN4 LST 03.08.2010 Page 1 File: This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . Pin Connection CSP6 epc70x © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 03.08.2010 LST Page 1 3 confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 Functional Description Normal Operation During typical operation the OUT follows the IN as shown in Figure 1. As long as the output current does not exceed the current threshold, OUT is stable ON and STATUS is stable HIGH-Z. The delay from IN to OUT is defined as t ON and tOFF for the rising and the falling edge respectively. IN 0 OUT (without HIGH-Z external Transistor) V OUT (with V external Transistor) Sat Sat VDD toff ton SHORT 0 Vth sens SENS 0 STATUS HIGH-Z epc700 STATUS HIGH-Z epc702 Figure 1: Normal operation Please note that the status of the pin OUT is dependent whether the chip is operated with or without external driver transistor. In the subsequent diagrams, the version with external driver transistor is shown only. Over-current Sequence A short on the load side will lead to an over-current through OUT. If an over-current stays longer than the time t del and text, OUT is turned off as shown in the figure below. At the same time STATUS changes its state to indicate an over-current situation to an external controller. STATUS can also be used to drive directly an indicator LED due to its 10mA driving capability. epc700 delivers a constant on-signal, whereas epc702 has a flashing output. IN 0 OUT 0 SHORT 0 Vth sens SENS 0 text STATUS epc700 tdel tLED HIGH-Z tLED STATUS HIGH-Z epc702 tLED Figure 2: Short circuit detection Note: The parameter t ext used in this paper is described in Figure 7. LST Timing diagram operation mode epc700 05.01.2011 Page 1 File: This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 4 Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 Current Peak at OUT A short current peak when OUT is turned on, typically generated by a capacitive load, could trigger the short-circuit protection logic. However, if the current peak is shorter than t ext plus tdel, the over-current peak will be ignored. Make sure that the energy drawn by such a current peak does not destroy the internal/external output transistor. IN OUT HIGH-Z STATUS Vth sens SENS text <tdel Figure 3: Short over-current pulse, i.e., by switching a capacitive load Over-current Reset Sequence If there is a permanent short circuit at OUT, such short circuit will be detected and OUT is turned off. After a waiting time t minOFF, the device tries to turn on OUT again. If the short circuit is still present, OUT is immediately turned off again. This sequence continues until the short circuit is removed or IN goes to LOW or power is turned off. This mode is called self-healing since the device tries to self-heal the short circuit end to switch back into normal operation. As a consequence in the case of a permanent over-current , short current peaks are issued into the load, respectively short. The time t minOFF has to be set to a value that the internal/external switch cannot be damaged by a too high power dissipation. Without an exter nal switch, the time t minOFF has to be 1,000 times longer than the time t del. IN 0 OUT 0 SHORT 0 SENS 0 Vth sens text tdel tminOFF STATUS HIGH-Z epc700 STATUS HIGH-Z epc702 tLED Figure 4: Over-current reset sequence If one wants to reduce the waiting time in case of a short circuit situation, it can be done by simply taking IN to a low state and then to high again. Please refer to the timing diagram in Figure 5. However, make sure that the maximum power dissipation of the chip or the external switching transistor will never be exceeded above the allowed maximum. IN OUT SHORT Vth sens SENS text Timing diagram not enough HIGH-Z epc700 overcurrent File: tdel LST <tminOFF 01.08.2010 Page 1 STATUS This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . Figure 5: Over-current status reset © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 5 Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 Application Information epc700 and epc702 have two modes of operation, where the SENS pin is used to define the mode. When SENS is tied to VDD, the chip operates as a sink driver capable to sink max. 50mA at 30VDC (refer to Figure 6). The load is connected directly between V L and the OUT pin. If the current through the internal switch exceeds I SENS, the switch is turned off. If the SENS pin is at low level, the OUT pin is driven by a source driver also capable to drive 50mA into an external power transistor. This mode is used if the required output current has to be higher than 50mA, e.g. 1A and the output voltage exceeds 30VDC (refer to Figure 7). The load current is measured by monitoring the voltage drop over a resistor. If the internal switch is used, also the current measurement resistor is located internally (Figure 6). In the case of using an external power transistor as shown in Figure 7, the current measurement resistor RS has to be placed externally. If the voltage drop at RS exceeds the threshold of 200 mV, the output stage is deactivated. The timing diagrams of the signals can be found in section “Functional Description”. The IN signal must be low during power-up (tSTARTUP) for proper function of the chip. The epc70x has a built in pull down resistor, so not external active driving is needed during startup. epc700 or epc702 Using the Internal Switch Figure 6 shows the epc700/702 in the mode using the internal switch. To enable this mode, the SENS pin has to be connected to VDD. Note that the VDD of the chip and VL at the load can have a different value. The values for both VDD and V L need to be between 9.6 and 30V. The factor frt between minimum off-time and delay-time must be maintained in order not to damage the chip due to overheating. This factor has to be higher than 1,000. In the worst case scenario a peak current of approx. 0.5A is flowing from VL at 30V into the chip with a tDel set at 50μs if a short-circuit occurs. If the recovery time tminoff in this case is smaller then 50ms, the average power dissipation would exceed the safe operation condition and the device will get damaged. The diode D1 is to protect the internal switch against voltage surges when inductive loads are turned off. DL VDD epc700 epc702 RL R1≥50Ω OUT IN STATUS SENSE GND R1 is to protect the internal switch in case of a short circuit on the load when a very low impedance power supply is used. The voltage VL can be higher than VDD in this configuration. However, it must not be above the maximum value of 'Supply Voltage' stated in the table Electrical Characteristics. VL≤VDD max VDD GND Figure 6: epc700 or epc702 using the internal switch to drive a load of up to 50mA /30VDC epc700 or epc702 Using an External Switching Transistor Figure 7 shows the operation mode using an external switch T 1 in order to extend the VL≤VDD amax VDDcapability. In this example, output current/voltage drive bipolar transistor is used, whereas the base current is limited by the resistor R B. The maximum base current is 50mA. In order not to damage the chip, the user has to select the resistor R B such that chip does not need to drive more than 50mA. OtherD possible switches are a NPN BJT RL VDD L or an n-channel MOSFET. VL VDD epc700 epc702 The load is turned on and off by setting the pin IN to high respectively to low level. R1≥50Ω When the load is turned on, the OUT load current flows from V L through the resistor RS and through the transistor T1 to GND. This current creates a voltage drop over R S. The resulting voltage isINapplied to pin SENS, which measures the voltage drop. If it exceeds the threshold of an internal comparator, set to 200mV, the output is turned off STATUS SENSE after the given delay time t del. DL VDD epc700 epc702 OUT R1 RL T1 IN STATUS GND GND RT SENSE CT RSENSE If the delay time should be extended to a value above the possible settings of t del (refer to Table 3), an RC network can added, designated as RT and CT in Figure 7. The additional time delay text GND can be calculated approx. as RT x CT. However, the File: timeUnbenannt This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any GND varies according to the current through R S. This design concept is especially useful, Figure 7: epc700 or epc702 operation mode when a large capacitor in the load path needs to be charged. The additional delay in using an external switching transistor. the over-current detection helps in such a situation. In case of a short-circuit in the load the turn-off delay Note that the VDD of the chip and VL on the load are different in most of the applicacan be extended by an external RC network. tions. The value of VDD must be between 9.6 and 30V. V L instead, can be on a level This network adds text to the internal delay tdel. which is appropriate to the external switching transistor. The diode D 1 is to protect the transistor T 1 against voltage surges when inductive loads are turned off. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 6 Datasheet epc700_702 - V2.2 www.espros.ch Dieter Kägi 25.05.2011 Page 1 epc700/epc702 Programming The time delay (tdel), until the output is turned off after the detection of an over-current condition can be programmed in order to adapt the timing to specific requirements, i.e., if a capacitive load has to be operated or an external transistor allows other values. The default value is 50μs which allows to charge a load capacitor of approx. 100 – 500nF without an external power transistor, dependent on the source impe dance, the load impedance and the voltage V L. The time until the output is turned on again after a short circuit can be programmed as well (t minOFF). This “self-healing” mechanism is very useful because no operator interaction is necessary after a short circuit to enable normal function once the short circuit has been eliminated. The default value is 500ms which means that the device tries to turn the output on after 0.5s waiting time in the short circuit mode. This waiting time is recommended as long as t del is not changed. If t del has been changed, the parameter t minOFF shall be changed accordingly in order to respect parameter f rt. The user has to ensure that the maximum operation conditions never exceed in order to avoid damage of the device. It is to note that the parameters programmed are stored in a non-volatile random access memory. Thus, the parameters can be lost after a power down for longer than 5ms (data retention time @ 25ºC: min. 100ms). The corresponding requirements for safety applications have to take in consideration. Parameters can be changed as many times as necessary and even under operation to change the behavior of an output. During power-on, the default values are restored automatically. Programming Interface The interface to store changed parameters are the pins IN and STATUS. IN is the chip select pin and STATUS, which is under normal opera tion an output, is used as an input pin. As long as the IN pin is at low state, parameters can be stored through the STATUS pin. Since IN is low during the programming of new parameters, OUT is low as well. The digital input high threshold is typically at 2.2V, thus a 5V compatible communication. Please note that the voltage at STATUS should not exceed 5.5V. Single Wire Communication Interface The epc70x is based on a single wire communication interface by using the STATUS pin. Programming is done by a 21-Bit Manchester code according to IEEE 802.4. Clock (internal) Data 1 0 0 1 1 0 0 Manchester code Figure 8: Manchester encoding sample Figure 8 shows such a sample Manchester encoded data-stream. The clock and the corresponding data is used to generate the Manchester data-stream. Each positive clock-edge in the Manchester encoded data (indicated with the up-arrow) corresponds to a 1 and each negative clock-edge (indicated with the down-arrow) corresponds to a 0. Data Clock Frequency Range The communication frequency range has to be according to Table 1. Data clock minimal typical maximum 396kHz 450kHz 540kHz Table 1: Frequency range for programming Configuration Bit Stream for changing the delay time In order to guarantee a reliable communication with the Manchester encoded bit stream on STATUS, some additional bits have been added to the configuration bits. Table 2 shows the digital pattern for the delay time configuration and the recovery time configuration. Bit # 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 tDel Value 1 0 1 1 0 0 0 0 0 1 1 1 1 0 D1 TminOFF Value 1 0 1 1 0 0 0 0 1 0 0 0 1 0 O1 15 16 17 18 19 20 D2 D3 1 d1 d2 d3 O2 O3 1 o1 o2 o3 Table 2: Configuration of the delay and the recovery time © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 7 Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 The delay time is set with d 1, d2, and d3. The bits D1, D2, and D3 are the inverted values of d 1, d2, and d3. Table 3 shows the value mapping table for the 8 different delay times. delay [µs] D1 D2 D3 d1 d2 d3 50 1 1 1 0 0 0 5 1 1 0 0 0 1 10 1 0 1 0 1 0 20 1 0 0 0 1 1 100 0 1 1 1 0 0 200 0 1 0 1 0 1 500 0 0 1 1 1 0 1000 0 0 0 1 1 1 Comments Default value Table 3: Delay-time programming table An un-configured chip is applying a default delay time of 50µs corresponding to [d 1, d2, d3] = 000 and [D 1, D2, D3] = 111. The recovery time is set to o 1, o2, and o 3, resp. O1, O2, and O 3 which are the inverted values of o 1, o2, and o 3. Table 4 shows the value mapping table for the 8 different recovery time delay values. Recovery time [ms] O1 O2 O3 o1 o2 o3 Comments 500 1 1 1 0 0 0 Default value 10 1 1 0 0 0 1 20 1 0 1 0 1 0 50 1 0 0 0 1 1 100 0 1 1 1 0 0 200 0 1 0 1 0 1 1000 0 0 1 1 1 0 1500 0 0 0 1 1 1 Table 4: Recovery time programming table An un-configured chip is applying the default recovery time of 500ms corresponding to [o 1, o2, o3] = 000 and [O 1, O2, O3] = 111. Programming Example An example for changing the delay time to 100µs is shown in the following diagram: Clock Data 1 0 1 1 0 0 0 0 0 4 5 7 8 1 1 1 1 0 0 1 1 1 1 0 0 Manchester Code Bit # 0 1 2 3 6 9 10 11 12 13 14 15 16 17 18 19 20 Figure 9: Programming example to set tdel to 100μs © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 8 Datasheet epc700_702 - V2.2 www.espros.ch Layout Information (all measures in mm, CSP-6 Package ) Designed Approved Scale Page Part Name <Name> 26.02.2009 <Name> <Data> M 1:1 DIN A4 1 Part No. <x000 000> <Partname> This document is confidential and protected by law and international trades. It must not be show n to any third party nor be copied in any form without our written perm . ission epc700/epc702 File: Unbenannt Layout Recommendations ∅ 0.12 0.43 0.43 ∅0.3 0.56 1.0 +0.0/-0.1 0.56 ≤0.1524 1.56 Mechanical Dimensions Pin 1 Solder balls Sn7.5Ag2.5 0.43 0.15 ±0.01 0.3 1.4 +0.0/-0.1 0.43 1.86 no solder mask inside this area Bottom View 0.25 Top view 1.9 2.9 - 3.1 QFN-16 Package File: Mechanical dimension CSP6 0.02 0.9 Mechanical dimension QFN16 Package 0.1-0.2 0.5 2.9 - 3.1 File: Characteristics subject to change without notice 0.3 1.9 LST 08.02.2012 LST This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . © 2011 ESPROS Photonics Corporation 0.25 9 Page 1 25.05.2011 Page 1 Datasheet epc700_702 - V2.2 www.espros.ch This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . epc700/epc702 Reflow Solder Profile For infrared or conventional soldering the solder profile has to follow the recommendations of IPC/JEDEC J-STD-020C (min. revision C) for Pb-free assembly for both types of packages. The peak soldering t emperature (TL) should not exceed +260°C for a maximum of 4 sec. Packaging Information (all measures in mm) Tape & Reel Information The devices are packaged into embossed tapes for automatic placement systems. The tape is wound on 178 mm (7 inch) or 330 mm (13 inch) reels and individually packaged for shipment. General tape-and-reel specification data are available in a separate data sheet and indicate the tape sizes for various package types. Further tape-and-reel specifications can be found in the Electronic Industries Association (EIA) standard 481-1, 481-2, 481-3. CSP6 Tape QFN16 Tape Pin 1 12 8 Pin 1 2 8 8 CSP6 Tapeare no empty cavities QFN16 Tape epc does not guarantee that there the pick-and-place machine Pin should check the presence of a chip Pin 1in the tape. Thus, 1 during picking. 12 Ordering Information Part Number Package RoHS compliance Packaging Method epc700-CSP6 4 CSP6 Yes Reel epc700-QFN16 QFN16 Yes Reel CSP6 Yes QFN16 Yes Reel CSP6 Yes Reel QFN16 Yes Reel CSP6 Yes Reel QFN16 Yes Reel epc701-CSP6 epc701-QFN16 epc702-CSP6 epc702-QFN16 epc703-CSP6 epc703-QFN16 © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 10 8 Reel Datasheet epc700_702 - V2.2 www.espros.ch epc700/epc702 IMPORTANT NOTICE ESPROS Photonics AG and its subsidiaries (epc) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to epc’s terms and conditions of sale supplied at the time of order acknowledgment. epc warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with epc’s standard war ranty. Testing and other quality control techniques are used to the extent epc deems necessary to support this warranty. Except where man dated by government requirements, testing of all parameters of each product is not necessarily performed. epc assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using epc components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. epc does not warrant or represent that any license, either express or implied, is granted under any epc patent right, copyright, mask work right, or other epc intellectual property right relating to any combination, machine, or process in which epc products or services are used. Information published by epc regarding third-party products or services does not constitute a license from epc to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from epc under the patents or other intellectual property of epc. Resale of epc products or services with statements different from or beyond the parameters stated by epc for that product or service voids all express and any implied warranties for the associated epc product or service. epc is not responsible or liable for any such statements. epc products are not authorized for use in safety-critical applications (such as life support) where a failure of the epc product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of epc products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by epc. Further, Buyers must fully indemnify epc and its representatives against any damages arising out of the use of epc products in such safetycritical applications. epc products are neither designed nor intended for use in military/aerospace applications or environments unless the epc products are spe cifically designated by epc as military-grade or "enhanced plastic." Only products designated by epc as military-grade meet military specifications. Buyers acknowledge and agree that any such use of epc products which epc has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. epc products are neither designed nor intended for use in automotive applications or environments unless the specific epc products are desig nated by epc as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, epc will not be responsible for any failure to meet such requirements. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 11 Datasheet epc700_702 - V2.2 www.espros.ch