LINER LT1336 Half-bridge n-channel power mosfet driver with boost regulator Datasheet

LT1336
Half-Bridge N-Channel
Power MOSFET Driver
with Boost Regulator
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DESCRIPTION
FEATURES
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■
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■
■
■
■
■
■
■
Floating Top Driver Switches Up to 60V
Internal Boost Regulator for DC Operation
Drives Gate of Top N-Channel MOSFET
above Supply
180ns Transition Times Driving 10,000pF
Adaptive Nonoverlapping Gate Drives Prevent
Shoot-Through
Top Drive Maintained at High Duty Cycles
TTL/CMOS Input Levels
Undervoltage Lockout with Hysteresis
Operates at Supply Voltages from 10V to 15V
Separate Top and Bottom Drive Pins
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APPLICATIONS
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PWM of High Current Inductive Loads
Half-Bridge and Full-Bridge Motor Control
Synchronous Step-Down Switching Regulators
3-Phase Brushless Motor Drive
High Current Transducer Drivers
Class D Power Amplifiers
The internal logic prevents the inputs from turning on the
power MOSFETs in a half-bridge at the same time. Its
unique adaptive protection against shoot-through currents eliminates all matching requirements for the two
MOSFETs. This greatly eases the design of high efficiency
motor control and switching regulator systems.
During low supply or start-up conditions, the undervoltage
lockout actively pulls the driver outputs low to prevent the
power MOSFETs from being partially turned on. The 0.5V
hysteresis allows reliable operation even with slowly varying supplies.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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The LT ®1336 is a cost effective half-bridge N-channel
power MOSFET driver. The floating driver can drive the
topside N-channel power MOSFETs operating off a high
voltage (HV) rail of up to 60V (absolute maximum). In
PWM operation an on-chip switching regulator maintains
charge in the bootstrap capacitor even when approaching
and operating at 100% duty cycle.
TYPICAL APPLICATION
12V
1N4148
200µH*
RSENSE
2Ω
1/4W
+
1
ISENSE
2
SV +
10
PV +
10µF
25V
5
3
4
PWM
0Hz TO 100kHz
SWITCH
BOOST
16
13
TGATEDR
LT1336
12
TGATEFB
11
TSOURCE
UVOUT
9
BGATEDR
INTOP
8
BGATEFB
INBOTTOM
SGND
6
SWGND
PGND
15
7
1N4148
14
HV = 40V MAX**
+
IRFZ44
+
CBOOST
1µF
1000µF
100V
INTOP INBOTTOM TGATEDR
IRFZ44
L
L
H
H
L
H
L
H
BGATEDR
L
L
H
L
*SUMIDA RCR-664D-221KC
**FOR HV > 40V SEE “DERIVING THE FLOATING
SUPPLY WITH THE FLYBACK TOPOLOGY” IN
APPLICATIONS INFORMATION SECTION
L
H
L
L
1336 TA01
1
LT1336
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Supply Voltage (Pins 2, 10) .................................... 20V
Boost Voltage ......................................................... 75V
Peak Output Currents (< 10µs) .............................. 1.5A
Input Pin Voltages .......................... – 0.3V to V + + 0.3V
Top Source Voltage ..................................... – 5V to 60V
Boost-to-Source Voltage
(VBOOST – VTSOURCE) ............................ – 0.3V to 20V
Switch Voltage (Pin 16) ............................ – 0.3V to 60V
Operating Temperature Range
Commercial ............................................ 0°C to 70°C
Industrial ........................................... – 40°C to 85°C
Junction Temperature (Note 1)............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
TOP VIEW
ISENSE
1
16 SWITCH
SV +
2
15 SWGND
INTOP
3
14 BOOST
INBOTTOM
4
13 TGATEDR
UVOUT
5
12 TGATEFB
SGND
6
11 TSOURCE
PGND
7
10 PV +
BGATEFB
8
9
N PACKAGE
16-LEAD PDIP
ORDER PART
NUMBER
LT1336CN
LT1336CS
LT1336IN
LT1336IS
BGATEDR
S PACKAGE
16-LEAD PLASTIC SO NARROW
TJMAX = 125°C, θJA = 70°C/ W (N)
TJMAX = 125°C, θJA = 110°C/ W (S)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS Test Circuit, TA = 25°C, V + = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16
open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER
DC Supply Current (Note 2)
IS
CONDITIONS
V + = 15V, VINTOP = 0.8V, VINBOTTOM = 2V
V + = 15V, VINTOP = 2V, VINBOTTOM = 0.8V
V + = 15V, VINTOP = 0.8V, VINBOTTOM = 0.8V
V + = 15V, VTSOURCE = 40V, VINTOP = VINBOTTOM =
0.8V (Note 3)
IBOOST
Boost Current (Note 2)
V + = 15V, VTSOURCE = 60V, VBOOST = 75V,
VINTOP = VINBOTTOM = 0.8V
VIL
Input Logic Low
●
VIH
Input Logic High
●
IIN
Input Current
V +UVH
V +UVL
V + Undervoltage Start-Up Threshold
8.4
8.9
9.4
V
V + Undervoltage Shutdown Threshold
7.8
8.3
8.8
V
VBUVH
VBOOST Undervoltage Start-Up Threshold
VTSOURCE = 60V, VBOOST – VTSOURCE
8.8
9.3
9.8
V
VBUVL
VBOOST Undervoltage Shutdown Threshold
VTSOURCE = 60V, VBOOST – VTSOURCE
8.2
8.7
9.2
V
Undervoltage Output Leakage
V + = 15V
0.1
5
µA
VUVOUT
Undervoltage Output Saturation
V + = 7.5V, IUVOUT
0.2
0.4
V
VOH
Top Gate ON Voltage
VINTOP = 2V, VINBOTTOM = 0.8V,
VTGATE DR – VTSOURCE
●
11
11.3
12
V
Bottom Gate ON Voltage
VINTOP = 0.8V, VINBOTTOM = 2V, VBGATE DR
●
11
11.3
12
V
Top Gate OFF Voltage
VINTOP = 0.8V, VINBOTTOM = 2V,
VTGATE DR – VTSOURCE
●
0.4
0.7
V
Bottom Gate OFF Voltage
VINTOP = 2V, VINBOTTOM = 0.8V, VBGATE DR
●
0.4
0.7
V
IUVOUT
VOL
2
VINTOP = VINBOTTOM = 4V
MIN
12
12
12
TYP
15
14
15
30
MAX
20
20
20
40
3
5
7
1.4
0.8
2
7
●
●
= 2.5mA
1.7
●
UNITS
mA
mA
mA
mA
mA
V
V
25
µA
LT1336
ELECTRICAL CHARACTERISTICS Test Circuit, TA = 25°C, V + = VBOOST = 12V, VTSOURCE = 0V, and Pins 1, 16
open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIS
ISENSE Peak Current Threshold
VTSOURCE = 60V, VBOOST = 68V, V + – VISENSE
310
480
650
mV
VISHYS
ISENSE Hysteresis
VTSOURCE = 60V, VBOOST = 68V
VSAT
Switch Saturation Voltage
VISENSE = V +, VBOOST – VTSOURCE = 9V,
ISW = 100mA
VBOUT
VBOOST Regulated Output
VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V,
IBOOST = 10mA, VBOOST – VTSOURCE
tr
Top Gate Rise Time
VINTOP (+) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 4)
Bottom Gate Rise Time
tf
t D1
t D2
t D3
t D4
55
85
mV
0.85
1.2
V
10.6
11.2
V
●
130
200
ns
VINBOTTOM (+) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 4)
●
90
200
ns
Top Gate Fall Time
VINTOP (–) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 4)
●
60
140
ns
Bottom Gate Fall Time
VINBOTTOM (–) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 4)
●
60
140
ns
Top Gate Turn-On Delay
VINTOP (+) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 4)
●
250
500
ns
Bottom Gate Turn-On Delay
VINBOTTOM (+) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 4)
●
200
400
ns
Top Gate Turn-Off Delay
VINTOP (–) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 4)
●
300
600
ns
Bottom Gate Turn-Off Delay
VINBOTTOM (–) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 4)
●
200
400
ns
Top Gate Lockout Delay
VINBOTTOM (+) Transition, VINTOP = 2V,
Measured at VTGATE DR – VTSOURCE (Note 4)
●
300
600
ns
Bottom Gate Lockout Delay
VINTOP (+) Transition, VINBOTTOM = 2V,
Measured at VBGATE DR (Note 4)
●
250
500
ns
Top Gate Release Delay
VINBOTTOM (–) Transition, VINTOP = 2V,
Measured at VTGATE DR – VTSOURCE (Note 4)
●
250
500
ns
Bottom Gate Release Delay
VINTOP (–) Transition, VINBOTTOM = 2V,
Measured at VBGATE DR (Note 4)
●
200
400
ns
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LT1336CN/LT1336IN: TJ = TA + (PD)(70°C/ W)
LT1336CS/LT1336IS: TJ = TA + (PD)(110°C/ W)
Note 2: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Typical Performance
Characteristics and Applications Information sections.
25
●
10
Note 3: Pins 1 and 16 connected to each end of the inductor. Booster is
free running.
Note 4: See Timing Diagram. Gate rise times are measured from 2V to 10V
and fall times are measured from 10V to 2V. Delay times are measured
from the input transition to when the gate voltage has risen to 2V or
decreased to 10V.
3
LT1336
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TYPICAL PERFORMANCE CHARACTERISTICS
DC Supply Current
vs Supply Voltage
DC Supply Current
vs Temperature
18
VTSOURCE = 0V
18
17
BOTH INPUTS
HIGH OR LOW
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
20
16
14
12
VINTOP = HIGH
VINBOTTOM = LOW
10
VINTOP = LOW
VINBOTTOM = HIGH
8
16
BOTH INPUTS
HIGH OR LOW
15
14
13
VINTOP = HIGH
VINBOTTOM = LOW
12
11
4
6
8
10 12 14 16
SUPPLY VOLTAGE (V)
18
9
–50
20
0
25
50
75
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
0
V + = 10V
5
10 15 20 25 30
TOP SOURCE VOLTAGE (V)
40
Undervoltage Lockout (V +)
13
12
11
40
CGATE = 10000pF
30
CGATE = 3000pF
20
10
START-UP THRESHOLD
9
8
SHUTDOWN THRESHOLD
7
6
CGATE = 1000pF
10
10
35
1336 G18
50% DUTY CYCLE
V+ = 12V
50
30
VINTOP = HIGH
VINBOTTOM = LOW
16
125
100
SUPPLY VOLTAGE (V)
50% DUTY CYCLE
CGATE = 3000pF
20
19
10
–25
60
60
V + = 15V
22
DC + Dynamic Supply Current
vs Input Frequency
V + = 20V
BOTH INPUTS
HIGH OR LOW
25
1336 G02
DC + Dynamic Supply Current
vs Input Frequency
40
VINTOP = LOW
VINBOTTOM = HIGH
28
13
1336 G01
50
V += 12V
31
VINTOP = LOW
VINBOTTOM = HIGH
10
6
34
V + = 12V
VTSOURCE = 0V
SUPPLY CURRENT (mA)
22
DC Supply Current
vs Top Source Voltage
5
0
1
10
100
INPUT FREQUENCY (kHz)
1000
1
10
100
INPUT FREQUENCY (kHz)
INPUT THRESHOLD VOLTAGE (V)
VBOOST – VTSOURCE VOLTAGE (V)
START-UP THRESHOLD
9
SHUTDOWN THRESHOLD
8
7
6
12
1.6
VLOW
1.4
1.2
11
10
9
8
7
6
1.0
5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1336 G06
4
V + = 12V
VIN = 4V
13
VHIGH
1.8
5
4
–50
125
14
V + = 12V
VTSOURCE = 60V
100
Top or Bottom Input Pin Current
vs Temperature
2.0
13
10
0
25
50
75
TEMPERATURE (°C)
1336 G05
Input Threshold Voltage
vs Temperature
Undervoltage Lockout (VBOOST)
11
–25
1336 G04
1336 G03
12
4
–50
1000
INPUT CURRENT (µA)
0
0.8
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1336 G07
4
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
1336 G08
LT1336
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TYPICAL PERFORMANCE CHARACTERISTICS
5.0
210
230
V + = 12V
BOTTOM GATE RISE TIME (ns)
210
4.0
3.5
3.0
2.5
2.0
1.5
1.0
190
CLOAD = 10000pF
170
150
130
110
CLOAD = 3000pF
90
70
0.5
4
5
6
10
8
7
9
INPUT VOLTAGE (V)
11
12
–25
0
25
50
75
TEMPERATURE (°C)
100
1336 G09
220
200
180
CLOAD = 3000pF
140
120
0
25
50
75
TEMPERATURE (°C)
100
CLOAD = 10000pF
120
100
80
CLOAD = 3000pF
60
125
0
25
50
75
TOP DRIVER
250
200
BOTTOM DRIVER
100
–50
125
–25
BOTTOM DRIVER
400
V + = 12V
CLOAD = 3000pF
350
TOP DRIVER
300
BOTTOM DRIVER
250
200
100
125
1336 G15
100
–50
V + = 12V
CLOAD = 3000pF
300
TOP DRIVER
250
200
BOTTOM DRIVER
150
150
150
125
Release Delay Time
vs Temperature
RELEASE DELAY TIME (ns)
350
100
1336 G14
Lockout Delay Time
vs Temperature
TOP DRIVER
0
25
50
75
TEMPERATURE (°C)
1336 G13
LOCKOUT DELAY TIME (ns)
TURN-OFF DELAY TIME (ns)
100
400
0
25
50
75
TEMPERATURE (°C)
300
TEMPERATURE (°C)
V + = 12V
CLOAD = 3000pF
–25
125
CLOAD = 1000pF
200
100
–50
100
150
20
–50 –25
400
250
0
25
50
75
TEMPERATURE (°C)
V + = 12V
CLOAD = 3000pF
350
140
Turn-Off Delay Time
vs Temperature
300
–25
400
1336 G12
350
CLOAD = 3000pF
CLOAD = 1000pF
Turn-On Delay Time
vs Temperature
40
CLOAD = 1000pF
–25
70
1336 G11
TURN-ON DELAY TIME (ns)
TOP GATE FALL TIME (ns)
TOP GATE RISE TIME (ns)
240
80
–50
90
V + = 12V
160
CLOAD = 10000pF
100
110
30
–50
125
180
V + = 12V
160
130
Top Gate Fall Time
vs Temperature
300
260
CLOAD = 10000pF
150
1336 G10
Top Gate Rise Time
vs Temperature
280
170
50
CLOAD = 1000pF
50
–50
0
V + = 12V
190
BOTTOM GATE FALL TIME (ns)
V + = 12V
4.5
INPUT CURRENT (mA)
Bottom Gate Fall Time
vs Temperature
Bottom Gate Rise Time
vs Temperature
Top or Bottom Input Pin Current
vs Input Voltage
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1336 G16
100
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1336 G17
5
LT1336
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TYPICAL PERFORMANCE CHARACTERISTICS
ISENSE Voltage Threshold
vs Temperature
12.0
0.52
11.5
0.50
11.0
ISENSE VOLTAGE THRESHOLD (mV)
VBOOST REGULATED OUTPUT (V)
VBOOST Regulated Output
vs Temperature
VBOOST – VTSOURCE
10.5
10.0
9.5
9.0
V + = 12V
VTSOURCE = 40V
ILOAD = 10mA
8.5
8.0
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
HIGH VOLTAGE THRESHOLD
0.48
0.46
0.44
LOW VOLTAGE THRESHOLD
0.42
0.40
V + = 12V
VBOOST = 68V
VTSOURCE = 60V
0.38
0.36
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
1336 G19
1336 G20
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PIN FUNCTIONS
ISENSE (Pin 1): Boost Regulator ISENSE Comparator Input.
An RSENSE placed between Pin 1 and V + sets the maximum
peak current. Pin 1 can be left open if the boost regulator
is not used.
BGATEDR (Pin 9): Bottom Gate Drive. The high current
drive point for the bottom MOSFET. When a gate resistor
is used it is inserted between Pin 9 and the gate of the
MOSFET.
SV+ (Pin 2): Main Signal Supply. Must be closely decoupled
to the signal ground Pin 6.
PV + (Pin 10): Bottom Driver Supply. Must be connected
to the same supply as Pin 2.
INTOP (Pin 3): Top Driver Input. Pin 3 is disabled when Pin
4 is high. A 3k input resistor followed by a 5V internal
clamp prevents saturation of the input transistors.
TSOURCE (Pin 11): Top Driver Return. Connects to the top
MOSFET source and the low side of the bootstrap capacitor.
INBOTTOM (Pin 4): Bottom Driver Input. Pin 4 is disabled
when Pin 3 is high. A 3k input resistor followed by a 5V
internal clamp prevents saturation of the input transistors.
TGATEFB (Pin 12): Top Gate Feedback. Must connect
directly to the top power MOSFET gate. The bottom
MOSFET turn-on is inhibited until VTGATE FB – VTSOURCE
has discharged to below 2.9V.
UVOUT (Pin 5): Undervoltage Output. Open collector NPN
output which turns on when V + drops below the undervoltage threshold.
TGATEDR (Pin 13): Top Gate Drive. The high current drive
point for the top MOSFET. When a gate resistor is used it
is inserted between Pin 13 and the gate of the MOSFET.
SGND (Pin 6): Small-Signal Ground. Must be routed
separately from other grounds to the system ground.
BOOST (Pin 14): Top Driver Supply. Connects to the high
side of the bootstrap capacitor.
PGND (Pin 7): Bottom Driver Power Ground. Connects to
source of bottom N-channel MOSFET.
SWGND (Pin 15): Boost Regulator Ground. Must be routed
separately from the other grounds to the system ground.
Pin 15 can be left open if the boost regulator is not used.
BGATEFB (Pin 8): Bottom Gate Feedback. Must connect
directly to the bottom power MOSFET gate. The top
MOSFET turn-on is inhibited until Pin 8 has discharged to
below 2.5V.
6
SWITCH (Pin 16): Boost Regulator Switch. Connect this
pin to the inductor/diode of the boost regulator network.
Pin 16 can be left open if the boost regulator is not used.
LT1336
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FUNCTIONAL DIAGRA
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SV +
ISENSE
+
1
16 SWITCH
–
15 SWGND
14 BOOST
6V
480mV
TRIP = 10.6V
TRIP = 8.7V
SV +
2
TOP UV
DETECT
BIAS
13 TGATEDR
–
3k
3
12 TGATEFB
+
INTOP
5V
2.9V
11 TSOURCE
10 PV +
3k
INBOTTOM
4
5V
BOTTOM
UV LOCK
5
SGND
6
PGND
7
BGATEFB
8
–
UVOUT
9
BGATEDR
+
2.5V
1336 FD
7
LT1336
TEST CIRCUIT
1N4148
200µH*
+
LT1336
V
2Ω
1
+
2 SV
+
V/I
1µF
3
3k
4
5
6
7
50Ω
8
50Ω
SWITCH
ISENSE
+
SWGND
INTOP
BOOST
INBOTTOM
TGATEDR
UVOUT
TGATEFB
SGND
TSOURCE
V/I
16
15
14
+
13
V/I
+
12
3000pF
11
+
PV + 10
PGND
BGATEFB
BGATEDR
1µF
V
V
9
+
3000pF
V
* SUMIDA RCR-664D-221KC
1336 TC01
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TI I G DIAGRA
2V
INTOP
0.8V
2V
INBOTTOM
0.8V
tr
12V
t D2
10V
TOP GATE
DRIVER
2V
0V
t D1
tr
12V
BOTTOM
GATE
DRIVER 0V
t D3
tf
t D4
t D2
10V
2V
t D1
8
t D3
tf
t D4
1336 TD
LT1336
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OPERATIO (Refer to Functional Diagram)
The LT1336 incorporates two independent driver channels with separate inputs and outputs. The inputs are
TTL/CMOS compatible; they can withstand input voltages
as high as V +. The 1.4V input threshold is regulated and
has 300mV of hysteresis. Both channels are noninverting
drivers. The internal logic prevents both outputs from
simultaneously turning on under any input conditions.
When both inputs are high both outputs are actively
held low.
An internal switching regulator permits smooth transition
from PWM to DC operation. In PWM operation the bootstrap capacitor is recharged each time Top Source pin
goes low. As the duty cycle approaches 100% the output
pulse width becomes narrower and the time available to
produce an elevated upper MOSFET gate supply becomes
shorter than required. As the voltage across the bootstrap
capacitor drops below 10.6V, an inductor-based switching regulator kicks in and takes over the charging of the
floating supply. This allows the output to smoothly transition to 100% duty cycle.
An undervoltage detection circuit disables both channels
when V + is below the undervoltage trip point. A separate
undervoltage detect block disables the high side channel
when VBOOST – VTSOURCE is below 9V.
The top and bottom gate drivers in the LT1336 each utilize
two gate connections: 1) a Gate Drive pin, which provides
the turn-on and turn-off currents through an optional
series gate resistor, and 2) a Gate Feedback pin which
connects directly to the gate to monitor the gate-to-source
voltage.
Whenever there is an input transition to command the
outputs to change states, the LT1336 follows a logical
sequence to turn off one MOSFET and turn on the other.
First, turn-off is initiated, then VGS is monitored until it has
decreased below the turn-off threshold, and finally the
other gate is turned on.
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APPLICATIONS INFORMATION
Deriving the Floating Supply
In a typical half-bridge driver like the LT1158 or the
LT1160, the floating supply for the topside driver is
provided by a bootstrap capacitor. This capacitor is recharged each time its negative plate goes low in PWM
operation. As the duty cycle approaches 100% the output
pulse width becomes narrower and the time available to
recharge the bootstrap capacitor becomes shorter than
required (1µs to 2µs). For instance, at 100kHz and at 95%
duty cycle the output pulse width is only 0.5µs; clearly this
is insufficient time to recharge the capacitor by
bootstrapping. To get around this problem, the LT1336
incorporates a switching regulator to help recharge the
bootstrap capacitor under such extreme conditions.
The LT1336 provides all the necessary circuitry to construct a boost or flyback switching regulator. This regulator can charge the bootstrap capacitor when it cannot
recharge by bootstrapping. This happens when nearing
100% duty cycle in PWM applications. This is a worstcase condition because the bootstrap capacitor must still
provide for the gate charging current of the high side
MOSFETs. A diode connected between V + and the Boost
pin is still needed to allow conventional bootstrapping of
the bootstrap capacitor when duty cycles are below 90%.
The LT1336’s internal switching regulator can provide
enough charge to the bootstrap capacitor to allow the top
driver to drive several power MOSFETs in parallel at its
maximum operating frequency. The regulated voltage
across VBOOST – VTSOURCE is 10.6V; when this voltage is
exceeded due to normal bootstrap action, the regulator
automatically shuts down.
The switching regulator uses a hysteretic current mode
control. This method of control is simple, inherently stable
and provides peak inductor current limit in every cycle. It
is designed to run at a nominal frequency of around
700kHz which is 7× the maximum PWM operating frequency of the LT1336. Since the hysteretic current mode
control has no internal oscillator, the frequency is determined by external conditions such as supply voltage and
load currents and external components such as inductor
value and current sense resistor value.
9
LT1336
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APPLICATIONS INFORMATION
In applications where switching is always above 10kHz
and the duty cycle never exceeds 90%, Pins 1, 15 and 16
can be left open. The bootstrap capacitor is then charged
by conventional bootstrapping. Only a diode needs to be
connected between V + and the Boost pin. A 0.1µF bootstrap capacitor is usually adequate using this technique
for driving a single MOSFET under 10,000pF. When driving multiple MOSFETs in parallel, if the total gate capacitance exceeds 10,000pF, the bootstrap capacitor should
be increased proportionally above 0.1µF (see Paralleling
MOSFETs).
Deriving the Floating Supply with the Boost Topology
The advantage of using the boost topology is its simplicity.
Only a resistor, a small inductor, a diode and a capacitor
are needed. However, the high voltage rail may not exceed
40V to avoid reaching the collector-base breakdown voltage of the internal NPN switch.
The recommended values for the current sense resistor,
inductor and bootstrap capacitor are 2Ω, 200µH and 1µF
respectively. Using the recommended component values
the boost regulator will run at around 700kHz. To lower the
frequency the inductor value can be increased and to
increase the frequency the inductor value can be decreased. The sense resistor should be at least 1.5Ω to
maintain adequate inductor current limit. The bootstrap
capacitor value should be 1µF or larger to minimize ripple
voltage. An example of a boost regulator is shown in
Figure 1.
D1
1N4148
200µH*
RSENSE
2Ω
1/4W
ISENSE
SV +
SWITCH
D2
1N4148
HV = 40V MAX
SWGND
BOOST
LT1336
+
+
VBOOST
TSOURCE
–
+
CBOOST
1µF
TGATEDR
TGATEFB
* SUMIDA RCR-664D-221KC
Figure 1. Using the Boost Regulator
10
Current drawn from V + is delivered to VBOOST. Some of
this current (~ 1.5mA) flows through the topside driver to
the Top Source pin. This current is typically returned to
ground via the bottom MOSFET or the output load. If the
bottom MOSFET were off and the output load were returned to HV, then the Top Source pin will return the
current to HV through the top MOSFET or the output load.
If the HV supply cannot sink current and no load drawing
greater than 1.5mA is connected to the supply, then a
resistor from HV to ground may be needed to prevent
voltage buildup on the HV supply.
Note that the current drawn from V + and delivered to
VBOOST is significantly higher than the current drawn from
VBOOST as given by:
V

IIN  V +  = IOUT  BOOST
+ 
 
 V 
Deriving the Floating Supply with the Flyback
Topology
S
PV +
The boost regulator works as follows: when switch S is on,
the inductor current ramps up as the magnetic field builds
up. During this interval energy is being stored in the
inductor and no power is transferred to VBOOST. When the
inductor peak current is reached, sensed by the 2Ω
resistor, the switch is turned off. Energy is no longer
transferred to the inductor causing the magnetic field to
collapse. The collapsing magnetic field induces a change
in voltage across the inductor. The Switch pin voltage rises
until diode D2 starts conducting. As the inductor current
ramps down, the lower inductor current threshold is
reached and switch S is turned off, thus completing the
cycle.
1336 F01
For applications where the high voltage rail is greater than
40V, the flyback topology must be used. To configure a
flyback regulator, a resistor, a diode, a small 1:1 turns ratio
transformer and a capacitor are needed. The maximum
voltage across the switch, assuming an ideal transformer,
will be about V + + 11.3V. Leakage inductance in nonideal
transformers will induce an overvoltage spike at the switch
at the instant when it opens. These spikes can be clamped
using a snubbing network or a Zener. Unlike the boost
topology, the current drawn from V + (assuming no loss)
is equal to the current drawn from VBOOST.
LT1336
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APPLICATIONS INFORMATION
Using the components as shown in Figure 2 the flyback
regulator will run at around 800kHz. To lower the frequency CFILTER can be increased and to increase the
frequency CFILTER can be decreased.
D1
1N4148
T1*
1000pF
24V
CFILTER
0.1µF
6.2k
1:1
RSENSE
2Ω
1/4W ISENSE
SWITCH
SV +
S
PV +
SWGND
BOOST
LT1336
+
+
VBOOST
TSOURCE
–
TGATEDR
CBOOST
HV =
1µF
60V MAX
+
TGATEFB
* COILTRONICS CTX100-1P
Since the LT1336 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no
size or matching constraints. Therefore, selection can be
made based on the operating voltage and RDS(ON) requirements. The MOSFET BVDSS should be at least equal to the
LT1336 absolute maximum operating voltage. For a maximum operating HV supply of 60V, the MOSFET BVDSS
should be from 60V to 100V.
The MOSFET RDS(ON) is specified at TJ = 25°C and is
generally chosen based on the operating efficiency required as long as the maximum MOSFET junction temperature is not exceeded. The dissipation in each MOSFET
is given by:
D2
1N4148
40V
1N4148
Power MOSFET Selection
( ) (1+ ∂)R
P = D IDS
2
( )
DS ON
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From
this equation the required RDS(ON) can be derived:
1336 F02
Figure 2. Using the Flyback Regulator
The flyback regulator works as follows: when switch S is
on, the primary current ramps up as the magnetic field
builds up. The magnetic field in the core induces a voltage
on the secondary winding equal to V +. However, no power
is transferred to VBOOST because the rectifier diode D2 is
reverse biased. The energy is stored in the transformer’s
magnetic field. When the primary inductor peak current is
reached, the switch is turned off. Energy is no longer
transferred to the transformer causing the magnetic field
to collapse. The collapsing magnetic field induces a change
in voltage across the transformer’s windings. During this
transition the Switch pin’s voltage flies to 10.6V plus a
diode above V +, the secondary forward biases the rectifier
diode D2 and the transformer’s energy is transferred to
VBOOST. Meanwhile the primary inductor current goes to
zero and the voltage at ISENSE decays to the lower inductor
current threshold with a time constant of (RSENSE)(CFILTER),
thus completing the cycle.
RDS(ON) =
P
( )( )
2
D IDS 1 + ∂
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for each
MOSFET in the form of a normalized RDS(ON) vs temperature curve, but ∂ = 0.007/°C can be used as an approximation for low voltage MOSFETs. Thus, if TA = 85°C and the
available heat sinking has a thermal resistance of 20°C/W,
the MOSFET junction temperature will be 125°C and
∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34 manufactured by
International Rectifier.
Transition losses result from the power dissipated in each
MOSFET during the time it is transitioning from off to on,
or from on to off. These losses are proportional to (f)(HV)2
and vary from insignificant to being a limiting factor on
operating frequency in some high voltage applications.
11
LT1336
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APPLICATIONS INFORMATION
Paralleling MOSFETs
When the above calculations result in a lower RDS(ON) than
is economically feasible with a single MOSFET, two or
more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their RDS(ON)
ratio as long as they are thermally connected (e.g., on a
common heat sink). The LT1336 top and bottom drivers
can each drive five power MOSFETs in parallel with only a
small loss in switching speeds (see Typical Performance
Characteristics). A low value resistor (10Ω to 47Ω) in
series with each individual MOSFET gate may be required
to “decouple” each MOSFET from its neighbors to prevent
high frequency oscillations (consult manufacturer’s recommendations). If gate decoupling resistors are used, the
corresponding Gate Feedback pin can be connected to any
one of the gates as shown in Figure 3.
Driving multiple MOSFETs in parallel may restrict the
operating frequency to prevent overdissipation in the
LT1336 (see the following Gate Charge and Driver
Dissipation).
HV
GATEDR
LT1336
+
R G*
RG*
GATEFB
*OPTIONAL 10Ω
The LT1336 junction temperature can be estimated by
using the equations given in Note 1 of the Electrical
Characteristics. For example, the LT1336IS is limited to
less than 31mA from a 12V supply:
TJ = 85°C + (31mA)(12V)(110°C/W)
= 126°C exceeds absolute maximum
In order to prevent the maximum junction temperature
from being exceeded, the LT1336 supply current must be
verified while driving the full complement of the chosen
MOSFET type at the maximum switching frequency.
Ugly Transient Issues
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle. To
prevent large voltage transients at the top drain, a low ESR
electrolytic capacitor must be used and returned to the
power ground. The capacitor is generally in the range of
25µF to 5000µF and must be physically sized for the RMS
current flowing in the drain to prevent heating and premature failure. In addition, the LT1336 requires a separate
10µF capacitor connected closely between Pins 2 and 6.
1336 F03
Figure 3. Paralleling MOSFETs
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge QG, which includes
the additional charge required by the gate-to-drain swing.
QG is usually specified for VGS = 10V and VDS = 0.8VDS(MAX).
When the supply current is measured in a switching
application, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
 dQ 
 dQ 
ISUPPLY = IDC +  G 
+  G
 dt  TOP  dt  BOTTOM
12
The actual increase in supply current is slightly higher due
to LT1336 switching losses and the fact that the gates are
being charged to more than 10V. Supply Current vs
Switching Frequency is given in the Typical Performance
Characteristics.
The LT1336 top source is internally protected against
transients below ground and above supply. However, the
Gate Drive pins cannot be forced below ground. In most
applications, negative transients coupled from the source
to the gate of the top MOSFET do not cause any problems.
Switching Regulator Applications
The LT1336 is ideal as a synchronous switch driver to
improve the efficiency of step-down (buck) switching
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conducting) are given by:
LT1336
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APPLICATIONS INFORMATION
negative inductor current is returned to HV when the
switch turns back on. However, I2R losses will occur
under these conditions due to the recirculating currents.
V 
Switch On =  OUT  Total Period
 HV 
 HV – VOUT 
Switch Off = 
Total Period
HV 

(
)
(
)
Note that for HV > 2VOUT, the switch is off longer than it is
on, making the diode losses more significant than the
switch. The worst case for the diode is during a short
circuit, when VOUT approaches zero and the diode conducts the short-circuit current almost continuously.
Figure 4 shows the LT1336 used to synchronously drive a
pair of power MOSFETs in a step-down regulator application, where the top MOSFET is the switch and the bottom
MOSFET replaces the Schottky diode. Since both conduction paths have low losses, this approach can result in very
high efficiency (90% to 95%) in most applications. For
regulators under 10A, using low RDS(ON) N-channel
MOSFETs eliminates the need for heat sinks. RGS holds the
top MOSFET off when HV is applied before the 12V supply.
One fundamental difference in the operation of a stepdown regulator with synchronous switching is that it never
becomes discontinuous at light loads. The inductor current doesn’t stop ramping down when it reaches zero, but
actually reverses polarity, resulting in a constant ripple
current independent of load. This does not cause a significant efficiency loss (as might be expected) since the
The LT1336 performs the synchronous MOSFET drive in
a step-down switching regulator. A reference and PWM
are required to complete the regulator. Any voltage mode
or current mode PWM controller may be used but the
LT3526 is particularly well-suited to high power, high
efficiency applications such as the 10A circuit shown in
Figure 6. In higher current regulators a small Schottky
diode across the bottom MOSFET helps to reduce reverserecovery switching losses.
Motor Drive Applications
In applications where rotation is always in the same
direction, a single LT1336 controlling a half-bridge can be
used to drive a DC motor. One end of the motor may be
connected either to supply or to ground. A motor in this
configuration is controlled by its inputs which give three
alternatives: run, free running stop (coasting) and fast
stop (“plugging” braking with the motor shorted by one of
the MOSFETs).
Whenever possible, returning one end of the motor to
ground is preferable. When the motor is returned to supply
and the boost topology is used to charge the bootstrap
capacitor, the return current from the top driver will find its
way to the high voltage rail through the top MOSFET. Since
HV
+
TGATEDR
TGATEFB
LT1336
RGS
RSENSE
OUT A
INTOP
REF PWM
OUT A
TSOURCE
BGATEDR
INBOTTOM
VOUT
+
BGATEFB
1336 F04
Figure 4. Adding Synchronous Switching to a Step-Down Switching Regulator
13
LT1336
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APPLICATIONS INFORMATION
The motor speed in these examples can be controlled by
switching the drivers with pulse width modulated square
waves. This approach is particularly suitable for microcomputers/DSP control loops.
most power supplies cannot sink current, this current can
raise the voltage of the high voltage rail. This can be
avoided by placing a discharge resistor between HV supply and ground to divert the return current to ground as
shown in Figure 5. For a high voltage rail of 40V, a 26k
resistor or smaller should be used, since the top driver will
return about 1.5mA.
D1
1N4148
200µH*
For applications where using a discharge resistor is undesirable, use the flyback regulator topology instead of the
boost regulator topology (see Deriving the Floating Supply
with the Flyback Topology).
To drive a DC motor in both directions, two LT1336s can
be used to drive an H-bridge output stage. In this configuration the motor can be made to run clockwise, counterclockwise, stop rapidly (“plugging” braking) or free run
(coast) to a stop. A very rapid stop may be achieved by
reversing the current, though this requires more careful
design to stop the motor dead. In practice a closed-loop
control system with tachometric feedback is usually
necessary.
+
RSENSE
2Ω
ISENSE
1/4W
+
HV = 40V MAX
SWITCH
V+
BOOST
V+
TGATEDR
10µF
+
VBOOST
+
TGATEFB
LT1336
TSOURCE
RDISCHRG
24k
D2
1N4148
CBOOST
1µF
–
BGATEDR
BGATEFB
*SUMIDA
RCR-664D-221KC
PGND
1336 F05
Figure 5. Driving a Supply Referenced Motor
U
TYPICAL APPLICATIONS
C1
0.1µF
4.7k
0.1µF
+
12V
+
10µF
L1*
200µH
RSENSE
2Ω, 1/4W
LT1336
1µF
18
1
4.7k
360Ω
17
2
2k
0.022µF
0.33µF
+
3
16
4
15
5
1µF
0.1µF
510Ω
SHUTDOWN
LT3526
1N4148
40V
1
2
3
14
1k
1N4148
5k
4
6
13
7
12
8
11
7
9
10
8
27k
1k
5
2N2222
6
ISENSE
SWITCH
SV +
SWGND
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
BOOST
TGATEDR
TGATEFB
TSOURCE
PV
16
+
1N4148
+
1N4148
15
14
13
12
IRFZ44
+
1µF
330k
11
L2**
70µH
5V
IRFZ44
9
RS†
0.007Ω
+
+ 10
BGATEDR
2200µF EA
LOW ESR
IRFZ44
MBR340
5400µF
LOW
ESR
2.2nF
f = 25kHz
* SUMIDA RCR-664D-221KC
** MAGNETICS CORE #55585-A2 30 TURNS 14GA MAGNET WIRE
† DALE TYPE LVR-3 ULTRONIX RCS01
Figure 6. 90% Efficiency, 40V to 5V, 10A, Low Dropout Voltage Mode Switching Regulator
14
1336 F06
LT1336
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TYPICAL APPLICATIONS
100µF
10k
+
IN
150k
12V
0.0033µF
1k
+
60V MAX
10µF
1N4148
5V
0.1µF
0.1µF
1
1k
1
8
1
8
2
2
7
2
7
3
6
3
6
4
5
4
LT1015
3
100k
1k
4
TC4428
5
5
6
1k
1
2
+
1µF
3
0.1µF
LT1016
4
8
7
7
8
5
47µF
10k
+
47µF
10k
95k
14
13
3
12
4
LT1058
10
6
9
7
8
200k
INTOP
BOOST
INBOTTOM
UVOUT
TGATEDR
TGATEFB
SGND
TSOURCE
PGND
PV +
BGATEFB
BGATEDR
15
14
13
12
IRFZ44
0.1µF
330k
11
L*
158µH
10
9
+
10µF
IRFZ44
10k
4
–12V
150k
5
6
0.1µF
1000µF
+
LT1336
3
11
5
SWGND
+
16
1N4148
10k
2
SV +
10µF
2
0.0033µF
+
SWITCH
+
1
1
ISENSE
6
10k
1k
1000µF
LT1336
7
8
ISENSE
SWITCH
SV +
SWGND
INTOP
INBOTTOM
UVOUT
BOOST
TGATEDR
TGATEFB
SGND
TSOURCE
PGND
PV +
BGATEFB
BGATEDR
16
15
LOAD
14
13
12
IRFZ44
0.1µF
11
330k
L*
158µH
+
10
9
10µF
IRFZ44
+
10k
200k
47µF
+
47µF
10k
95k
* Kool Mµ® CORE #77548-A7
35 TURNS 14GA MAGNET WIRE
fCARRIER = 100kHz
1336 F07
Figure 7. 200W Class D, 10Hz to 1kHz Amplifier
Kool Mµ is a registered trademark of Magnetics, Inc.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1336
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TYPICAL APPLICATIONS
12V
1N4148
+
10µF
1
+
2k
2.2µF
10k
+
1µF
18k
6800pF
* HURRICANE LAB
HL-KM147U
** DALE TYPE LVR-3
ULTRONIX RCS01
100pF
0.1µF
25k
500k
16
2
15
3
14
4
13
LT1846
5
LT1336
1
2
1N4148
3
1k
4
12
5
6
11
6
7
10
8
9
7
5k
Q1
10k
4700pF
18k
1N4148
2200µF EA
LOW ESR
8
ISENSE
SWITCH
SV +
SWGND
BOOST
INTOP
TGATEDR
INBOTTOM
TGATEFB
UVOUT
SGND
TSOURCE
PGND
PV +
BGATEDR
BGATEFB
40V
16
+
+
15
14
13
IRFZ34
0.1µF
12
330k
L*
47µH
11
RS**
0.007Ω
5V
+
10
IRFZ44
5400µF
LOW ESR
IRFZ44
9
MBR340
1k
f = 40kHz
1136 F08
Figure 8. 90% Efficiency, 40V to 5V, 10A, Low Dropout Current Mode Switching Regulator
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
N Package
16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
0.015
(0.381)
MIN
+0.025
0.325 –0.015
8.255
+0.635
–0.381
0.770*
(19.558)
MAX
0.045 – 0.065
(1.143 – 1.651)
)
0.065
(1.651)
TYP
0.125
(3.175)
MIN
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
0.255 ± 0.015*
(6.477 ± 0.381)
0.018 ± 0.003
(0.457 ± 0.076)
N16 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.386 – 0.394*
(9.804 – 10.008)
(LTC DWG # 05-08-1610)
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
16
15
14
13
12
11
10
1
2
3
4
5
6
7
9
0° – 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.228 – 0.244
(5.791 – 6.197)
0.050
(1.270)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
8
S16 0695
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1158
Half-Bridge N-Channel Power MOSFET Driver
Single Input, Continuous Current Protection and Internal Charge Pump for
DC Operation
LT1160
Half-Bridge N-Channel Power MOSFET Driver
One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection
LT1162
Full-Bridge N-Channel Power MOSFET Driver
One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection
16
Linear Technology Corporation
LT/GP 0796 7K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1996