AD AD8638ARJZ-REEL7 16 v auto-zero, rail-to-rail output operational amplifier Datasheet

16 V Auto-Zero, Rail-to-Rail Output
Operational Amplifiers
AD8638/AD8639
PIN CONFIGURATIONS
Low offset voltage: 9 μV maximum
Offset drift: 0.04 μV/°C maximum
Rail-to-rail output swing
5 V to 16 V single-supply or ±2.5 V to ±8 V dual-supply
operation
High gain: 136 dB typical
High CMRR: 133 dB typical
High PSRR: 143 dB typical
Very low input bias current: 40 pA maximum
Low supply current: 1.3 mA maximum
OUT 1
V– 2
V+
4
–IN
Figure 1. 5-Lead SOT-23 (RJ-5)
NC 1
–IN 2
AD8638
8
NC
7
V+
6 OUT
TOP VIEW
V– 4 (Not to Scale) 5 NC
NC = NO CONNECT
06895-002
+IN 3
OUT A 1
–IN A 2
+IN A 3
AD8639
TOP VIEW
(Not to Scale)
V– 4
8
V+
7
OUT B
6
–IN B
5
+IN B
06895-203
Figure 2. 8-Lead SOIC_N (R-8)
Pressure and position sensors
Strain gage amplifiers
Medical instrumentation
Thermocouple amplifiers
Automotive sensors
Precision references
Precision current sensing
Figure 3. 8-Lead MSOP (RM-8)
8-Lead SOIC_N (R-8)
The AD8638/AD8639 are single and dual wide bandwidth,
auto-zero amplifiers featuring rail-to-rail output swing and low
noise. These amplifiers have very low offset, drift, and bias
current. Operation is fully specified from 5 V to 16 V single
supply (±2.5 V to ±8 V dual supply).
PIN 1
INDICATOR
OUT A
1
–IN A
2
AD8639
7 OUT B
+IN A
3
6 –IN B
v–
4
TOP VIEW
(Not to Scale)
8 V+
5 +IN B
NOTES
1. EXPOSED PAD SOLDERED TO
APPLICATION BOARD.
06895-204
GENERAL DESCRIPTION
With a typical offset voltage of only 3 μV, drift of 0.01 μV/°C,
and noise of 1.2 μV p-p (0.1 Hz to 10 Hz), the AD8638/AD8639
are suited for applications in which error sources cannot be
tolerated. Position and pressure sensors, medical equipment,
and strain gage amplifiers benefit greatly from nearly zero drift
over their operating temperature ranges. Many systems can take
advantage of the rail-to-rail output swing provided by the
AD8638/AD8639 to maximize signal-to-noise ratio (SNR).
5
TOP VIEW
(Not to Scale)
+IN 3
APPLICATIONS
The AD8638/AD8639 provide benefits previously found only
in expensive zero-drift or chopper-stabilized amplifiers. Using
the Analog Devices, Inc., topology, these auto-zero amplifiers
combine low cost with high accuracy and low noise. No external capacitors are required. In addition, the AD8638/AD8639
greatly reduce the digital switching noise found in most chopperstabilized amplifiers.
AD8638
06895-001
FEATURES
Figure 4. 8-Lead LFCSP_WD (CP-8-5)
The AD8638/AD8639 are specified for the extended industrial
temperature range (−40°C to +125°C). The single AD8638 is
available in tiny 5-lead SOT-23 and 8-lead SOIC packages.
The dual AD8639 is available in 8-lead MSOP, 8-lead SOIC, and
8-lead LFCSP packages.
The AD8638/AD8639 are members of a growing series of autozero op amps offered by Analog Devices (see Table 1).
Table 1. Auto-Zero Op Amps
Supply
Single
Dual
Quad
2.7 V to 5 V
AD8628
AD8629
AD8630
2.7 V to 5 V Low Power
AD8538
AD8539
5 V to 16 V
AD8638
AD8639
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
AD8638/AD8639
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Applications ....................................................................................... 1
Theory of Operation ...................................................................... 14
General Description ......................................................................... 1
1/f Noise ....................................................................................... 14
Pin Configurations ........................................................................... 1
Input Voltage Range ................................................................... 14
Revision History ............................................................................... 2
Output Phase Reversal ............................................................... 14
Specifications..................................................................................... 3
Overload Recovery Time .......................................................... 14
Electrical Characteristics—5 V Operation................................ 3
Infrared Sensors.......................................................................... 15
Electrical Characteristics—16 V Operation ............................. 4
Precision Current Shunt Sensor ............................................... 15
Absolute Maximum Ratings............................................................ 5
Output Amplifier for High Precision DACs ........................... 15
Thermal Resistance ...................................................................... 5
Outline Dimensions ....................................................................... 16
ESD Caution .................................................................................. 5
Ordering Guide .......................................................................... 17
REVISION HISTORY
5/08—Rev. B to Rev. C
Added LFCSP_WD Package ............................................. Universal
Inserted Figure 4; Renumbered Sequentially ................................ 1
Changes to Layout ............................................................................ 1
Changes to General Description .................................................... 1
Changes to Offset Voltage Drift for All Packages Except SOT-23
Parameter in Table 2 ......................................................................... 3
Changes to Table 5 ............................................................................ 5
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
4/08—Rev. A to Rev. B
Added AD8639 ................................................................... Universal
Added 8-lead MSOP Package ........................................... Universal
Changes to Features.......................................................................... 1
Changes to General Description .................................................... 1
Changes Table 2 ................................................................................ 3
Changes to Table 3 ............................................................................ 4
Changes to Table 4, Added Endnote 1 and Endnote 2 .................5
Changes to Figure 4 through Figure 9 ............................................6
Changes to Figure 11, Figure 12, Figure 14, and Figure 15..........7
Changes to Figure 16 through Figure 27 ........................................8
Changes to Figure 28 through Figure 33 ..................................... 10
Changes to Figure 34 through Figure 39 ..................................... 11
Changes to Figure 41 and Figure 44............................................. 12
Inserted Figure 46, Figure 47, Figure 49, and Figure 50;
Renumbered Sequentially ............................................................. 13
Changes to Figure 51, Figure 52, and Figure 53 ......................... 15
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
11/07—Rev. 0 to Rev. A
Change to Large Signal Voltage Gain Specification ......................4
11/07—Revision 0: Initial Version
Rev. C | Page 2 of 20
AD8638/AD8639
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
−40°C ≤ TA ≤ +125°C
−0.1 V ≤ VCM ≤ +3.0 V
−40°C ≤ TA ≤ +125°C
Input Bias Current
IB
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift for All Packages
Except SOT-23
Offset Voltage Drift for SOT-23
Input Resistance
Input Capacitance, Differential Mode
Input Capacitance, Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.1%
Overload Recovery Time
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
∆VOS/∆T
−0.1
118
118
120
119
∆VOS/∆T
RIN
CINDM
CINCM
−40°C ≤ TA ≤ +125°C
VOH
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to VCM
−40°C ≤ TA ≤ +125°C
TA = 25°C
f = 100 kHz, AV = 1
4.97
4.97
4.90
4.86
VSY = 4.5 V to 16 V
−40°C ≤ TA ≤ +125°C
IO = 0 mA
−40°C ≤ TA ≤ +125°C
127
125
VOL
ISC
ZOUT
PSRR
ISY
SR
tS
RL = 10 kΩ, CL = 20 pF, AV = 1
VIN = 2 V step, CL = 20 pF, RL = 1 kΩ, AV = 1
GBP
ΦM
en p-p
en
Unit
3
9
23
9
23
40
40
105
40
40
60
+3
μV
μV
μV
μV
pA
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
μV/°C
1.5
7
45
7
7
16.5
IOS
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
VCM = 0 V to 3 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 0.5 V to 4.5 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Max
3
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
Typ
133
136
0.01
0.06
0.04
22.5
4
1.7
0.15
4.985
4.93
7.5
32
10
15
40
55
±19
4.2
143
1.0
1.3
1.5
μV/°C
TΩ
pF
pF
V
V
V
V
mV
mV
mV
mV
mA
Ω
dB
dB
mA
mA
RL = 2 kΩ, CL = 20 pF, AV = 1
RL = 2 kΩ, CL = 20 pF, AV = 1
2.5
3
50
1.35
70
V/μs
μs
μs
MHz
Degrees
0.1 Hz to 10 Hz
f = 1 kHz
1.2
60
μV p-p
nV/√Hz
Rev. C | Page 3 of 20
AD8638/AD8639
ELECTRICAL CHARACTERISTICS—16 V OPERATION
VSY = 16 V, VCM = VSY/2, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
−40°C ≤ TA ≤ +125°C
−0.1 V ≤ VCM ≤ +14 V
−40°C ≤ TA ≤ +125°C
Input Bias Current
IB
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift for All Packages
Except SOT-23
Offset Voltage Drift for SOT-23
Input Resistance
Input Capacitance, Differential Mode
Input Capacitance, Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.1%
Overload Recovery Time
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
∆VOS/∆T
−0.1
127
127
130
130
∆VOS/∆T
RIN
CINDM
CINCM
−40°C ≤ TA ≤ +125°C
VOH
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to VCM
−40°C ≤ TA ≤ +125°C
TA = 25°C
f = 100 kHz, AV = 1
15.94
15.93
15.77
15.70
VSY = 4.5 V to 16 V
−40°C ≤ TA ≤ +125°C
IO = 0 mA
−40°C ≤ TA ≤ +125°C
127
125
VOL
ISC
ZOUT
PSRR
ISY
SR
tS
RL = 10 kΩ, CL = 20 pF, AV = 1
VIN = 4 V step, CL = 20 pF, RL = 1 kΩ, AV = 1
GBP
ΦM
en p-p
en
Unit
3
9
23
9
23
75
75
250
70
75
150
+14
μV
μV
μV
μV
pA
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
μV/°C
1
4
85
20
20
50
IOS
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
VCM = 0 V to 14 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 0.5 V to 15.5 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Max
3
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
Typ
142
147
0.03
0.06
0.04
22.5
4
1.7
0.15
15.96
15.82
30
120
40
60
140
200
±37
3.0
143
1.25
1.5
1.7
μV/°C
TΩ
pF
pF
V
V
V
V
mV
mV
mV
mV
mA
Ω
dB
dB
mA
mA
RL = 2 kΩ, CL = 20 pF, AV = 1
RL = 2 kΩ, CL = 20 pF, AV = 1
2
4
50
1.5
74
V/μs
μs
μs
MHz
Degrees
0.1 Hz to 10 Hz
f = 1 kHz
1.2
60
μV p-p
nV/√Hz
Rev. C | Page 4 of 20
AD8638/AD8639
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Input Voltage
Input Current1
Differential Input Voltage2
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
16 V
GND − 0.3 V to VSY+ + 0.3 V
±10 mA
±VSY
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
1
Input pin has clamp diodes to power the supply pins. Input current should
be limited to 10 mA or less whenever input signals exceed the power supply
rail by 0.5 V.
2
Differential input voltage is limited to 5 V or the supply voltage, whichever is less.
THERMAL RESISTANCE
Table 5. Thermal Resistance
Package Type
5-Lead SOT-23 (RJ-5)
8-Lead SOIC_N (R-8)
8-Lead MSOP (RM-8)
8-Lead LFCSP_WD (CP-8-5)2
1
θJA1
230
158
206
75
θJC
146
43
44
18
Unit
°C/W
°C/W
°C/W
°C/W
θJA is specified for the worst-case conditions, that is, a device soldered in a
circuit board for surface-mount packages. This was measured using a
standard two-layer board.
2
Exposed pad is soldered to the application board.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. C | Page 5 of 20
AD8638/AD8639
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
1400
6000
VSY = 5V
0V ≤ VCM ≤ +3V
VSY = 16V
0V ≤ VCM ≤ +14V
5000
NUMBER OF AMPLIFIERS
1000
800
600
400
4000
3000
2000
–5
0
10
5
0
–10
06895-003
0
–10
VOS (µV)
Figure 5. Input Offset Voltage Distribution
5
10
12
VSY = ±2.5V
–40°C ≤ TA ≤ +125°C
SOIC PACKAGE
VSY = ±8V
–40°C ≤ TA ≤ +125°C
SOIC PACKAGE
10
NUMBER OF AMPLIFIERS
20
15
10
5
8
6
4
2
0
4
8
12
16
20
24
28
32
36
0
06895-004
0
40
TCVOS (nV/°C)
0
7.5
2.5
VOS (µV)
2.5
0
24
28
32
36
40
0
–2.5
–5.0
–5.0
–7.5
–7.5
1.5
2.0
VCM (V)
2.5
3.0
3.5
4
06895-005
–2.5
1
20
7.5
5.0
0.5
16
10.0
VSY = 5V
–0.5V ≤ VCM ≤ +3.9V
0
12
Figure 9. Input Offset Voltage Drift Distribution
5.0
–10.0
–0.5
8
TCVOS (nV/°C)
Figure 6. Input Offset Voltage Drift Distribution
10.0
4
06895-007
NUMBER OF AMPLIFIERS
0
VOS (µV)
Figure 8. Input Offset Voltage Distribution
25
VOS (µV)
–5
06895-006
1000
200
Figure 7. Input Offset Voltage vs. Common-Mode Voltage
–10.0
–0.5
VSY = 16V
–0.5V ≤ VCM ≤ +14.5V
1.0
2.5
4.0
5.5
7.0
8.5
10.0
11.5
13.0
14.5
VCM (V)
Figure 10. Input Offset Voltage vs. Common-Mode Voltage
Rev. C | Page 6 of 20
06895-008
NUMBER OF AMPLIFIERS
1200
AD8638/AD8639
TA = 25°C, unless otherwise noted.
100
100
VSY = ±8V
VSY = ±2.5V
10
IB (pA)
IB (pA)
10
1
1
50
75
TEMPERATURE (°C)
100
125
0.01
25
06895-117
0.1
25
50
Figure 11. Input Bias Current vs. Temperature
VDD – VOH
VOL – VSS
10
1
0.01
0.1
1
LOAD CURRENT (mA)
10
100
VSY = ±8V
1k
VDD – VOH
100
VOL – VSS
10
1
0.001
Figure 12. Output Voltage to Supply Rail vs. Load Current
0.01
0.1
1
LOAD CURRENT (mA)
10
100
06895-012
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
100
06895-009
Figure 15. Output Voltage to Supply Rail vs. Load Current
120
250
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
VSY = 5V
RL = 2kΩ
VDD – VOH
80
60
40
–25
0
25
50
75
TEMPERATURE (°C)
100
125
06895-010
VOL
20
Figure 13. Output Voltage to Supply Rail vs. Temperature
VSY = 16V
RL = 2kΩ
200
VDD – VOH
150
VOL
100
50
0
–40
–25
0
25
50
TEMPERATURE (°C)
75
100
Figure 16. Output Voltage to Supply Rail vs. Temperature
Rev. C | Page 7 of 20
125
06895-013
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
1k
0.1
0.001
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
125
10k
VSY = ±2.5V
0
–40
100
Figure 14. Input Bias Current vs. Temperature
10k
100
75
TEMPERATURE (°C)
06895-118
0.1
AD8638/AD8639
TA = 25°C, unless otherwise noted.
120
120
100
100
80
80
80
80
60
60
60
60
40
40
40
CL = 20pF
0
0
–20
–20
–40
–40
CL = 200pF
–80
–80
–80
–100
–100
10k
100k
FREQUENCY (Hz)
–120
10M
1M
0
–20
–40
–60
–120
1k
–60
10k
–120
10M
1M
60
VSY = ±2.5V
RL = 2kΩ
CL = 20pF
AV = +10
AV = +1
VSY = ±8V
RL = 2kΩ
CL = 20pF
AV = +100
40
–20
AV = +10
20
AV = +1
0
–20
10k
100k
FREQUENCY (Hz)
1M
10M
–40
1k
06895-018
–40
1k
Figure 18. Closed-Loop Gain vs. Frequency
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 21. Closed-Loop Gain vs. Frequency
1k
1k
VSY = ±8V
VSY = ±2.5V
100
100
AV = –10
ZOUT (Ω)
AV = –10
10
AV = –100
10
AV = +1
AV = –100
AV = +1
0.1
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
0.1
100
1k
10k
100k
FREQUENCY (Hz)
1M
Figure 22. Output Impedance vs. Frequency
Figure 19. Output Impedance vs. Frequency
Rev. C | Page 8 of 20
10M
06895-119
1
1
06895-100
ZOUT (Ω)
100k
FREQUENCY (Hz)
06895-019
0
–100
Figure 20. Open-Loop Gain and Phase vs. Frequency
CLOSED-LOOP GAIN (dB)
CLOSED-LOOP GAIN (dB)
20
–80
VSY = ±8V
RL = 2kΩ
–120
1k
60
AV = +100
–40
CL = 200pF
Figure 17. Open-Loop Gain and Phase vs. Frequency
40
20
–20
–60
VSY = ±2.5V
RL = 2kΩ
CL = 20pF
0
–60
–100
40
GAIN
20
06895-016
GAIN (dB)
20
100
PHASE (Degrees)
GAIN
20
120
PHASE
06895-017
PHASE
GAIN (dB)
100
PHASE (Degrees)
120
AD8638/AD8639
TA = 25°C, unless otherwise noted.
140
140
VSY = ±8V
120
100
100
80
60
80
60
40
40
20
20
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
0
100
1k
10k
100k
FREQUENCY (Hz)
120
120
VSY = ±8V
100
100
80
80
PSRR–
40
60
PSRR–
40
20
20
0
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
PSRR+
–20
10
100
Figure 24. PSRR vs. Frequency
80
1M
10M
VSY = ±8V
RL = 10kΩ
70
60
50
OS+
40
OS–
30
30
20
10
10
100
LOAD CAPACITANCE (pF)
1k
OS–
40
20
0
10
OS+
50
0
10
Figure 25. Small Signal Overshoot vs. Load Capacitance
100
LOAD CAPACITANCE (pF)
Figure 28. Small Signal Overshoot vs. Load Capacitance
Rev. C | Page 9 of 20
1k
06895-127
OVERSHOOT (%)
60
06895-126
OVERSHOOT (%)
10k
100k
FREQUENCY (Hz)
Figure 27. PSRR vs. Frequency
VSY = ±2.5V
RL = 10kΩ
70
1k
06895-112
60
PSRR (dB)
PSRR+
06895-111
PSRR (dB)
VSY = ±2.5V
80
10M
Figure 26. CMRR vs. Frequency
Figure 23. CMRR vs. Frequency
–20
10
1M
06895-120
CMRR (dB)
120
06895-113
CMRR (dB)
VSY = ±2.5V
AD8638/AD8639
TA = 25°C, unless otherwise noted.
VSY = ±2.5V
AV = +1
CL = 200pF
RL = 10kΩ
TIME (2µs/DIV)
Figure 29. Large Signal Transient Response
Figure 32. Large Signal Transient Response
VSY = ±8V
AV = +1
CL = 200pF
RL = 10kΩ
TIME (2µs/DIV)
Figure 33. Small Signal Transient Response
Figure 30. Small Signal Transient Response
0.05
3
2
1
OUTPUT VOLTAGE
0
–1
VSY = ±8V
AV = –100
–0.10
–0.15
10
5
OUTPUT VOLTAGE
TIME (10µs/DIV)
–5
TIME (10µs/DIV)
Figure 31. Negative Overload Recovery
Figure 34. Negative Overload Recovery
Rev. C | Page 10 of 20
0
06895-133
–0.15
–0.05
INPUT VOLTAGE
OUTPUT VOLTAGE (5V/DIV)
VSY = ±2.5V
AV = –100
INPUT VOLTAGE (50mV/DIV)
–0.10
0
OUTPUT VOLTAGE (1V/DIV)
–0.05
0.05
INPUT VOLTAGE
06895-132
0
06895-104
TIME (2µs/DIV)
06895-103
VOLTAGE (50mV/DIV)
VOLTAGE (50mV/DIV)
VSY = ±2.5V
AV = +1
CL = 200pF
RL = 10kΩ
INPUT VOLTAGE (50mV/DIV)
06895-102
TIME (2µs/DIV)
06895-101
VOLTAGE (2V/DIV)
VOLTAGE (500mV/DIV)
VSY = ±8V
AV = +1
CL = 200pF
RL = 10kΩ
AD8638/AD8639
TA = 25°C, unless otherwise noted.
0.15
VSY = ±2.5V
AV = –100
–0.05
1
OUTPUT VOLTAGE
0
–1
INPUT VOLTAGE
0
–0.05
5
0
OUTPUT VOLTAGE
–5
–10
06895-134
–2
0.05
–3
06895-135
INPUT VOLTAGE
INPUT VOLTAGE (50mV/DIV)
0.05
0
VSY = ±8V
AV = –100
0.10
OUTPUT VOLTAGE (1V/DIV)
–15
TIME (10µs/DIV)
TIME (10µs/DIV)
Figure 35. Positive Overload Recovery
Figure 38. Positive Overload Recovery
INPUT
2V/DIV
1V/DIV
INPUT
OUTPUT
+2mV
ERROR BAND
OUTPUT
–2mV
06895-136
–2mV
VSY = ±2.5V
+2mV
0
0
VSY = ±8V
06895-137
ERROR BAND
TIME (4µs/DIV)
TIME (4µs/DIV)
Figure 36. Positive Settling Time to 0.1%
Figure 39. Positive Settling Time to 0.1%
INPUT
2V/DIV
1V/DIV
INPUT
OUTPUT
+2mV
+2mV
OUTPUT
0
–2mV
VSY = ±2.5V
0
ERROR BAND
–2mV
06895-138
ERROR BAND
TIME (4µs/DIV)
VSY = ±8V
TIME (4µs/DIV)
Figure 37. Negative Settling Time to 0.1%
Figure 40. Negative Settling Time to 0.1%
Rev. C | Page 11 of 20
06895-139
INPUT VOLTAGE (50mV/DIV)
0.10
OUTPUT VOLTAGE (5V/DIV)
0.15
AD8638/AD8639
TA = 25°C, unless otherwise noted.
1k
VSY = ±8V
VOLTAGE NOISE DENSITY (nV/ Hz)
100
10
1
10
100
1k
FREQUENCY (Hz)
10k
25k
100
10
06895-114
1
1.5
10k
25k
1.5
VSY = ±2.5V
VSY = ±8V
1.0
INPUT NOISE VOLTAGE (µV)
1.0
0.5
0
–0.5
–1.0
0.5
0
–0.5
–1.0
0
1
2
3
4
5
6
TIME (Seconds)
7
8
9
10
–1.5
06895-043
INPUT NOISE VOLTAGE (0.5µV/DIV)
100
1k
FREQUENCY (Hz)
Figure 44. Voltage Noise Density vs. Frequency
Figure 41. Voltage Noise Density vs. Frequency
–1.5
10
0
1
Figure 42. 0.1 Hz to 10 Hz Noise
2
3
4
5
6
TIME (Seconds)
7
8
9
95
110
10
06895-044
VOLTAGE NOISE DENSITY (nV/ Hz)
VSY = ±2.5V
06895-115
1k
Figure 45. 0.1 Hz to 10 Hz Noise
1400
+125°C
1200
VSY = ±8V
SUPPLY CURRENT (µA)
+85°C
1000
+25°C
750
–40°C
500
1000
VSY = ±2.5V
800
600
400
250
0
0
1
2
3
4
5
6
7 8 9
VSY (V)
10 11 12 13 14 15 16
Figure 43. Supply Current vs. Supply Voltage
0
–40
–25
–10
5
20
35
50
65
TEMPERATURE (°C)
80
Figure 46. Supply Current vs. Temperature
Rev. C | Page 12 of 20
125
06895-125
200
06895-014
SUPPLY CURRENT (µA)
1250
AD8638/AD8639
TA = 25°C, unless otherwise noted.
–20
CHANNEL SEPARATION (dB)
–20
–40
–60
–80
RL = 2kΩ
–100
RL = 10kΩ
–120
–140
100
1k
10k
FREQUENCY (Hz)
VSY = ±8V
AV = –100
–40
–60
RL = 2kΩ
–80
–100
RL = 10kΩ
–120
100k
–140
100
06895-147
Figure 47. Channel Separation vs. Frequency
0.1
VS = ±8V
AV = +1
RL = 10kΩ
THD + NOISE (%)
0.01
VIN = 1V rms
VIN = 3V rms
0.001
0.0001
10
100
1k
FREQUENCY (Hz)
10k
100k
06895-149
THD + NOISE (%)
VSY = ±8V
AV = +1
RL = 2kΩ
Figure 48. THD + Noise vs. Frequency
VSY = 16V
TA = 125°C
150
100
50
0
1
2
3
4
5
6
7 8 9
VCM (V)
10 11 12 13 14 15 16
06895-034
IB (pA)
200
0
0.01
VIN = 1V rms
0.001
0.0001
10
VIN = 3V rms
100
1k
FREQUENCY (Hz)
10k
Figure 51. THD + Noise vs. Frequency
300
–50
100k
Figure 50. Channel Separation vs. Frequency
0.1
250
1k
10k
FREQUENCY (Hz)
Figure 49. Input Bias Current vs. Input Common-Mode Voltage
Rev. C | Page 13 of 20
100k
06895-150
CHANNEL SEPARATION (dB)
0
VSY = ±8V
AV = –10
06895-148
0
AD8638/AD8639
THEORY OF OPERATION
The AD8638/AD8639 are single-supply and dual-supply, ultrahigh
precision, rail-to-rail output operational amplifiers. The typical
offset voltage of 3 μV allows the amplifiers to be easily configured
for high gains without risk of excessive output voltage errors. The
extremely small temperature drift of 30 nV/°C ensures a minimum
offset voltage error over the entire temperature range of −40°C
to +125°C, making the amplifiers ideal for a variety of sensitive
measurement applications in harsh operating environments.
The AD8638/AD8639 achieve a high degree of precision
through a patented auto-zeroing topology. This unique
topology allows the AD8638/AD8639 to maintain low offset
voltage over a wide temperature range and over the operating
lifetime. The AD8638/AD8639 also optimize the noise and
bandwidth over previous generations of auto-zero amplifiers,
offering the lowest voltage noise of any auto-zero amplifier by
more than 50%.
Previous designs used either auto-zeroing or chopping to add
precision to the specifications of an amplifier. Auto-zeroing
results in low noise energy at the auto-zeroing frequency, at the
expense of higher low frequency noise due to aliasing of wideband noise into the auto-zeroed frequency band. Chopping
results in lower low frequency noise at the expense of larger
noise energy at the chopping frequency. The AD8638/AD8639
use both auto-zeroing and chopping in a patented ping-pong
arrangement to obtain lower low frequency noise together with
lower energy at the chopping and auto-zeroing frequencies,
maximizing the SNR for the majority of applications without
the need for additional filtering. The relatively high clock
frequency of 15 kHz simplifies filter requirements for a wide,
useful, noise-free bandwidth.
The AD8638 is among the few auto-zero amplifiers offered in
the 5-lead SOT-23 package. This provides significant improvement over the ac parameters of previous auto-zero amplifiers. The
AD8638/AD8639 have low noise over a relatively wide bandwidth
(0 Hz to 10 kHz) and can be used where the highest dc precision is
required. In systems with signal bandwidths ranging from 5 kHz
to 10 kHz, the AD8638/AD8639 provide true 16-bit accuracy,
making this device the best choice for very high resolution
systems.
The internal elimination of 1/f noise is accomplished as follows:
1/f noise appears as a slowly varying offset to AD8638/AD8639
inputs. Auto-zeroing corrects any dc or low frequency offset.
Therefore, the 1/f noise component is essentially removed,
leaving the AD8638/AD8639 free of 1/f noise.
INPUT VOLTAGE RANGE
The AD8638/AD8639 are not rail-to-rail input amplifiers;
therefore, care is required to ensure that both inputs do not
exceed the input voltage range. Under normal negative feedback
operating conditions, the amplifier corrects its output to ensure
that the two inputs are at the same voltage. However, if either
input exceeds the input voltage range, the loop opens and large
currents begin to flow through the ESD protection diodes in the
amplifier.
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the
input voltage exceeds the supply voltage, these ESD diodes can
become forward-biased. Without current limiting, excessive
amounts of current may flow through these diodes, causing
permanent damage to the device. If inputs are subject to overvoltage, insert appropriate series resistors to limit the diode
current to less than 5 mA maximum.
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs
of these amplifiers can suddenly jump in the opposite direction
to the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
The AD8638/AD8639 amplifiers have been carefully designed
to prevent any output phase reversal if both inputs are maintained within the specified input voltage range. If one or both
inputs exceed the input voltage range but remain within the
supply rails, an internal loop opens and the output varies.
Therefore, the inputs should always be less than at least 2 V
below the positive supply.
1/f NOISE
OVERLOAD RECOVERY TIME
1/f noise, also known as pink noise, is a major contributor to
errors in dc-coupled measurements. This 1/f noise error term
can be in the range of several microvolts or more and, when
amplified by the closed-loop gain of the circuit, can show up
as a large output signal. For example, when an amplifier with
5 μV p-p 1/f noise is configured for a gain of 1000, its output has
5 mV of error due to the 1/f noise. However, the AD8638/AD8639
eliminate 1/f noise internally and thus significantly reduce
output errors.
Many auto-zero amplifiers are plagued by a long overload recovery
time, often in milliseconds, due to the complicated settling
behavior of the internal nulling loops after saturation of the
outputs. The AD8638/AD8639 are designed so that internal
settling occurs within two clock cycles after output saturation
happens. This results in a much shorter recovery time, less than
50 μs, when compared to other auto-zero amplifiers. The wide
bandwidth of the AD8638/AD8639 enhances performance when
the parts are used to drive loads that inject transients into the
outputs. This is a common situation when an amplifier is used
to drive the input of switched capacitor ADCs.
Rev. C | Page 14 of 20
AD8638/AD8639
INFRARED SENSORS
Infrared (IR) sensors, particularly thermopiles, are increasingly
used in temperature measurement for applications as wide
ranging as automotive climate control, human ear thermometers,
home insulation analysis, and automotive repair diagnostics.
The relatively small output signal of the sensor demands high
gain with very low offset voltage and drift to avoid dc errors.
If interstage ac coupling is used, as shown in Figure 52, low
offset and drift prevent the output of the input amplifier from
drifting close to saturation. The low input bias currents generate
minimal errors from the output impedance of the sensor.
Similar to pressure sensors, the very low amplifier drift with
time and temperature eliminates additional errors once the
system is calibrated at room temperature. The low 1/f noise
improves SNR for dc measurements taken over periods often
exceeding one-fifth of a second.
Figure 52 shows a circuit that can amplify ac signals from
100 μV to 300 μV up to the 1 V to 3 V levels, with a gain of
10,000 for accurate analog-to-digital conversions.
10kΩ
The AD8638/AD8639 can be used as output amplifiers for a
16-bit high precision DAC in a unipolar configuration. In this
case, the selected op amp needs to have very low offset voltage
(the DAC LSB is 38 μV when operating with a 2.5 V reference)
to eliminate the need for output offset trims. Input bias current
(typically a few tens of picoamperes) must also be very low
because it generates an additional offset error when multiplied
by the DAC output impedance (approximately 6 kΩ).
100kΩ
100kΩ
5V TO 16V
5V TO 16V
100µV TO 300µV
10µF
IR
DETECTOR
1/2 AD8639
1/2 AD8639
10kΩ
06895-065
fC ≈ 1.6Hz
TO BIAS
VOLTAGE
Figure 52. AD8639 Used as a Preamplifier for Thermopile
PRECISION CURRENT SHUNT SENSOR
A precision current shunt sensor benefits from the unique
attributes of auto-zero amplifiers when used in a differencing
configuration, as shown in Figure 53. Current shunt sensors are
used in precision current sources for feedback control systems.
They are also used in a variety of other applications, including
battery fuel gauging, laser diode power measurement and
control, torque feedback controls in electric power steering, and
precision power metering.
SUPPLY
I
100kΩ
e = 1000 R S I =
100mV/mA
RS
0.1Ω
OUTPUT AMPLIFIER FOR HIGH PRECISION DACS
Rail-to-rail output provides full-scale output with very little
error. Output impedance of the DAC is constant and codeindependent, but the high input impedance of the AD8638/
AD8639 minimizes gain errors. The wide bandwidth of the
amplifier also serves well in this case. The amplifier, with a
settling time of 4 μs, adds another time constant to the system,
increasing the settling time of the output. For example, see
Figure 54. The settling time of the AD5541 is 1 μs. The
combined settling time is approximately 4.1 μs, as can be
derived from the following equation:
t S (TOTAL ) =
(t S DAC )2 + (t S AD8638)2
2.5V
6
5V
0.1µF
RL
ADR421
4
2
5V TO 16V
0.1µF
0.1µF
5V TO 16V
100Ω
SERIAL
INTERFACE
C
5V TO 16V
VDD
REF(REFF*) REFS*
CS
DIN
SCLK
AD8638
AD5541/AD5542
VOUT
UNIPOLAR
OUTPUT
LDAC*
AD8638
DGND
100Ω
C
AGND
*AD5542 ONLY
06895-066
100kΩ
Figure 54. AD8638 Used as an Output Amplifier
Figure 53. Low-Side Current Sensing
Rev. C | Page 15 of 20
06895-067
100Ω
In such applications, it is desirable to use a shunt with very low
resistance to minimize the series voltage drop; this minimizes
wasted power and allows the measurement of high currents
while saving power. A typical shunt may be 0.1 Ω. At measured
current values of 1 A, the output signal of the shunt is hundreds
of millivolts, or even volts, and amplifier error sources are not
critical. However, at low measured current values in the 1 mA
range, the 100 μV output voltage of the shunt demands a very low
offset voltage and drift to maintain absolute accuracy. Low input
bias currents are also needed to prevent injected bias current
from becoming a significant percentage of the measured current.
High open-loop gain, CMRR, and PSRR help to maintain the
overall circuit accuracy. With the extremely high CMRR of the
AD8638/AD8639, the CMRR is limited by the resistor ratio
matching. As long as the rate of change of the current is not too
fast, an auto-zero amplifier can be used with excellent results.
AD8638/AD8639
OUTLINE DIMENSIONS
2.90 BSC
5.00 (0.1968)
4.80 (0.1890)
5
4
2.80 BSC
1.60 BSC
1
2
4.00 (0.1574)
3.80 (0.1497)
3
8
5
1
4
6.20 (0.2441)
5.80 (0.2284)
PIN 1
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
1.45 MAX
0.15 MAX
0.50
0.30
10°
5°
0°
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.22
0.08
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-A A
1
5
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 57. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. C | Page 16 of 20
0.80
0.60
0.40
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
Figure 56. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
0.50 (0.0196)
0.25 (0.0099)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 55. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
3.20
3.00
2.80
1.75 (0.0688)
1.35 (0.0532)
012407-A
0.95 BSC
1.90
BSC
1.30
1.15
0.90
AD8638/AD8639
2.48
2.38
2.23
3.00
BSC SQ
8
5
EXPOSED
PAD
0.50
0.40
0.30
INDEX
AREA
1
BOTTOM VIEW
TOP VIEW
PIN 1
INDICATOR
(R 0.2)
0.80 MAX
0.55 NOM
0.30
0.25
0.18
0.50 BSC
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
051508-A
0.80
0.75
0.70
SEATING
PLANE
4
1.74
1.64
1.49
Figure 58. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead
(CP-8-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD8638ARJZ-R21
AD8638ARJZ-REEL1
AD8638ARJZ-REEL71
AD8638ARZ1
AD8638ARZ-REEL1
AD8638ARZ-REEL71
AD8639ACPZ-R21
AD8639ACPZ-REEL1
AD8639ACPZ-REEL71
AD8639ARZ1
AD8639ARZ-REEL1
AD8639ARZ-REEL71
AD8639ARMZ-R21
AD8639ARMZ-REEL1
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead LFCSP_WD
8-Lead LFCSP_WD
8-Lead LFCSP_WD
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
Z = RoHS Compliant Part.
Rev. C | Page 17 of 20
Package Option
RJ-5
RJ-5
RJ-5
R-8
R-8
R-8
CP-8-5
CP-8-5
CP-8-5
R-8
R-8
R-8
RM-8
RM-8
Branding
A1T
A1T
A1T
A1Y
A1Y
A1Y
A1Y
A1Y
AD8638/AD8639
NOTES
Rev. C | Page 18 of 20
AD8638/AD8639
NOTES
Rev. C | Page 19 of 20
AD8638/AD8639
NOTES
©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06895-0-5/08(C)
Rev. C | Page 20 of 20