OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series Check for Samples: OPA333, OPA2333 FEATURES DESCRIPTION 1 • • • • • • • • 2 The OPA333 series of CMOS operational amplifiers use a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10 μV, max) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and rail-to-rail output that swings within 50 mV of the rails. Single or dual supplies as low as +1.8 V (±0.9 V) and up to +5.5 V (±2.75 V) can be used. These devices are optimized for lowvoltage, single-supply operation. Low Offset Voltage: 10 μV (max) Zero Drift: 0.05 μV/°C (max) 0.01-Hz to 10-Hz Noise: 1.1 μVPP Quiescent Current: 17 μA Single-Supply Operation Supply Voltage: 1.8 V to 5.5 V Rail-to-Rail Input/Output microSize Packages: SC70 and SOT23 APPLICATIONS • • • • • • The OPA333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity. Transducers Temperature Measurements Electronic Scales Medical Instrumentation Battery-Powered Instruments Handheld Test Equipment The OPA333 (single version) is available in the SC70-5, SOT23-5, and SO-8 packages. The OPA2333 (dual version) is offered in DFN-8 (3 mm × 3 mm), MSOP-8, and SO-8 packages. All versions are specified for operation from –40°C to +125°C. 500 nV/div 0.1-Hz TO 10-Hz NOISE OPA333 OUT 1 V- 2 +IN 3 OPA333 5 4 V+ -IN +IN 1 V- 2 -IN 3 SOT23-5 5 V+ 4 OUT SC70-5 OPA2333 1 s/div OUT A 1 -IN A 2 +IN A 3 V- 4 Exposed Thermal Die Pad on Underside 8 V+ 7 OUT B 6 -IN B 5 +IN B DFN-8 (SON-8) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2013, Texas Instruments Incorporated OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Voltage Supply Signal input terminals (2) Temperature V mA Output short-circuit (3) Continuous mA Operating, TA –40 to +150 °C Storage, Tstg –65 to +150 °C Junction, TJ +150 °C Human body model (HBM) 4000 V 1000 V 400 V Machine model (MM) (2) (3) 2 V ±10 Electrostatic discharge (ESD) ratings Charged device model (CDM) (1) UNIT +7 –0.3 to (V+) + 0.3 Signal input terminals (2) Curent VALUE Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current limited to 10 mA or less. Short-circuit to ground, one amplifier per package. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 ELECTRICAL CHARACTERISTICS: VS = +1.8 V to +5.5 V At TA = +25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE VOS Input offset voltage VS = +5 V dVOS/dT Input offset voltage drift TA = –40°C to +125°C PSRR Power-supply rejection ratio VS = +1.8 V to +5.5 V, TA = –40°C to +125°C Long-term stability (1) 10 0.05 μV/°C 1 5 μV/V See note Channel separation, dc μV 2 0.02 (1) µV μV/V 0.1 INPUT BIAS CURRENT IB Input bias current IOS Input offset current ±70 TA = –40°C to +125°C ±200 pA ±150 ±140 pA ±400 pA NOISE Input voltage noise in Input current noise μVPP f = 0.01 Hz to 1 Hz 0.3 f = 0.1 Hz to 10 Hz 1.1 μVPP f = 10 Hz 100 fA/√Hz INPUT VOLTAGE VCM Common-mode voltage range CMRR Common-mode rejection ratio (V–) – 0.1 (V–) – 0.1 V < VCM < (V+) + 0.1 V, TA = –40°C to +125°C 106 (V+) + 0.1 V 130 dB Differential 2 pF Common-mode 4 pF 130 dB INPUT CAPACITANCE OPEN-LOOP GAIN AOL Open-loop voltage gain (V–) + 100 mV < VO < (V+) – 100 mV, RL = 10 kΩ, TA = –40°C to +125°C 106 FREQUENCY RESPONSE GBW Gain-bandwidth product CL = 100 pF 350 kHz SR Slew rate G = +1 0.16 V/μs OUTPUT Voltage output swing from rail ISC Short-circuit current CL Capacitive load drive Open-loop output impedance RL = 10 kΩ 30 RL = 10 kΩ, TA = –40°C to +125°C 50 mV 70 mV ±5 mA See Typical Characteristics f = 350 kHz, IO = 0 A 2 kΩ POWER SUPPLY VS IQ Specified voltage range Quiescent current per amplifier Turn-on time 1.8 IO = 0 A 17 TA = –40°C to +125°C VS = +5 V 5.5 V 25 μA 28 μA μs 100 TEMPERATURE TA Tstg (1) Specified range –40 +125 °C Operating range –40 +150 °C Storage range –65 +150 °C 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1 μV. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 3 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com THERMAL INFORMATION: OPA333 OPA333 THERMAL METRIC (1) D (SOIC) DBV (SOT23) DCK (SC70) 8 PINS 5 PINS 5 PINS θJA Junction-to-ambient thermal resistance 140.1 220.8 298.4 θJCtop Junction-to-case (top) thermal resistance 89.8 97.5 65.4 θJB Junction-to-board thermal resistance 80.6 61.7 97.1 ψJT Junction-to-top characterization parameter 28.7 7.6 0.8 ψJB Junction-to-board characterization parameter 80.1 61.1 95.5 θJCbot Junction-to-case (bottom) thermal resistance N/A N/A N/A (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. THERMAL INFORMATION: OPA2333 OPA2333 THERMAL METRIC (1) D (SOIC) DGK (MSOP) DRB (DFN) 8 PINS 8 PINS 8 PINS θJA Junction-to-ambient thermal resistance 124.0 180.3 46.7 θJCtop Junction-to-case (top) thermal resistance 73.7 48.1 26.3 θJB Junction-to-board thermal resistance 64.4 100.9 22.2 ψJT Junction-to-top characterization parameter 18.0 2.4 1.6 ψJB Junction-to-board characterization parameter 63.9 99.3 22.3 θJCbot Junction-to-case (bottom) thermal resistance N/A N/A 10.1 (1) 4 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 PIN CONFIGURATIONS: OPA333 DBV PACKAGE SOT23-5 (TOP VIEW) OUT 1 V- 2 +IN 3 DCK PACKAGE SC70-5 (TOP VIEW) 5 4 V+ +IN 1 V- 2 -IN 3 -IN 5 V+ 4 OUT D PACKAGE SO-8 (TOP VIEW) (1) (1) (1) 1 8 NC -IN 2 7 V+ +IN 3 6 OUT V- 4 5 NC NC (1) NC denotes no internal connection. PIN CONFIGURATIONS: OPA2333 DRB PACKAGE DFN-8 (SON-8) (TOP VIEW) (2) OUT A 1 -IN A 2 +IN A 3 V- 4 Exposed Thermal Die Pad on (2) Underside D AND DGK PACKAGES SO-8 AND MSOP-8 (VSSOP-8) (TOP VIEW) OUT A 8 V+ 7 OUT B 6 -IN B 5 +IN B 1 8 V+ 7 OUT B A -IN A 2 B +IN A 3 6 -IN B V- 4 5 +IN B Connect thermal die pad to V–. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 5 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS Table 1. List of Typical Characteristics TITLE FIGURE OFFSET VOLTAGE PRODUCTION DISTRIBUTION Figure 1 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Figure 2 OPEN-LOOP GAIN vs FREQUENCY Figure 3 COMMON-MODE REJECTION RATIO vs FREQUENCY Figure 4 POWER-SUPPLY REJECTION RATIO vs FREQUENCY Figure 5 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT Figure 6 INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE Figure 7 INPUT BIAS CURRENT vs TEMPERATURE Figure 8 QUIESCENT CURRENT vs TEMPERATURE Figure 9 LARGE-SIGNAL STEP RESPONSE Figure 10 SMALL-SIGNAL STEP RESPONSE Figure 11 POSITIVE OVERVOLTAGE RECOVERY Figure 12 NEGATIVE OVERVOLTAGE RECOVERY Figure 13 SETTLING TIME vs CLOSED-LOOP GAIN Figure 14 SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE Figure 15 0.1-Hz TO 10-Hz NOISE Figure 16 CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY Figure 17 6 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 TYPICAL CHARACTERISTICS -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 0 0.0025 0.0050 0.0075 0.0100 0.0125 0.0150 0.0175 0.0200 0.0225 0.0250 0.0275 0.0300 0.0325 0.0350 0.0375 0.0400 0.0425 0.0450 0.0475 0.0500 Population Population At TA = +25°C, VS = +5 V, and CL = 0 pF, unless otherwise noted. Offset Voltage (mV) Offset Voltage Drift (mV/°C) Figure 1. OFFSET VOLTAGE PRODUCTION DISTRIBUTION 140 100 200 120 150 100 Phase 100 60 50 40 Gain 20 0 -20 10 100 1k 10k 100k CMRR (dB) 250 Phase (°) 120 80 AOL (dB) Figure 2. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 80 60 0 40 -50 20 -100 0 1 1M 10 100 Frequency (Hz) 1k 10k Figure 3. OPEN-LOOP GAIN vs FREQUENCY 3 VS = ±2.75 V VS = ±0.9 V +PSRR 2 -PSRR Output Swing (V) PSRR (dB) 100 60 40 -40°C 1 0 0 -3 100 1k 10k 100k 1M +25°C -40°C -1 -2 10 +25°C +125°C 20 1 1M Figure 4. COMMON-MODE REJECTION RATIO vs FREQUENCY 120 80 100k Frequency (Hz) +125°C +25°C -40°C 0 1 Frequency (Hz) 2 3 4 5 6 7 8 9 10 Output Current (mA) Figure 5. POWER-SUPPLY REJECTION RATIO vs FREQUENCY Figure 6. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 7 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5 V, and CL = 0 pF, unless otherwise noted. 200 100 80 150 -IB 60 100 40 IB (pA) IB (pA) -IB 50 20 0 0 -20 +IB -50 -40 -100 -60 +IB -100 0 1 +IB -150 -80 2 3 4 5 -200 -50 0 -25 Common-Mode Voltage (V) 25 50 75 100 125 Temperature (°C) Figure 7. INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE Figure 8. INPUT BIAS CURRENT vs TEMPERATURE 25 Output Voltage (1 V/div) G=1 RL = 10 kW 20 VS = 5.5 V IQ (mA) VS = 5.5 V VS = 1.8 V -IB 15 VS = 1.8 V 10 5 0 -50 -25 0 25 50 75 100 Time (50 ms/div) 125 Temperature (°C) 2 V/div Figure 10. LARGE-SIGNAL STEP RESPONSE G = +1 RL = 10 kW 0 Input Output 10 kW +2.5 V 1 kW 1 V/div Output Voltage (50 mV/div) Figure 9. QUIESCENT CURRENT vs TEMPERATURE 0 OPA333 -2.5 V Time (5 ms/div) Time (50 ms/div) Figure 11. SMALL-SIGNAL STEP RESPONSE 8 Figure 12. POSITIVE OVERVOLTAGE RECOVERY Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5 V, and CL = 0 pF, unless otherwise noted. 600 500 Input Settling Time (ms) 1 V/div 2 V/div 4-V Step 0 0 10 kW +2.5 V 1 kW 400 300 200 0.001% Output OPA333 100 0.01% -2.5 V 0 Time (50 ms/div) 1 10 100 Gain (dB) Figure 13. NEGATIVE OVERVOLTAGE RECOVERY Figure 14. SETTLING TIME vs CLOSED-LOOP GAIN 40 35 25 500nV/div Overshoot (%) 30 20 15 10 5 0 10 100 1000 1s/div Load Capacitance (pF) Figure 15. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE Figure 16. 0.1-Hz TO 10-Hz NOISE Voltage Noise (nV/ÖHz) Continues with no 1/f (flicker) noise. Current Noise 100 100 Voltage Noise Current Noise (fA/ÖHz) 1000 1000 10 10 1 10 100 1k 10k Frequency (Hz) Figure 17. CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 9 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com DETAILED DESCRIPTION The OPA333 and OPA2333 are unity-gain stable and free from unexpected output phase reversal. These devices use a proprietary auto-calibration technique to provide low offset voltage and very low drift over time and temperature. For lowest offset voltage and precision performance, optimize circuit layout and mechanical conditions. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. Cancel these thermally-generated potentials by assuring they are equal on both input terminals. Other layout and design considerations include: • Use low thermoelectric-coefficient conditions (avoid dissimilar metals). • Thermally isolate components from power supplies or other heat sources. • Shield op amp and input circuitry from air currents, such as cooling fans. Following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause thermoelectric voltages of 0.1 μV/°C or higher, depending on materials used. OPERATING VOLTAGE The OPA333 and OPA2333 op amps operate over a power-supply range of +1.8 V to +5.5 V (±0.9 V to ±2.75 V). Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section. CAUTION Supply voltages higher than +7 V (absolute maximum) can permanently damage the device. INPUT VOLTAGE The OPA333 and OPA2333 input common-mode voltage range extends 0.1 V beyond the supply rails. The OPA333 is designed to cover the full range without the troublesome transition region found in some other rail-torail amplifiers. Typically, input bias current is approximately 70 pA; however, input voltages exceeding the power supplies can cause excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input resistor, as shown in Figure 18. Current-limiting resistor required if input voltage exceeds supply rails by ³ 0.5 V. IOVERLOAD 10 mA max +5 V VOUT OPA333 VIN 5 kW Figure 18. Input Current Protection 10 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 INTERNAL OFFSET CORRECTION The OPA333 and OPA2333 op amps use an auto-calibration technique with a time-continuous, 350-kHz op amp in the signal path. This amplifier is zero-corrected every 8 μs using a proprietary technique. Upon power-up, the amplifier requires approximately 100 μs to achieve specified VOS accuracy. This design has no aliasing or flicker noise. ACHIEVING OUTPUT SWING TO THE OP AMP NEGATIVE RAIL Some applications require output voltage swings from 0 V to a positive full-scale voltage (such as +2.5 V) with excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0 V, near the lower output swing limit of a single-supply op amp. A good, single-supply op amp may swing close to single-supply ground, but will not reach ground. The output of the OPA333 and OPA2333 can be made to swing to, or slightly below, ground on a single-supply power source. This swing is acheived with the use of the use of another resistor and an additional, more negative power supply than the op amp negative supply. A pull-down resistor can be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as shown in Figure 19. V+ = +5 V VOUT OPA333 VIN RP = 20 kW Op Amp V- = GND -5 V Additional Negative Supply Figure 19. VOUT Range to Ground The OPA333 and OPA2333 have an output stage that allows the output voltage to be pulled to the negative supply rail, or slightly below, using the technique previously described. This technique only works with some types of output stages. The OPA333 and OPA2333 are characterized to perform with this technique; the recommended resistor value is approximately 20 kΩ. Note that this configuration increases the current consumption by several hundreds of microamps. Accuracy is excellent down to 0 V and as low as –2 mV. Limiting and nonlinearity occurs below –2 mV, but excellent accuracy returns after the output is again driven above –2 mV. Lowering the resistance of the pull-down resistor allows the op amp to swing even further below the negative rail. Resistances as low as 10 kΩ can be used to achieve excellent accuracy down to –10 mV. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 11 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com APPLICATION INFORMATION Figure 20 shows a temperature measurement application REF3140 +5 V 0.1 mF 4.096 V + R9 150 kW R1 6.04 kW R5 31.6 kW D1 +5 V 0.1 mF + - R2 2.94 kW - + + R2 549 W R4 6.04 kW VO OPA333 R6 200 W K-Type Thermocouple 40.7 mV/°C Zero Adjust R3 60.4 W Figure 20. Temperature Measurement Figure 21 shows the basic configuration for a bridge amplifier. VEX R1 +5 V R R R R VOUT OPA333 R1 VREF Figure 21. Single Op Amp Bridge Amplifier A low-side current shunt monitor is shown in Figure 22. RN are operational resistors used to isolate the ADS1100 from the noise of the digital I2C bus. The ADS1100 is a 16-bit converter; therefore, a precise reference is essential for maximum accuracy. If absolute accuracy is not required and the 5-V power supply is sufficiently stable, the REF3130 can be omitted. 3V +5 V REF3130 Load R1 4.99 kW R2 49.9 kW R6 71.5 kW V ILOAD RSHUNT 1W RN 56 W OPA333 R3 4.99 kW Stray Ground-Loop Resistance R4 48.7 kW ADS1100 R7 1.18 kW RN 56 W 2 IC (PGA Gain = 4) FS = 3.0 V NOTE: 1% resistors provide adequate common-mode rejection at small ground-loop errors. Figure 22. Low-Side Current Monitor 12 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 Additional application ideas are shown in Figure 23 through Figure 26. RG zener RSHUNT (1) V+ (2) R1 10 kW MOSFET rated to stand-off supply voltage such as BSS84 for up to 50 V. OPA333 +5V V+ Two zener biasing methods (3) are shown. Output Load RBIAS RL (1) Zener rated for op amp supply capability (that is, 5.1 V for OPA333). (2) Current-limiting resistor. (3) Choose zener biasing resistor or dual NMOSFETs (FDG6301N, NTJD4001N, or Si1034) Figure 23. High-Side Current Monitor 100 kW 1 MW 60 kW 3V NTC Thermistor 1 MW OPA333 Figure 24. Thermistor Measurement V1 -In INA152 OPA333 R2 R1 2 5 6 VO R2 3 1 OPA333 V2 +In VO = (1 + 2R2 / R1) (V2 - V1) Figure 25. Precision Instrumentation Amplifier Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 13 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com +VS R1 100 kW fLPF = 150 Hz C4 1.06 nF 1/2 OPA2333 RA +VS R2 100 kW R6 100 kW 1/2 OPA2333 +VS 3 2 LL 7 INA321 (1) 4 5 R8 100 kW +VS dc R3 100 kW 1/2 OPA2333 Wilson LA R14 1 MW GTOT = 1 kV/V R7 100 kW ac GINA = 5 R12 5 kW 6 +VS 1 C3 1 mF VOUT OPA333 R13 318 kW GOPA = 200 +VS 1/2 OPA2333 VCENTRAL C1 47 pF (RA + LA + LL) / 3 fHPF = 0.5 Hz (provides ac signal coupling) 1/2 VS R5 390 kW R9 20 kW +VS R4 100 kW RL 1/2 OPA2333 Inverted VCM +VS VS = +2.7 V to +5.5 V 1/2 OPA2333 BW = 0.5 Hz to 150 Hz +VS R10 1 MW 1/2 VS C2 0.64 mF R11 1 MW fO = 0.5 Hz (1) Other instrumentation amplifiers can be used, such as the INA326, which has lower noise, but higher quiescent current. Figure 26. Single-Supply, Very Low Power, ECG Circuit 14 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 OPA333 OPA2333 www.ti.com SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 LAYOUT GUIDELINES GENERAL LAYOUT GUIDELINES Attention to good layout practices is always recommended. Keep traces short and when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference (EMI) susceptibility. Operational amplifiers vary in susceptibility to radio frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The OPA333 is specifically designed to minimize susceptibility to RFI and demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields may still cause varying offset levels. DFN PACKAGE The OPA2333 is offered in an DFN-8 package (also known as SON). The DFN is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard PCB assembly techniques. See Application Reports SLUA271, QFN/SON PCB Attachment and SCBA017, Quad Flatpack No-Lead Logic Packages, both available for download at www.ti.com. NOTE The exposed leadframe die pad on the bottom of the package should be connected to V– or left unconnected. DFN LAYOUT GUIDELINES Solder the exposed leadframe die pad on the DFN package to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout may be necessary based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term reliability. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 15 OPA333 OPA2333 SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (May 2007) to Revision D Page • Changed data sheet format to most current standard look and feel .................................................................................... 1 • Added OPA2333 DFN-8 pinout to front page ....................................................................................................................... 1 • Changed 2nd signal input terminals parameter in the Absolute Maximum Ratings from "voltage" to "current" (typo) ........ 2 • Added OPA333 thermal information table ............................................................................................................................ 4 • Added OPA2333 thermal information table .......................................................................................................................... 4 • Added Table 1 ...................................................................................................................................................................... 6 16 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: OPA333 OPA2333 PACKAGE OPTION ADDENDUM www.ti.com 7-Feb-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) OPA2333AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA333AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A OPA333AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 7-Feb-2015 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) OPA333AIDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A OPA333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A OPA333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 7-Feb-2015 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF OPA2333, OPA333 : • Automotive: OPA2333-Q1, OPA333-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 11-Sep-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing OPA2333AIDGKR VSSOP DGK 8 OPA2333AIDGKT VSSOP DGK OPA2333AIDR SOIC D OPA2333AIDRBR SON OPA2333AIDRBT SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 8 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 OPA333AIDBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 OPA333AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 OPA333AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 OPA333AIDCKR SC70 DCK 5 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 OPA333AIDCKT SC70 DCK 5 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 OPA333AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Sep-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2333AIDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 OPA2333AIDGKT VSSOP DGK 8 250 364.0 364.0 27.0 OPA2333AIDR SOIC D 8 2500 367.0 367.0 35.0 OPA2333AIDRBR SON DRB 8 3000 367.0 367.0 35.0 OPA2333AIDRBT SON DRB 8 250 210.0 185.0 35.0 OPA333AIDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 OPA333AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 OPA333AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 OPA333AIDCKR SC70 DCK 5 3000 203.0 203.0 35.0 OPA333AIDCKT SC70 DCK 5 250 203.0 203.0 35.0 OPA333AIDR SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated