To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. HAT2197R Silicon N Channel Power MOS FET Power Switching REJ03G0061-0200Z Rev.2.00 Apr.02.2004 Features • • • • • High speed switching Capable of 4.5 V gate drive Low drive current High density mounting Low on-resistance RDS(on) = 5.3 mΩ typ. (at VGS = 10 V) Outline SOP-8 8 5 6 7 8 D D D D 4 G 3 1 2 4 1, 2, 3 Source 4 Gate 5, 6, 7, 8 Drain S S S 1 2 3 Rev.2.00, Apr.02.2004, page 1 of 7 5 7 6 HAT2197R Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel to ambient thermal impedance Channel temperature Storage temperature VGSS ID ID(pulse)Note1 IDR IAP Note 2 EAR Note 2 Pch Note3 θch-a Note3 Tch Tstg 30 ±20 16 128 16 16 25.6 2.5 50 150 –55 to +150 V V A A A A mJ W °C/W °C °C Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tch = 25°C, Rg ≥ 50 Ω 3. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s Electrical Characteristics (Ta = 25°C) Item Symbol Min Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage V(BR)DSS Body–drain diode reverse recovery time Typ Max Unit Test Conditions 30 — — V ID = 10 mA, VGS = 0 IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF — — 1.0 — — 22 — — — — — — — — — — — — — — — 5.3 6.8 38 2650 610 190 1.2 18 7.5 4.2 10 25 45 4.2 0.80 ± 0.1 1 2.5 6.7 9.9 — — — — — — — — — — — — 1.04 µA µA V mΩ mΩ S pF pF pF Ω nC nC nC ns ns ns ns V VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 8 A, VGS = 10 V Note4 ID = 8 A, VGS = 4.5 V Note4 ID = 8 A, VDS = 10 V Note4 VDS = 10 V VGS = 0 f = 1 MHz trr — 30 — ns IF = 16 A, VGS = 0 diF/ dt = 100 A/ µs Notes: 4. Pulse test Rev.2.00, Apr.02.2004, page 2 of 7 VDD = 10 V VGS = 4.5 V ID = 16 A VGS = 10 V, ID = 8 A VDD ≅ 10 V RL = 1.25 Ω Rg = 4.7 Ω IF = 16 A, VGS = 0 Note4 HAT2197R Power vs. Temperature Derating Maximum Safe Operation Area 500 4.0 10 µs I D (A) Pch (W) Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s 2.0 1.0 10 DC 10 PW Op era Drain Current Channel Dissipation 3.0 100 =1 0m tio 1 1m 0µ s s s n( PW Operation in this area is 0.1 limited by R DS(on) < 1Note 0s 4 ) Ta = 25°C 1 shot Pulse 0 50 100 150 Ambient Temperature 200 Ta (°C) 0.01 0.1 0.3 100 1 3 10 30 Drain to Source Voltage V DS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Transfer Characteristics Typical Output Characteristics 20 20 12 (A) V DS = 10 V Pulse Test 2.6 V ID 16 Pulse Test 2.5 V Drain Current Drain Current I D (A) 10 V 2.8 V 8 VGS = 2.4 V 4 16 12 Tc = 75°C 8 25°C 4 –25°C 2 4 6 Drain to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 200 Pulse Test 160 120 I D = 20 A 80 10 A 40 5A 0 0 8 10 V DS (V) 4 8 12 Gate to Source Voltage Rev.2.00, Apr.02.2004, page 3 of 7 16 V GS (V) 20 1 2 3 Gate to Source Voltage 5 4 V GS (V) Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 50 Drain to Source On State Resistance R DS(on) (m Ω) Drain to Source Voltage V DS(on) (mV) 0 20 VGS = 4.5 V 10 5 10 V 2 1 1 10 100 Drain Current I D (A) 1000 HAT2197R Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance R DS(on) (m Ω) Static Drain to Source on State Resistance vs. Temperature 12 Pulse Test I D = 20 A 10 5, 10 A 8 V GS = 4.5 V 6 5 A, 10 A, 20 A 10 V 4 2 -25 1000 Tc = –25°C 100 10 25°C 75°C 1 V DS = 10 V Pulse Test 0.1 0 25 50 75 100 125 150 Case Temperature Tc (°C) 0.3 Capacitance C (pF) Reverse Recovery Time trr (ns) 20 10 0.1 Ciss 3000 1000 Coss 300 100 Crss 30 di/dt = 100 A/µs VGS = 0, Ta = 25°C VGS = 0 f = 1 MHz 10 1 10 100 Reverse Drain Current I DR (A) 0 5 12 V DS 10 8 V DD = 25 V 10 V 5V 16 32 48 64 Gate Charge Qg (nC) Rev.2.00, Apr.02.2004, page 4 of 7 25 30 4 0 80 V GS = 10 V , VDS = 10 V Rg = 4.7 Ω, duty < 1 % Switching Time t (ns) V GS V GS (V) 16 30 20 1000 Gate to Source Voltage V DS (V) Drain to Source Voltage V DD = 25 V 10 V 5V 15 Switching Characteristics 20 I D = 16 A 10 Drain to Source Voltage V DS (V) Dynamic Input Characteristics 0 100 10000 50 20 30 10 Typical Capacitance vs. Drain to Source Voltage 100 40 3 Drain Current I D (A) Body–Drain Diode Reverse Recovery Time 50 1 100 t d(off) tr t d(on) 10 tf 1 0.1 1 Drain Current 10 I D (A) 100 HAT2197R Maximum Avalanche Energy vs. Channel Temperature Derating Reverse Drain Current vs. Source to Drain Voltage Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current I DR (A) 20 10 V 16 V GS = 0 V 5V 12 8 4 Pulse Test 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 50 I AP = 16 A V DD = 15 V duty < 0.1 % Rg > 50 Ω 40 30 20 10 0 25 V SD (V) 50 75 100 125 150 Channel Temperature Tch (°C) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 10 1 D=1 0.5 0.1 0.01 0.001 0.2 0.1 0.05 θ ch - f(t) = γ s (t) x θ ch - f θ ch - f = 83.3°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) 0.02 0.01 1s h p ot uls e PDM D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 Pulse Width PW (s) Rev.2.00, Apr.02.2004, page 5 of 7 10 100 1000 10000 HAT2197R Avalanche Test Circuit Avalanche Waveform EAR = L V DS Monitor 1 2 L • IAP2 • VDSS VDSS - V DD I AP Monitor V (BR)DSS I AP Rg V DS VDD D. U. T ID Vin 15 V 50Ω 0 VDD Switching Time Test Circuit Vout Monitor Vin Monitor Rg Switching Time Waveform 90% D.U.T. RL Vin Vout Vin 10 V 10% 10% V DS = 10 V 90% td(on) Rev.2.00, Apr.02.2004, page 6 of 7 10% tr 90% td(off) tf HAT2197R Package Dimensions As of January, 2003 Unit: mm 3.95 4.90 5.3 Max 5 8 *0.22 ± 0.03 0.20 ± 0.03 4 1.75 Max 1 0.75 Max + 0.10 6.10 – 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.14 – 0.04 1.27 + 0.11 0˚ – 8˚ + 0.67 0.60 – 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Ordering Information Part Name Quantity Shipping Container HAT2197R-EL-E 2500pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00, Apr.02.2004, page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. 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