ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER FEATURES GENERAL DESCRIPTION • 16 small swing DCM outputs The ICS8501 is a low skew, 1-to-16 Differential Current Mode Fanout Buffer and a member of HiPerClockS™ the HiPerClockS family of High Performance Clock Solutions from ICS. The ICS8501 is designed to translate any differential signal levels to small swing differential current mode(DCM) output levels. An external reference resistor is used to set the value of the current supplied to an external load load/termination resistor. The load resistor value is chosen to equal the value of the characteristic line impedance of 50Ω. The ICS8501 is characterized at an operating supply voltage of 3.3V. ,&6 • Translates any differential input signal(PECL, HSTL, LVDS, DCM) to DCM levels without external bias networks • Translates single ended input levels to DCM levels with a resistor bias network on the nCLK input • Translates single ended input levels to inverted DCM levels with a resistor bias network on the CLK input • Voh(max) = 1.2V • 40% of Voh ≤ Vcrossover ≤ 60% of Voh The small swing outputs, accurate crossover voltage and duty cycle makes the ICS8501 ideal for interfacing to todays most advanced microprocessors. • 45% ≤ Duty Cycle ≤ 55% • Output frequency up to 500MHz • 100ps output skew • 3.3V operating supply • 48 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm package body, 0.5mm package lead pitch • 0°C to 70°C ambient operating temperature BLOCK DIAGRAM PIN A SSIGNMENT Q0 nQ0 Q15 nQ15 Q1 nQ1 Q14 nQ14 Q2 nQ2 Q13 nQ13 Q3 nQ3 Q12 nQ12 Q4 nQ4 Q11 nQ11 Q5 nQ5 Q10 nQ10 Q6 nQ6 Q9 nQ9 Q7 nQ7 Q8 nQ8 VCC Q11 nQ11 Q10 nQ10 GND Q9 nQ9 Q8 nQ8 VCC nc 48 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 24 ICS8501 CLK VCC nQ0 Q0 nQ1 Q1 GND nQ2 Q2 nQ3 Q3 VCC VCC nQ4 Q4 nQ5 Q5 GND nQ6 Q6 nQ7 Q7 VCC RREF 8501 nCLK VCC Q15 nQ15 Q14 nQ14 GND Q13 nQ13 Q12 nQ12 VCC CLK nCLK 48-Lead LQFP Y Package Top View www.icst.com 1 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER TABLE 1. PIN DESCRIPTIONS Number 1, 11, 14, 24, 25, 35, 38, 48 Name Ty pe Description VCC Pow er Pow er supply pin. Connect to 3.3V. 2, 3 Q11, nQ11 Output Differential output. Differential current mode interface levels. 4, 5 Q10, nQ10 Output Differential output. Differential current mode interface levels. 6, 19, 30, 43 GND Pow er Pow er supply pin. Connect to ground. 7, 8 Q9, nQ9 Output Differential output. Differential current mode interface levels. 9, 10 Q8, nQ8 Output Differential output. Differential current mode interface levels. 12 nc Unused 13 RREF Input 15, 16 Q7, nQ7 Output No connection. Reference current input. Used to set the output current. Connect to 475Ω resistor to ground. Differential output. Differential current mode interface levels. 17, 18 Q6, nQ6 Output Differential output. Differential current mode interface levels. 20, 21 Q5, nQ5 Output Differential output. Differential current mode interface levels. 22, 23 Q4, nQ4 Output Differential output. Differential current mode interface levels. 26, 27 Q3, nQ3 Output Differential output. Differential current mode interface levels. 28, 29 Q2, nQ2 Output Differential output. Differential current mode interface levels. 36 CLK Input Non inverting differential clock input. Any differential input interface levels. 37 nCLK Input Inverting differential clock input. Any differential input interface levels. 39, 40 Q15, nQ15 Output Differential output. Differential current mode interface levels. 41, 42 Q14, nQ14 Output Differential output. Differential current mode interface levels. 44, 45 Q13, nQ13 Output Differential output. Differential current mode interface levels. 46, 47 Q12, nQ12 Output Differential output. Differential current mode interface levels. TABLE 2. PIN CHARACTERISTICS Sy mbol Parameter CIN Input Capacitance Pow er Dissipation Capacitance (per output) Output Impedance CPD ROUT Test Conditions VCC = 3.465V, f=250MHz Minimum Ty pical Maximum Units 2 pF 4.6 pF 14 KΩ TABLE 3. FUNCTION TABLE Inputs Outputs CLK nCLK Q0 thru Q15 nQ0 thru nQ15 0 1 0 1 Input to Output Mode Polarity Differential to Differential Non Inverting 1 0 1 0 Differential to Differential Non Inverting 0 Biased; NOTE 1 0 1 Single Ended to Differential Non Inverting 1 Biased; NOTE 1 1 0 Single Ended to Differential Non Inverting Biased; NOTE 1 0 1 0 Single Ended to Differential Inverting Biased; NOTE 1 1 0 1 Single Ended to Differential Inverting NOTE 1: Single ended use requires that one of the differential inputs be biased. The voltage at the biased input sets the sw itch point for the single ended input. For LVCMOS and LVTTL levels the recommended input bias netw ork is a resistor to VCC, a resistor of equal value to ground and a 0.1µF capacitor from the input to ground. The resulting sw itch point is approximately VCC/2 ± 300mV. 8501 www.icst.com 2 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER A BSOLUTE MAXIMUM RATINGS Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature 4.6V -0.5V to VCC+0.5 V -0.5V to VCC+0.5V 0°C to 70°C -65°C to 150°C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4. DC ELECTRICAL CHARACTERISTICS, VCC = 3.3V±5%, TA = 0°C TO 70°C Sy mbol Parameter VCC Operating Supply Voltage Test Conditions VPP Peak-to-Peak Input Voltage VCMR Common Mode Input Voltage; NOTE 1 IIH Input High Current CLK, nCLK VIN = VCC CLK, nCLK VIN = 0V IIL Input Low Current ICC Operating Supply Current IOH Output Current; NOTE 2 VOH Output High Voltage Minimum Ty pical Maximum Units 3.135 3.3 3.465 V 0.31 1.3 V LVPECL Levels 1.8 2.4 V DCM, HSTL, LVDS, SSTL Levels 0.31 1.3 V 5 µA 70 mA -5 µA 3.135V ≤ VCC ≤ 3.465V 11 14 17 mA RREF = 475Ω , RLOAD = 50Ω 0.6 0.71 1.2 V VOL Output Low Voltage RREF = 475Ω , RLOAD = 50Ω 0 0.05 V NOTE 1: Common mode input voltage for LVPECL is defined as the minimum VIH. The LVPECL values noted in Table 4A are for VCC = 3.3V. VCMR for LVPECL w ill vary 1:1 w ith VCC. Common mode input voltage for DCM, HSTL, LVDS and SSTL is defined as the crossover voltage. See Figure 1A and 1B. NOTE 2: IOH is the current per output being supplied to the load and should be included in the total supply current calculation. Therefore ICC(total) is equal to IOH times 16 plus ICC. TABLE 5. AC ELECTRICAL CHARACTERISTICS, VCC = 3.3V±5%, TA = 0°C TO 70°C Sy mbol Parameter tpLH Propagation Delay, Low -to-High Test Conditions Measured at the -3dB rolloff of the peak-to-peak output voltage 0 < f ≤ 250MHz fMAX Maximum Input Frequency tpHL Propagation Delay, High-to-Low 0 < f ≤ 250MHz tsk(o) Output Skew ; NOTE 3 Measured on at VOX Measured on at VOX Minimum Ty pical Maximum Units 500 MHz 2 3 ns 2 3 ns 100 ps tsk(pp) Part-to-Part Skew ; NOTE 4 650 ps tR Output Rise Time 20% to 80% 175 700 ps tF Output Fall Time 20% to 80% Output Pulse Width 700 tCY CLE/2 + 0.3 60% VOH ps tPW 175 tCY CLE/2 - 0.3 40% VOH VOX NOTE 1: NOTE 2: NOTE 3: NOTE 4: 8501 tCY CLE/2 ns Output Crossover Voltage V All parameters measured at 250MHz unless noted otherw ise. RREF equals 475Ω . Outputs terminated w ith 50Ω resistor connected to ground. Defined as skew across outputs at the same supply voltages and w ith equal load conditions. Defined as skew at different outputs on different devices operating at the same supply voltages and w ith equal load conditions. www.icst.com 3 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER FIGURE 1A, 1B, 1C - INPUT CLOCK WAVEFORMS VCC CLK CROSS POINTS VPP VCMR nCLK GND FIGURE 1A - DCM, LVDS, HSTL, SSTL DIFFERENTIAL INPUT LEVELS VCC CLK CROSS POINTS VPP VCMR nCLK GND FIGURE 1B - LVPECL DIFFERENTIAL INPUT LEVEL VCC CLK or nCLK GND FIGURE 1C- LVCMOS AND LVTTL SINGLE ENDED INPUT LEVEL 8501 www.icst.com 4 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. FIGURE 2A LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER - TIMING WAVEFORMS CLK Vpp nCLK tPHL tPLH Q0 thru Q15 nQ0 thru nQ15 FIGURE 3A - PROPAGATION DELAYS fin = 250MHz, Vpp = 300mV, tr = tf = 200ps FIGURE 3A - OUTPUT SKEW DEFINITION & WAVEFORMS Output Skew - Skew between any outputs. Outputs operating at the same temperature, supply voltages and with equal load conditions. CLK Vpp nCLK Q0 CROSS POINTS nQ0 tsk(o) tsk(o) Q1 thru Q15 CROSS POINTS nQ1 thru nQ15 FIGURE 3A - OUTPUT SKEW fin = 250MHz, Vpp = 300mV, tr = tf = 200ps 8501 www.icst.com 5 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER FIGURE 3B - PART-TO-PART SKEW DEFINITION & WAVEFORMS Part-to-Part Skew - Skew between any outputs on different parts. Outputs operating at the same temperature, supply voltages and with equal load conditions. CLK Vpp nCLK PART 1 Q0 CROSS POINTS nQ0 PART 2 tsk(o) tsk(o) Q1 thru Q15 CROSS POINTS nQ1 thru nQ15 FIGURE 3B - PART-TO-PART SKEW fin = 250MHz, Vpp = 300mV, tr = tf = 200ps 8501 www.icst.com 6 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER PACKAGE OUTLINE AND DIMENSIONS - Y SUFFIX e /2 NOTE 4 D NOTE 5, 7 D1 D/2 NOTE 3 -D- -A, B, OR -D- D1/2 b NOTE 3 -B- NOTE 3 -A- E1 -A, B, OR -D- N O T E 4 E/2 N/4 T IPS 0.20 C A-B D 4X E N O T E 5, 7 e E1/2 SEE DETAIL “A” 8 PLACES 11 / 13° A -H- NOT E 2 / / 0.10 C ccc -CSEE DETAIL “B” NOTE 9 ddd M C A-B S D S 0.09 / 0.20 S Y M B O L WIT H LEAD FINISH b NOTES: 1. ALL DIMENSIONS AND TOLERANCING CONFORM TO ANSI Y14.5-1982 2. DATUM PLANE -H- LOCATED AT MOLD PARTING LINE AND COINCIDENT WITH LEAD, WHERE LEAD EXITS PLASTIC BODY AT BOTTOM OF PARTING LINE. 3. DATUMS A-B AND -D- TO BE DETERMINED AT CENTERLINE BETWEEN LEADS WHERE LEADS EXIT PLASTIC AT DATUM PLANE -H- . 4. TO BE DETERMINED AT SEATING PLACE -C- . 5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. 6. “N” IS THE TOTAL NUMBER OF TERMINALS. 7. THESE DIMENSIONS TO BE DETEREMINED AT DATUM PLANE -H-. 8. PACKAGE TOP DIMENSIONS ARE SMALLER THAN BOTTOM DIMENSIONS AND TOP OF PACKAGE WILL NOT OVERHANG BOTTOM OF PACKAGE. 9. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08mm TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 10. CONTROLLING DIMENSION: MILLIMETER. 11. THIS OUTLINE CONFORMS TO JEDEC PUBLIBCATION 95 REGISTRATION MS-026, VARIATION BBC. 12. A1 IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT OF THE PACKAGE. 0.09 / 0.16 JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS BBC MIN. NOM. A b1 BASE METAL 0° MIN. - 0.05 S A2 0.08/0.20 R. DATUM PLANE -H- 0.05 A2 1.35 0.08 R. MIN. 0.20 MIN. L 1.00 REF. 8501 www.icst.com 7 12 1.45 D 9.00 BSC. 4 7.00 BSC. 7, 8 E 9.00 BSC. 4 E1 7.00 BSC. 7, 8 0.45 0.60 0.75 48 N 0° - 7 ° 0.15 1.40 D1 e A1 MAX. 1.60 A1 L 0.25 GAUGE PLANE N O T E 0.5 BSC. b 0.17 0.22 0.27 b1 0.17 0.20 0.23 ccc 0.08 ddd 0.08 9 REV. A - AUGUST 23, 2000 ICS8501 Integrated Circuit Systems, Inc. LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER ORDERING INFORMATION Part/Order Number Marking Package Count ICS8501BY ICS8501BY 48 Lead LQFP 250 per tray Temperature 0°C to 70°C ICS8501BY T ICS8501BY 48 Lead LQFP on Tape and Reel 2000 0°C to 70°C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8501 www.icst.com 8 REV. A - AUGUST 23, 2000