® INA155 INA 155 INA 155 For most current data sheet and other product information, visit www.burr-brown.com Single-Supply, Rail-to-Rail Output, CMOS INSTRUMENTATION AMPLIFIER FEATURES APPLICATIONS ● RAIL-TO-RAIL OUTPUT SWING: Within 10mV ● INDUSTRIAL SENSOR AMPLIFIERS Bridge, RTD, Thermocouple, Flow, Position ● LOW OFFSET VOLTAGE: ±200µV ● LOW OFFSET DRIFT: ±5µV/°C ● MEDICAL EQUIPMENT ECG, EEG, EMG Amplifiers ● INTERNAL FIXED GAIN = 10V/V OR 50V/V ● SPECIFIED TEMPERATURE RANGE: –55°C to +125°C ● DRIVING A/D CONVERTERS ● PCMCIA CARDS ● LOW INPUT BIAS CURRENT: 0.2pA ● WIDE BANDWIDTH: 550kHz in G = 10 ● AUDIO PROCESSING ● COMMUNICATIONS ● HIGH SLEW RATE: 6.5V/µs ● LOW COST ● TEST EQUIPMENT ● LOW COST AUTOMOTIVE INSTRUMENTATION ● SO-8 AND TINY MSOP-8 PACKAGES DESCRIPTION The INA155 is a low-cost CMOS instrumentation amplifier with rail-to-rail output swing optimized for low voltage, single-supply operation. Gain can be set to 10V/V or 50V/V by pin strapping. Gains between these two values can be obtained with the addition of a single resistor. The INA155 is fully specified over the supply range of +2.7 to +5.5V. Wide bandwidth (550kHz in G = 10) and high slew rate (6.5V/µs) make the INA155 suitable for driving sampling A/D converters as well as general purpose and audio applications. Fast settling time allows use with higher speed sensors and transducers and rapid scanning data acquisition systems. RG The INA155 is available in MSOP-8 and SO-8 surface-mount packages. Both are specified for operation over the temperature range –55°C to 125°C. G = 10 pins open G = 50 pins connected 1 V+ RG 8 7 INA155 5kΩ Ref 5 200kΩ 5kΩ 22.2kΩ 22.2kΩ 200kΩ + – VO = (VIN – VIN) • G + VREF – VIN 2 V+ 3 A1 6 A2 VO IN 4 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ©1999 Burr-Brown Corporation SBOS114 PDS-1529B Printed in U.S.A. February, 2000 SPECIFICATIONS: VS = +2.7V to +5.5V Boldface limits apply over the specified temperature range, TA = –40°C to +85°C At TA = +25°C, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. INA155E, U PARAMETER CONDITION INPUT Offset Voltage, RTI Over Temperature Drift vs Power Supply Over Temperature vs Time VOS dVOS/dT PSRR MIN INA155EA, UA TYP VS = +5.0V, VCM = VS/2 ±0.2 VS = +2.7V to +6V, VCM = 0.2 • VS ±5 ±50 MAX MIN ±1 TYP MAX UNITS ✽ ✽ ✽ mV mV µV/°C µV/V µV/V µV/mo ±1.5 ✽ ✽ ±200 ±250 ±0.4 ✽ ✽ ✽ INPUT VOLTAGE RANGE Safe Input Voltage Common-Mode Range(1) Common-Mode Rejection Ratio Over Temperature VCM CMRR VS = 5.5V VS = 2.7V VS = 5.5V, 0.6V < VCM < 3.7V, G = 10 VS = 5.5V, 0.6V < V CM < 3.7V, G = 50 Over Temperature (V–) – 0.5 0.3 0.2 92 85 86 (V+) + 0.5 5.2(2) 2.5(2) 100 90 85 INPUT IMPEDANCE Differential Common-Mode ✽ ✽ ✽ 80 79 77 NOISE, RTI Voltage Noise: f = 0.1Hz to 10Hz Voltage Noise Density: f = 10Hz f = 100Hz f = 1kHz Current Noise: f = 1kHz ✽ ✽ Ω || pF Ω || pF ✽ ✽ VS = 5.5V, VO = 0.05V to 5.45V, G = 50 vs Temperature Nonlinearity Over Temperature OUTPUT Voltage Output Swing from Rail Over Temperature Short-Circuit Current Capacitance Load (stable operation) FREQUENCY RESPONSE Bandwidth, –3dB BW Slew Rate Settling Time: 0.1% SR tS 0.01% 10 50 G = 10 + 400kΩ/(10kΩ + RG) ±0.02 ±0.1 ±2 ±10 ±0.05 ±0.25 ±15 ±30 ✽ ✽ ✽ ✽ ✽ ✽ VS = 5.5V, G = 10 or 50 ±0.005 RL = 10kΩ, GERR < 0.1% 5 Short Circuit to Ground ±50 See Typical Curve ✽ ✽ G = 10 G = 50 VS = 5.5V, CL = 100pF VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 50% Input Overload 550 110 6.5 5 11 8 15 0.2 See Typical Curve ✽ ✽ ✽ ✽ ✽ ✽ ✽ ✽ ✽ THD+N POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current Over Temperature ✽ +2.7 VIN = 0, IO = 0 VIN = 0, IO = 0 –40 –65 –65 ✽ ✽ ✽ % of FSR % of FSR 10 10 ✽ ✽ ✽ mV mV mA ✽ kHz kHz V/µs µs µs µs µs µs ✽ ✽ ✽ 2.1 2.6 +85 +150 +150 ✽ ✽ ✽ θJA 150 150 ✽ ✽ ✽ ✽ V/V V/V % ppm/°C % ppm/°C ±0.015 ±0.015 +5.5 +2.5 to +6 1.7 pA pA µV/Vp-p nV/√Hz nV/√Hz nV/√Hz fA/√Hz ✽ ✽ ✽ ✽ ✽ 4.5 260 99 40 2 VS = 5.5V, VO = 0.01V to 5.49V, G = 10 TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance MSOP-8 Surface Mount SO-8 Surface Mount ±10 ±10 V V V dB dB dB dB RS = 0Ω, G = 10 or 50 GAIN Gain Equation Gain Error(3) vs Temperature Overload Recovery Total Harmonic Distortion + Noise ✽ ✽ ✽ ±1 ±1 IB IOS ✽ 76 1013 || 3 1013 || 3 INPUT BIAS CURRENT Input Bias Current Offset Current ✽ ✽ ✽ ✽ ✽ ✽ ✽ V V mA mA ✽ ✽ ✽ °C °C °C °C/W °C/W ✽ Same as INA155E, U. NOTES: (1) For further information, refer to typical performance curves on common-mode input range. (2) Operation above (V+) – 1.8V (max) results in reduced common-mode rejection. See discussion and Figure 6 in the text of this data sheet. (3) Does not include error and TCR of additional optional gain-setting resistor in series with RG, if used. ® INA155 2 SPECIFICATIONS: VS = +2.7V to +5.5V Boldface limits apply over the specified temperature range, TA = –55°C to +125°C At TA = +25°C, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. INA155E, U PARAMETER CONDITION INPUT Offset Voltage, RTI Over Temperature Drift vs Power Supply Over Temperature vs Time VOS dVOS/dT PSRR MIN INA155EA, UA TYP MAX VS = +5.0V, VCM = VS/2 ±0.2 VS = +2.7V to +6V, VCM = 0.2 • VS ±5 ±50 ±1 ±2 MIN MAX UNITS ✽ ✽ ✽ mV mV µV/°C µV/V µV/V µV/mo ✽ ✽ ±200 ±250 ±0.4 TYP ✽ ✽ ✽ INPUT VOLTAGE RANGE Safe Input Voltage Common-Mode Range(1) Common-Mode Rejection Ratio Over Temperature VCM CMRR VS = 5.5V VS = 2.7V VS = 5.5V, 0.6V < VCM < 3.7V, G = 10 VS = 5.5V, 0.6V < V CM < 3.7V, G = 50 Over Temperature (V–) – 0.5 0.3 0.2 92 82 86 ✽ ✽ ✽ ✽ ✽ 76 ±10 ±10 ✽ ✽ Ω || pF Ω || pF ✽ ✽ RS = 0Ω, G = 10 or 50 10 50 G = 10 + 400kΩ/(10kΩ + RG) ±0.02 ±0.1 ±2 ±10 ±0.05 ±0.25 ±15 ±30 VS = 5.5V, VO = 0.01V to 5.49V, G = 10 VS = 5.5V, VO = 0.05V to 5.45V, G = 50 vs Temperature Nonlinearity Over Temperature OUTPUT Voltage Output Swing from Rail Over Temperature Short-Circuit Current Capacitance Load (stable operation) FREQUENCY RESPONSE Bandwidth, –3dB BW Slew Rate Settling Time: 0.1% SR tS 0.01% ✽ ✽ ✽ ✽ ✽ ✽ VS = 5.5V, G = 10 or 50 ±0.005 RL = 10kΩ, GERR < 0.1% 5 Short Circuit to Ground ±50 See Typical Curve ✽ ✽ G = 10 G = 50 VS = 5.5V, CL = 100pF VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 50% Input Overload 550 110 6.5 5 11 8 15 0.2 See Typical Curve ✽ ✽ ✽ ✽ ✽ ✽ ✽ ✽ ✽ THD+N POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current Over Temperature ✽ +2.7 VIN = 0, IO = 0 VIN = 0, IO = 0 –55 –65 –65 ✽ ✽ ✽ % of FSR % of FSR 10 10 ✽ ✽ ✽ mV mV mA ✽ kHz kHz V/µs µs µs µs µs µs ✽ ✽ ✽ 2.1 2.8 +125 +150 +150 ✽ ✽ ✽ θJA 150 150 ✽ ✽ ✽ ✽ V/V V/V % ppm/°C % ppm/°C ±0.015 ±0.015 +5.5 +2.5 to +6 1.7 pA pA µV/Vp-p nV/√Hz nV/√Hz nV/√Hz fA/√Hz ✽ ✽ ✽ ✽ ✽ 4.5 260 99 40 2 V V V dB dB dB dB ✽ ✽ ±1 ±1 IB IOS GAIN Gain Equation Gain Error(3) vs Temperature TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance MSOP-8 Surface Mount SO-8 Surface Mount 90 ✽ ✽ ✽ 80 78 77 1013 || 3 1013 || 3 NOISE, RTI Voltage Noise: f = 0.1Hz to 10Hz Voltage Noise Density: f = 10Hz f = 100Hz f = 1kHz Current Noise: f = 1kHz Overload Recovery Total Harmonic Distortion + Noise 100 84 INPUT IMPEDANCE Differential Common-Mode INPUT BIAS CURRENT Input Bias Current Offset Current (V+) + 0.5 5.2(2) 2.5(2) ✽ ✽ ✽ ✽ V V mA mA ✽ ✽ ✽ °C °C °C °C/W °C/W ✽ Same as INA155E, U. NOTES: (1) For further information, refer to typical performance curves on common-mode input range. (2) Operation above (V+) – 1.8V (max) results in reduced common-mode rejection. See discussion and Figure 6 in the text of this data sheet. (3) Does not include error and TCR of additional optional gain-setting resistor in series with RG, if used. ® 3 INA155 ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATION Top View SO-8 (U), MSOP-8 (E) RG 1 V– 8 RG IN 2 V+ 7 V+ IN 3 6 VOUT V– 4 5 Ref This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. INA155 ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– ................................................................... 7.5V Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V Current(2) .................................................... 10mA Output Short-Circuit(3) .............................................................. Continuous Operating Temperature .................................................. –65°C to +150°C Storage Temperature ..................................................... –65°C to +150°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode-clamped to the power supply rails. Input signals that can swing more that 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short circuit to ground. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER INA155U " INA155UA " INA155E " INA155EA " SO-8 " SO-8 " MSOP-8 " MSOP-8 " 182 " 182 " 337 " 337 " SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(1) TRANSPORT MEDIA –55°C to " –55°C to " –55°C to " –55°C to " INA155U " INA155UA " A55 " A55 " INA155U INA155U/2K5 INA155UA INA155UA/2K5 INA155E/250 INA155E/2K5 INA155EA/250 INA155EA/2K5 Rails Tape and Reel Rails Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel +125°C +125°C +125°C +125°C NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA155UA/2K5” will get a single 2500-piece Tape and Reel. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA155 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. COMMON-MODE REJECTION RATIO vs FREQUENCY GAIN vs FREQUENCY 120 40 G = 10 35 100 30 G = 50 80 CMRR (dB) Gain (dB) 25 20 G =10 15 G = 50 60 40 10 20 5 0 0 1 10 100 1k 10k 100k 1M 0.1 10M 1 10 100 POWER SUPPLY REJECTION RATIO vs FREQUENCY 10k 100k MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 100 6 Maximum Output Voltage (Vp-p) 90 80 70 60 50 40 30 20 10 5 4 3 2 1 VS = 5.5V 0 0 1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) SHORT-CIRCUIT CURRENT AND QUIESCENT CURRENT vs POWER SUPPLY QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 55 1.8 2.5 1.75 2.0 100 –ISC 50 –ISC 80 +ISC +ISC 1.7 45 IQ 35 1.6 30 1.55 2.5 3 3.5 4.0 4.5 5 5.5 60 IQ 1.0 40 0.5 20 0 1.5 25 IQ (mA) 1.65 40 IQ (mA) ISC (mA) 1.5 0 75 6 Short-Circuit Current (mA) PSRR (dB) 1k Frequency (Hz) Frequency (Hz) –50 –25 0 25 50 75 100 125 150 Temperature (°C) Supply Voltage (V) ® 5 INA155 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY INPUT VOLTAGE AND CURRENT NOISE DENSITY vs FREQUENCY 10k 1 100 10 in 100 1 RL = 2kΩ 0.1 THD+N (%) 1k Current Noise (fA/√Hz) Voltage Noise (nV/√Hz) RL = 600Ω en G = 50 RL = 600Ω RL = 10kΩ 0.01 G = 10 RL = 2kΩ 10 0.1 10 1 100 1k 10k RL =10kΩ 0.001 0.1 100k 10 100 1k 10k Frequency (Hz) Frequency (Hz) 0.1Hz TO 10Hz VOLTAGE NOISE INPUT BIAS CURRENT vs TEMPERATURE 10k 1µV/div Input Bias Current (pA) 1k 100 10 1 Input-Referred 0.1 –75 500ms/div –50 –25 0 25 50 75 100 125 150 125 150 Temperature (°C) SLEW RATE vs POWER SUPPLY SLEW RATE vs TEMPERATURE 10 7 9 8 6 Slew Rate (V/µs) Slew Rate (Vµs) 6.5 5.5 5 7 6 5 4 3 2 4.5 1 0 4 2.5 3 3.5 4 4.5 5 5.5 75 6 ® INA155 –50 –25 0 25 50 Temperature (°C) Supply Voltage (V) 6 75 100 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION OFFSET VOLTAGE PRODUCTION DISTRIBUTION 18 14 16 Percent of Amplifiers (%) Percent of Amplifiers (%) 12 10 8 6 4 2 14 12 10 8 6 4 2 0 –1 –0.9 –0.8 –0.7 –0.6 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 –20 –18 –16 –14 –12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 16 18 20 0 Offset Voltage Drift (µV/°C) Offset Voltage (mV) SETTLING TIME vs LOAD CAPACITANCE OVERSHOOT vs LOAD CAPACITANCE 20 60 18 12 Overshoot (%) 14 0.1%, G = 50 10 0.01%, G = 10 8 6 0.1%, G = 10 40 G = 10 30 20 G = 50 4 10 2 0 0 10 100 1k 10k 10 Load Capacitance (pF) 100 1k 10k Load Capacitance (pF) SMALL-SIGNAL STEP RESPONSE G = 10, CL = 100pF, RL = 10kΩ SMALL-SIGNAL STEP RESPONSE G = 50, CL = 100pF, RL = 10kΩ 100mV/div 100mV/div Settling Time (µs) 50 0.01%, G = 50 16 5µs/div 5µs/div ® 7 INA155 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE G = 10, G = 50, CL = 100pF, RL = 10kΩ 2mV/div 1V/div 1V/div COMMON-MODE REJECTION AT 60Hz 1µs/div 5ms/div INPUT COMMON-MODE RANGE vs REFERENCE VOLTAGE, G = 10 INPUT COMMON-MODE RANGE vs OUTPUT VOLTAGE, G = 50 6 6 G = 50 5 4 4 VCM (V) 5 3 2 3 Ref = 0V Ref = 2.75V Ref = 5.5V 2 0.9V– + 0.1VREF < VCM < 0.9V+ + 0.1Ref 1 0.9V– + 0.04VOUT + 0.06Ref < VCM < 0.9V+ + 0.04VOUT + 0.06Ref 1 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 VREF (V) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 5 4 +125°C –55°C +25°C 3 2 +125°C –55°C +25°C 1 0 0 10 20 30 40 50 60 Output Current (mA) ® INA155 2 2.5 3 VOUT (V) Output Voltage (V) VCM (V) G = 10 8 70 80 90 100 3.5 4 4.5 5 5.5 APPLICATIONS INFORMATION OPERATING VOLTAGE Figure 1 shows the basic connections required for operation of the INA155. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. The INA155 is fully specified and guaranteed over the supply range +2.7V to +5.5V, with key parameters guaranteed over the temperature range of –55°C to +125°C. Parameters that vary significantly with operating voltages, load conditions or temperature are shown in the Typical Performance Curves. The output is referred to the output reference terminal, Ref, which is normally set to VS/2. This must be a low-impedance connection to ensure good common-mode rejection. A resistance of 200Ω in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMRR. The INA155 can be operated from either single or dual power supplies. By adjusting the voltage applied to the reference terminal, the input common-mode voltage range and the output range can be adjusted within the bounds shown in the Typical Performance Curves. Figure 2 shows a bridge amplifier circuit operated from a single +5V power supply. The bridge provides a relatively small differential voltage on top of an input common-mode voltage near 2.5V. In addition, for the G = 50 configuration, the connection between pins 1 and 8 must be low-impedance. A connection impedance of 20Ω can cause a 0.2% shift in gain error. External Resistor RG: 10 < G < 50 V+ Gain Pins Connected: G = 50 0.1µF Gain Pins Open: G = 10 1 7 G = 10 + 8 5kΩ Ref – VIN V+ 5 200kΩ DESIRED GAIN (V/V) RG (Ω) 10 20 30 40 50 Open 30k 10k 3.3k Short 5kΩ 22.2kΩ 400kΩ 10kΩ + RG 22.2kΩ 200kΩ A1 2 6 A2 3 + – VOUT = (VIN – VIN ) • G + VREF IN Also drawn in simplified form: V+ INA155 4 + VIN 3 1 0.1µF Single Supply – VIN Dual Supply 7 4 V– V– VOUT 5 8 2 6 INA155 Ref FIGURE 1. Basic Connections. +5V (2) Bridge Sensor + VIN 3 1 V– IN 7 INA155 VOUT = 0.01V to 4.99V 4 8 2 6 5 NOTES: (1) VREF should be adjusted for the desired output level, keeping in mind that the value of VREF affects the common-mode input range. See Typical Performance Curve. (2) For best performance, the common-mode input voltage should be kept away from the transition range of (V+) – 1.8V to (V+) –0.8V. VREF(1) FIGURE 2. Single-Supply Bridge Amplifier. ® 9 INA155 SETTING THE GAIN an optional circuit for trimming the output offset voltage. The voltage applied to the Ref terminal is added to the output signal. An op amp buffer is used to provide low impedance at the Ref terminal to preserve good commonmode rejection. Gain of 10 is achieved simply by leaving the two gain pins (1 and 8) open. Gain of 50 is achieved by connecting the gain pins together directly. In the G = 10 configuration, the gain error is less than 0.1%. In the G = 50 configuration, the gain error is less than 0.25%. INPUT BIAS CURRENT RETURN Gain can be set to any value between 10 and 50 by connecting a resistor RG between the gain pins according to the following equation: 10 + 400kΩ/(10kΩ + RG) The input impedance of the INA155 is extremely high— approximately 1013Ω, making it ideal for use with high-impedance sources. However, a path must be provided for the input bias current of both inputs. This input bias current is less than 10pA and is virtually independent of the input voltage. (1) This is demonstrated in Figure 1 and is shown with the commonly used gains and resistor RG values. However, because the absolute value of internal resistors is not guaranteed, using the INA155 in this configuration will increase the gain error and gain error drift with temperature, as shown in Figure 3. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple in Figure 5). With higher source impedance, using two equal resistors provides a balanced input with advantages of lower input offset voltage due to bias current and better high-frequency common-mode rejection. 400 2.0 360 Gain Error Drift 1.6 320 1.4 280 1.2 250 200 1.0 0.8 160 Gain Error 0.6 120 0.4 80 0.2 40 Gain Error Drift (ppm/°C) 1.8 Gain Error (%) Input circuitry must provide a path for this input bias current for proper operation. Figure 5 shows various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential that exceeds the commonmode range and the input amplifier will saturate. 3 10 15 25 20 35 30 40 45 1 Microphone, Hydrophone, etc. 0 0 6 INA155 8 50 2 Gain (V/V) 5 47kΩ VREF VB(1) FIGURE 3. Typical Gain Error and Gain Error Drift with External Resistor. 3 OFFSET TRIMMING 1 Thermocouple The INA155 is laser trimmed for low offset voltage. In most applications, no external offset adjustment is required. However, if necessary, the offset can be adjusted by applying a correction voltage to the reference terminal. Figure 4 shows 6 INA155 8 2 5 10kΩ VREF Low-resistance thermocouple provides bias current return. VB(1) 3 1 3 +(2) VIN 6 INA155 8 1 6 INA155 8 –(2) VIN 2 5 2 VO VB(1) Ref(1) VREF Center-tap provides bias current return VEX OPA336 Bridge Sensor Adjustable Voltage 3 1 6 INA155 8 NOTES: (1) VREF should be adjusted for the desired output level. The value of VREF affects the common-mode input range. (2) For best performance, common-mode input voltage should be less than (V+) – 1.8V or greater than (V+) – 0.8V. 2 NOTE: (1) VB is bias voltage within common-mode range, dependent on VREF. FIGURE 4. Optional Trimming of Output Offset Voltage. 5 VREF Bridge resistance provides bias current return FIGURE 5. Providing an Input Common-Mode Current Path. ® INA155 5 10 INPUT COMMON-MODE RANGE 1.00 The input common-mode range of the INA155 for various operating conditions is shown the in Typical Performance Curves. The common-mode input range is limited by the output voltage swing of A1, an internal circuit node. For the G = 10 configuration, output voltage of A1 can be expressed as: Input Offset Voltage (mV) VOUTA1 = – 1/9VREF + (1 + 1/9) VIN– (2) Using this equation given that the output of A1 can swing to within 10mV of either rail, the input common-mode voltage range can be calculated. When the input common-mode range is exceeded (A1’s output is saturated), A2 can still be in linear operation and respond to changes in the non-inverting input voltage. However, the output voltage will be invalid. Transistion Region P-Channel Operation 0.80 0.60 N-Channel Operation 0.40 0.20 0.00 –0.20 –0.40 –0.60 VS = –1.8V –0.80 VS = 5.5V VS = –0.8V –0.100 0.0 1.5 2.0 0.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Common-Mode Voltage (V) FIGURE 6. Input Offset Voltage Changes with CommonMode Voltage. The common-mode range for the G = 50 configuration is included in the Typical Performance Curve, “Input Common-Mode Range vs Output Voltage.” V+ NOTE: Output is referred to V+. INPUT RANGE FOR BEST ACCURACY The internal amplifiers have rail-to-rail input stages, achieved by using complementary n- and p-channel input pairs. The common-mode input voltage determines whether the p-channel or the n-channel input stage is operating. The transition between the input stages is gradual and occurs between (V+) – 1.8V to (V+) – 0.8V. Due to these characteristics operating the INA155 with input voltages within the transition region of (V+) – 1.8V to (V+) – 0.8V results in a shift in input offset voltage and reduced common-mode and power supply rejection performance. Typical patterns of the offset voltage change throughout the input common-mode range are illustrated in Figure 6. The INA155 can be operated below or above the transition region with excellent results. Figure 7 demonstrates the use of the INA155 in a single-supply, high-side current monitor. In this application, the INA155 is operated above the transition region. 2 5 7 0.02Ω 1 50mV 6 INA155 4 8 3 IL 2.5A Load G = 10 Pins 1 and 8 Open FIGURE 7. Single-Supply, High-Side Current Monitor. RLIM RAIL-TO-RAIL OUTPUT 3 IOVERLOAD 10mA max A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For resistive loads greater than 10kΩ, the output voltage can swing to within a few millivolts of the supply rail while maintaining low gain error. For heavier loads and over temperature, see the typical performance curve “Output Voltage Swing vs Output Current.” The INA155’s low output impedance at high frequencies makes it suitable for directly driving Capacitive Digital-to-Analog (CDAC) input A/D converters, as shown in Figure 9. 1 8 6 INA155 VOUT 5 2 RLIM VREF FIGURE 8. Input Current Protection for Voltages Exceeding the Supply Voltage. +5V INPUT PROTECTION 3 Device inputs are protected by ESD diodes that will conduct if the input voltages exceed the power supplies by more than 500mV. Momentary voltages greater than 500mV beyond the power supply can be tolerated if the current on the input pins is limited to 10mA. This is easily accomplished with input resistors RLIM as shown in Figure 8. Many input signals are inherently current-limited to less than 10mA, therefore, a limiting resistor is not required. 1 7 5 8 2 6 INA155 4 ADS7818 or ADS7834 12-Bits fSAMPLE = 500kHz NOTE: G = 10 configuration FIGURE 9. INA155 Directly Drives Capacitive-Input, HighSpeed A/D Converter. ® 11 INA155 PACKAGE OPTION ADDENDUM www.ti.com 7-Nov-2014 PACKAGING INFORMATION Orderable Device Status (1) (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) INA155E/250 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 A55 INA155E/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 A55 INA155E/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR A55 INA155EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR A55 INA155EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR A55 INA155EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR A55 INA155EA/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR A55 INA155U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U INA155U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U INA155U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U INA155UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U A INA155UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U A INA155UA/2K5G4 ACTIVE SOIC D 8 TBD Call TI Call TI INA155UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U A INA155UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA 155U The marketing status values are defined as follows: Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 7-Nov-2014 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA155E/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA155E/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA155EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA155EA/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA155U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA155UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA155E/250 VSSOP DGK 8 250 210.0 185.0 35.0 INA155E/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 INA155EA/250 VSSOP DGK 8 250 210.0 185.0 35.0 INA155EA/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 INA155U/2K5 SOIC D 8 2500 367.0 367.0 35.0 INA155UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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