IDT IDT6168LA Cmos static ram 16k (4k x 4-bit) Datasheet

CMOS Static RAM
16K (4K x 4-Bit)
IDT6168SA
IDT6168LA
Features
◆
◆
◆
◆
◆
◆
◆
◆
High-speed (equal access and cycle time)
– Military: 25/45ns (max.)
– Industrial: 25ns (max.)
– Commercial: 15/20/25ns (max.)
Low power consumption
Battery backup operation—2V data retention voltage
(IDT6168LA only)
Available in high-density 20-pin ceramic or plastic DIP and
20-pin leadless chip carrier (LCC)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle
soft-error rates
Bidirectional data input and output
Military product compliant to MIL-STD-883, Class B
CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective approach for
high-speed memory applications.
Access times as fast 15ns are available. The circuit also offers a
reduced power standby mode. When CS goes HIGH, the circuit will
automatically go to, and remain in, a standby mode as long as CS remains
HIGH. This capability provides significant system-level power and cooling
savings. The low-power (LA) version also offers a battery backup data
retention capability where the circuit typically consumes only 1µW
operating off a 2V battery. All inputs and outputs of the IDT6168 are
TTL-compatible and operate from a single 5V supply.
The IDT6168 is packaged in either a space saving 20-pin, 300-mil
ceramic or plastic DIP or a 20-pin LCC providing high board-level
packing densities.
Military grade product is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to
military temperature applications demanding the highest level of
performance and reliability.
Description
The IDT6168 is a 16,384-bit high-speed static RAM organized
as 4K x 4. It is fabricated using lDT’s high-performance, high-reliability
Functional Block Diagram
A0
VCC
GND
ADDRESS
16,384-BIT
MEMORY ARRAY
DECODER
A11
I/O0
I/O1
I/O2
I/O CONTROL
INPUT
DATA
CONTROL
,
I/O3
CS
3090 drw 01
WE
FEBRUARY 2001
1
©2000 Integrated Device Technology, Inc.
DSC-3090/05
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Truth Table(1)
Pin Configurations
Mode
X
High-Z
Standby
19
Read
L
H
DOUT
Active
18
A10
Write
L
L
DIN
Active
17
A9
A8
NOTE:
1. H = VIH, L = VIL, X = Don't Care
I/O3
I/O2
I/O1
Absolute Maximum Ratings(1)
2
A5
A6
A7
CS
6
15
7
14
8
13
9
12
10
11
5
GND
16
Symbol
I/O0
WE
,
DIP/LCC
Top View
Pin Descriptions
Name
Description
A0 - A11
Address Inputs
CS
Chip Select
WE
Write Enable
I/O0 - I/O3
Data Input/Output
VCC
Power
GND
Ground
Rating
CI/O
I/O Capacitance
Unit
-0.5 to +7.0
-0.5 to +7.0
V
TA
Operating
Temperature
0 to +70
-55 to +125
o
C
TBIAS
Temperature
Under Bias
-55 to +125
-65 to +135
o
C
TSTG
Storage Temperature
-55 to +125
-65 to +150
o
C
PT
Power Dissipation
1.0
1.0
IOUT
DC Output Current
50
50
W
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect reliability.
Recommended DC Operating
Conditions
Capacitance (TA = +25°C, f = 1.0MHz)
Input Capacitance
Mil.
Terminal Voltage
with Respect
to GND
Symbol
CIN
Com'l.
3090 tbl 04
3090 tbl 01
Parameter(1)
3090 tbl 03
VTERM
3090 drw 02
Symbol
Power
H
20
4
Output
Standby
1
P20-1
D20-1
L20-1
WE
VCC
A11
A0
A1
A2
A3
A4
3
CS
Conditions
Max.
Unit
VIN = 0V
7
pF
VOUT = 0V
7
Parameter
VCC
Supply Voltage
GND
Ground
Min.
Typ.
Max.
Unit
4.5
5.0
5.5
V
0
0
0
V
6.0
V
0.8
V
VIH
Input High Voltage
2.2
____
VIL
Input Low Voltage
-0.5(1)
____
NOTE:
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
pF
3090 tbl 05
3090 tbl 02
NOTE:
1. This parameter is determined by device characterization, but is not production
tested.
Recommended Operating
Temperature and Supply Voltage
Grade
Temperature
O
O
GND
Vcc
Military
-55 C to +125 C
0V
5V ± 10%
Industrial
-45OC to +85OC
0V
5V ± 10%
0OC to +70OC
0V
5V ± 10%
Commercial
3090 tbl 06
2
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
DC Electrical Characteristics(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, V HC = VCC - 0.2V)
6168SA15
Power
Symbol
ICC1
ICC2
ISB
ISB1
Com'l.
Mil.
6168SA20
6168LA20
Com'l.
6168SA25
6168LA25
Mil.
Parameter
Operating Power Supply Current
CS < VIL, Outputs Open
V CC = Max., f = 0(2)
SA
110
____
LA
____
Dynamic Operating Current
CS < VIL, Outputs Open
V CC = Max., f = fMAX(2)
SA
6168SA45
6168LA45
Com'l.
& Ind.
Mil.
Com'l.
Mil.
90
100
____
100
80
Unit
90
____
____
70
____
70
80
____
145
____
120
____
110
120
____
110
LA
____
____
100
____
90
100
____
80
Standby Power Supply Current
(TTL Level)
CS > VIH, Outputs Open
V CC = Max., f = fMAX(2)
SA
55
____
45
____
35
45
____
35
LA
____
____
30
____
25
30
____
25
Full Standby Power Supply
Current (CMOS Level)
CS > VHC, VCC = Max.,
V IN < VLC or VIN > VHC, f = 0(2)
SA
20
____
20
____
3
10
____
10
LA
____
____
0.5
____
0.5
0.3
____
0.3
mA
mA
mA
mA
3090 tbl 07
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC, only address inputs are cycling at fMAX. f = 0 means no address inputs are changing.
DC Electrical Characteristics
VCC = 5.0V ± 10%
IDT6168SA
Symbol
|ILI|
|ILO|
VOL
VOH
Parameter
Input Leakage Current
Output Leakage Current
Output LOW Voltage
Output HIGH Voltage
Test Conditions
Min.
IDT6168LA
Max.
Min.
Max.
Unit
10
2
____
5
2
µA
10
2
____
____
5
2
µA
IOL = 10mA, VCC = Min.
____
0.5
____
0.5
V
IOL = 8mA, VCC = Min.
____
0.4
____
0.4
2.4
____
2.4
____
VCC = Max.,
VIN = GND to VCC
MIL.
COM'L.
____
VCC = Max., CS = VIH,
VOUT = GND to V CC
MIL.
COM'L.
____
IOH = -4mA, VCC = Min.
____
____
____
V
3090 tbl 09
6.42
3
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Data Retention Characteristics
VLC = 0.2V, VHC = VCC – 0.2V
(LA Version Only)
IDT6168LA
Symbol
Parameter
V DR
V CC for Data Retention
ICCDR
Data Retention Current
Test Condition
MIL.
Chip Deselect to Data
Retention Time
tR(5)
Operation Recovery Time
Typ.(1)
Max.
Unit
2.0
____
____
V
____
0.5(2)
1.0(3)
100(2)
150(3)
µA
0.5(2)
1.0(3)
20(2)
30(3)
µA
0
____
____
ns
tRC(4)
____
____
____
CS > VHC
VIN > VHC
or < VLC
tCDR(5)
Min.
____
COM'L.
____
ns
3090 tbl 10
NOTES:
1. TA = +25°C.
2. at VCC = 2V
3. at VCC = 3V
4. tRC = Read Cycle Time.
5. This parameter is guaranteed by device characterization, but is not production tested.
Low VCC Data Retention Waveform
DATA
RETENTION
MODE
VCC
4.5V
4.5V
VDR ≥ 2V
tCDR
CS
VIH
VDR
tR
,
VIH
3090 drw 03
AC Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
3090 tbl 11
5V
5V
480Ω
480Ω
DATA OUT
255Ω
DATA OUT
30pF*
255Ω
3090 drw 04
5pF*
3090 drw 05
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tCHZ, tCLZ, tWHZ and tOW)
*Includes scope and jig capacitances
4
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
AC Electrical Characteristics
(VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15(1)
6168SA20(1)
6168LA20(1)
6168SA45(2)
6168LA45(2)
6168SA25
6168LA25
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle Time
15
____
20
____
25
____
45
____
ns
tAA
Address Access Time
____
15
____
20
____
25
____
45
ns
tACS
Chip Select Access Time
____
15
____
20
____
25
____
45
ns
tCLZ(3)
Chip Select to Output in Low-Z
3
____
5
____
5
____
5
____
ns
tCHZ(3)
Chip Desele ct to Output in High-Z
____
8
____
10
____
10
____
25
ns
tOH
Output Hold from Address Change
3
____
3
____
3
____
3
____
ns
tPU(3)
Chip Sele ct to Power Up Time
0
____
0
____
0
____
0
____
ns
tPD(3)
Chip Deselect to Power Down Time
____
35
____
20
____
25
____
40
ns
Symbol
Parameter
Read Cycle
tRC
3090 tbl 12
NOTES:
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
Timing Waveform of Read Cycle No. 1(1, 2)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATA VALID
DATA VALID
3090 drw 06
,
Timing Waveform of Read Cycle No. 2(1, 3)
tRC
CS
tCLZ (4)
DATAOUT
tACS
tCHZ (3)
HIGH IMPEDANCE
DATAOUT VALID
HIGH IMPEDANCE
tPU
VCC
SUPPLY
CURRENT
tPD
ICC
,
ISB
3090 drw 07
NOTES:
1. WE is HIGH for Read cycle.
2. CS is LOW for Read cycle.
3. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. Transition is measured ±200mV from steady state.
6.42
5
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15(1)
Symbol
Parameter
6168SA20(1)
6168LA20(1)
6168SA25
6168LA25
6168SA45(2)
6168LA45(2)
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
15
____
20
____
20
____
40
____
ns
20
____
20
____
40
____
ns
Write Cycle
tWC
Write Cycle Time
tCW
Chip Select to End-of-Write
15
____
tAW
Address Valid to End-of-Write
15
____
20
____
20
____
40
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
0
____
ns
15
____
20
____
20
____
40
____
ns
0
____
0
____
0
____
ns
tWP
Write Pulse Width
tWR
Write Recovery Time
0
____
tDW
Data to Valid to End-of-Write
9
____
10
____
10
____
20
____
ns
tDH
Data Hold Time
0
____
0
____
0
____
3
____
ns
tWHZ(3)
Write Enable to Output in High-Z
____
6
____
7
____
7
____
20
ns
tOW(3)
Output Active from End-of-Write
0
____
0
____
0
____
0
____
ns
NOTES:
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
6
3090 tbl 13
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,5)
t WC
ADDRESS
t AW
CS
(3)
t WP
t AS
t WR
WE
t WHZ
DATAOUT
(6)
(6)
PREVIOUS DATA VALID
t OW
DATA (4)
VALID
(4)
t DW
DATAIN
t CHZ
(6)
t DH
,
DATA VALID
3090 drw 08
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,2,5)
t WC
ADDRESS
t AW
CS
tAS
(3)
t CW
tWR
WE
t DW
DATAIN
t DH
,
DATA VALID
NOTES:
1. WE or CS must be HIGH during all address transitions.
2. A write occurs during the overlap of a LOW CS and a LOW WE.
3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle.
4. During this period, the I/O pins are in the output state and input signals should not be applied.
5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high impedance state.
6. Transition is measured ±200mV from steady state.
6.42
7
3090 drw 09
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Ordering Information -- Commercial & Industrial
IDT
6168
XX
XXX
XX
X
Device
Type
Power
Speed
Package
Process/
Temperature
Range
Blank
I
Commercial (0°C to +70°C)
Industrial (-45°C to +85°C)
P
300mil Plastic DIP (P20-1) (Commercial & Industrial only)
15*
20
25
Commercial Only
Commercial Only
Commercial &Industrial
SA
LA
Standard Power
Low Power
Speed in nanoseconds
*Standard power only.
3090 drw 10
Ordering Information -- Military
IDT
6168
XX
XXX
XX
X
Device
Type
Power
Speed
Package
Process/
Temperature
Range
B
Military (-55°C to +125°C)
Compliant to MIL-STD-883, Class B
D
L
300mil Ceramic DIP (D20-1)
20-pin Leadless Chip Carrier (L20-1)
25
45
Speed in nanoseconds
SA
LA
Standard Power
Low Power
*Standard power only.
8
3090 drw 10a
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Datasheet Document History
11/22/99
01/07/00
08/09/00
02/01/01
Pg. 8
Pg. 1, 2, 3, 5, 6, 8
Pg. 1, 2, 8
Updated to new format
Added Datasheet Document History
Added Industrial Temperature range offerings
Revised package offerings
Not recommended for new designs
Removed "Not recommended for new designs"
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6.42
9
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