MOTOROLA MC13282AP 100 mhz video processor with osd interface Datasheet

Order this document by MC13282A/D
The MC13282A is a three channel wideband amplifier designed for use as
a video pre–amp in high resolution RGB color monitors.
100 MHz VIDEO PROCESSOR
WITH OSD INTERFACE
Features:
•
•
•
•
•
•
•
•
SEMICONDUCTOR
TECHNICAL DATA
4.0 Vpp Output with 100 MHz Bandwidth
3.5 ns Rise/Fall Time
Subcontrast Control for Each Channel
Blanking and Clamping Inputs
Contrast Control
OSD Interface with 50 MHz Bandwidth
OSD Contrast Control
Package: NDIP–24
24
1
ABSOLUTE MAXIMUM RATINGS
Rating
Power Supply Voltage – VCC
Power Supply Voltage – Video VCC
Pin
Value
Unit
9
–0.5, 10
Vdc
17
–0.5, 10
Vdc
2, 4, 6, 8,
10, 12
–0.5, +5.0
Vdc
Collector–Emitter Current (Three Channels)
17
120
mA
Storage Temperature
–
–65 to +150
°C
Junction Temperature
–
150
°C
Voltage at Video Amplifier Inputs
P SUFFIX
PLASTIC PACKAGE
CASE 724
PIN CONNECTIONS
24 Blank
R Subcontrast 1
NOTES: 1. Devices should not be operated at these limits. Refer to “Recommended
Operating Conditions” section for actual device operation.
R Input 2
2. ESD data available upon request.
23 Clamp
G Subcontrast 3
22 R Emitter
21 R Clamp
20 V5
G Input 4
B Subcontrast 5
RECOMMENDED OPERATING CONDITIONS
Characteristic
Power Supply Voltage
Contrast Control
Subcontrast Control
Blanking Input Signal Amplitude
Clamping Input Signal Amplitude
Pin
Min
Typ
Max
Unit
G Emitter
NDIP–24 19
18 G Clamp
B Input 6
Gnd 7
9, 17
7.6
8.0
8.4
Vdc
13
0
–
5.0
Vdc
ROSD 8
VCC 9
1, 3, 5
0
–
5.0
Vdc
GOSD 10
24
0
–
5.0
V
OSD Contrast 11
BOSD 12
17 Video VCC
16 B Clamp
15 B Emitter
14 Fast Commutate
13 Contrast
23
0
–
5.0
V
2, 4, 6
–
0.7
1.0
Vpp
8, 10, 12
–
TTL
–
V
Collector–Emitter Current
(Total for Three Channels)
17
0
–
50
mA
Clamping Pulse Width
23
500
–
–
ns
Device
Operating
Temperature Range
Package
Operating Ambient Temperature
–
0
–
70
°C
MC13282AP
TA = 0° to +70°C
Plastic DIP
Video Signal Amplitude
(with 75 Ω Termination)
OSD Signal Input
This document contains information on a new product. Specifications and information herein
are
subject to change
without notice.
MOTOROLA
ANALOG
IC DEVICE DATA
(Top View)
ORDERING INFORMATION
 Motorola, Inc. 1996
Rev 0
1
MC13282A
ELECTRICAL CHARACTERISTICS (Refer to Test Circuit Figure 1, TA = 25°C, VCC = 8.0 Vdc.)
Characteristic
Input Impedance
Condition
Pin
Min
Typ
Max
Unit
–
2, 4, 6
100
–
–
kΩ
–
2.4
–
Vdc
3.6
4.0
–
Vpp
–
5.6
–
V/V
Internal DC Bias Voltage
Output Signal Amplitude
V2, V4, V6 = 0.7 Vpp
V1, V3,
V1
V3 V5,
V5 V13 = 5.0
50V
V14 = 0 V
15, 19, 22
V13 = 5.0 to 0 V
V1, V3, V5 = 5.0 V
13
–
–26
–
dB
V1, V3, V5 = 5.0 to 0 V
V13 = 5.0 V
1, 3, 5
–
–26
–
dB
Emitter DC Level
–
15, 19, 22
1.0
1.2
1.4
Vdc
Blanking Input Threshold
–
24
–
1.25
–
V
Clamping Input Threshold
–
23
–
3.75
–
V
V2, V4, V6 = 0.7 Vpp
Vout = 4
4.0
0 Vpp
RL > 300 Ω, CL < 5.0 pF
15, 19, 22
–
3.5
–
ns
–
3.5
–
Video Bandwidth
V2, V4, V6 = 0.7 Vpp
V1, V3, V5, V13 = 5.0 V
V14 = 0 V
RL > 300 Ω, CL < 5.0 pF
15, 19, 22
–
100
–
MHz
OSD Rise Time
V8, V10, V12 = TTL Level
5 0 V,
V V14 = 5.0
50V
V11 = 5.0
15, 19, 22
–
7.0
–
ns
–
7.0
–
V8, V10, V12 = TTL Level
V11 = 5.0 V, V14 = 5.0 V
15, 19, 22
–
50
–
MHz
–
–
–
17
–
ns
VCC, Video VCC = 8.0 V
9, 17
–
70
–
mA
Voltage Gain
Contrast Control
Subcontrast Control
Video Rise Time
Video Fall Time
OSD Fall Time
OSD Bandwidth
OSD Propagation Delay
Power Supply Current
NOTE:
2
It is recommended to use a double sided PCB layout for high frequency measurement (e.g., rise/fall time, bandwidth).
MOTOROLA ANALOG IC DEVICE DATA
MC13282A
Figure 1. Internal Block Diagram
R Clamp
Fast Commutate
21
14
Vref2
Vref1
Video VCC
17
R Input
2
R Emitter
22
ROSD
8
R Subcontrast
1
Contrast and Subcontrast
Control Processor
R Channel
G Clamp
18
Contrast
Vref2
Vref1
13
G Input
4
G Emitter
19
GOSD
Blank
10
24
Clamp
Clamp Blank
Decoder
G Subcontrast
3
Contrast and Subcontrast
Control Processor
23
G Channel
B Clamp
16
Vref1
OSD Contrast
Vref2
11
B Input
6
B Emitter
BOSD
12
B Channel
15
VCC
9
V5
B Subcontrast
5
Contrast and Subcontrast
Control Processor
20
Gnd
7
This device contains 272 active transistors.
MOTOROLA ANALOG IC DEVICE DATA
3
MC13282A
PIN FUNCTION DESCRIPTION
Pin
Name
1
R Subcontrast
Control
3
G Subcontrast
Control
5
B Subcontrast
Control
2
R Input
Equivalent Internal Circuit
Description
These pin provides a maximum of 26 dB attenuation
to vary the gain of each video amplifier separately.
VCC
Input voltage is from 0 to 5.0 V. Increasing the voltage
will increase the contrast level.
50 k
5.0 V
The input coupling capacitor is used for input
clamping storage. The maximum source impedance
is 100 Ω.
Vref
4
G Input
0.1
Cl
Clamp
5.0 V
Nominal 0.7 Vpp input signal is recommended
(maximum 1.0 Vpp).
75 Ω
6
B Input
7
Ground
8
ROSD Input
IInputt polarity
l it off the
th video
id signal
i
l is
i positive.
iti
10 k
10k
1.0
Ground pin. Connect to a clean, solid ground.
These inputs are standard TTL level.
VCC
10
GOSD Input
80 k
12
BOSD Input
9
VCC
11
OSD Contrast
60 k
Connect to 8.0 Vdc supply, ±5%. Decoupling is
required at this pin.
Input voltage is from 0 to 5.0 V. Increasing the voltage
will increase the contrast of the OSD signal.
3.5 k
5.0 V
13
On Screen Display contrast control.
VCC
Contrast
Overall Contrast Control for the three channels.
5.0 V
2.5 V
42 k
4
2.0 k
The input range is 0 V to 5.0 V. An increase of voltage
increases the contrast.
MOTOROLA ANALOG IC DEVICE DATA
MC13282A
PIN FUNCTION DESCRIPTION (continued)
Pin
Name
14
Fast Commutate
Equivalent Internal Circuit
Description
This pin is used in conjunction with the RGB OSD
inputs. It is a high speed switch used for overlaying
text on picture. A logic low selects Pins 2, 4, 6. A logic
high selects Pins 8, 10, 12.
VCC
40 k
20 k
15
B Emitter Output
19
G Emitter Output
22
R Emitter Output
16
B Clamp
Capacitor
18
The dc voltage at these three emitters is set to 1.2 V
(black level).
Vid
Video
Signal
Contrast
RE = 330
Typical
R Clamp
Capacitor
17
Video VCC
20
5.0 Vref (V5)
The dc current through the output stage is determined
by the emitter resistors (typically 330 Ω).
A 100 nF capacitor is connected to each of these pins.
1.2 V
Video Out
G Clamp
Capacitor
21
The video outputs are configured as emitter–followers
with a driving capability of about 15 mA each.
VCC
The capacitor is used for video output dc restoration.
VCC
Connect to 8.0 V dc supply, ±5%. This VCC is for the
video output stage. It is internally connected to the
collectors of the output transistors.
VCC
Band Gap
Regulator
5.0 V regulator. Minimum 10 µF capacitor is required
for noise filtering and compensation. It can source
up to 20 mA but not sink current. Output impedance
is ≈ 10 Ω. Recommended for use as a voltage
reference only.
5.0 V
10 µF
R
MOTOROLA ANALOG IC DEVICE DATA
0.8 R
5
MC13282A
PIN FUNCTION DESCRIPTION (continued)
Pin
23
Name
Equivalent Internal Circuit
Description
Clamp
This pin is used for video clamping.
VCC
Vref1
The threshold clamping level is 3.75 V.
30 k
Vref2
10 k
3.75 V
24
Blank
This pin is used for video blanking.
VCC
Vref2
Vref1
The threshold blanking level is 1.25 V.
30 k
10 k
1.25 V
FUNCTIONAL DESCRIPTION
The MC13282A is composed of three video amplifiers,
clamping and blanking circuitry with contrast and subcontrast
controls and OSD interface. Each video amplifier is designed
to have a –3.0 dB bandwidth of 100 MHz with a gain of up to
about 5.6 V/V, or 15 dB.
Video Input
The video input stages are high impedance and designed
to accept a maximum signal of 1.0 Vpp with 75 Ω termination
(typically) provided externally. During the clamping period, a
current is provided to the input capacitor by the clamping
circuit which brings the input to a proper dc level (nominal
2.0 V). The blanking and clamping signals are to be provided
externally, with their thresholds sitting at 1.25 V and 3.75 V,
respectively.
Video Output
The video output stages are configured as
emitter–followers, with a driving capability of about 15 mA for
each channel. The dc voltage at these three emitters is set to
1.2 V (black level). The dc current through each output stage
is determined by the emitter resistor (typically 330 Ω).
Subcontrast Control
Each subcontrast control provides a maximum of 26 dB
attenuation on each video amplifier separately.
OSD Interface
The three OSD inputs are TTL compatible and have a
typical bandwidth of 50 MHz. A fast commutate pin is
provided to select either the video or the OSD inputs as the
source for the outputs. OSD contrast control is also
provided to set the amount of gain required when OSD
inputs are selected.
Clamp Pulse Input
The clamping pulse is provided externally, and the pulse
width must be no less than 500 ns.
Blank Pulse Input
The blanking pulse is used to blank the video signal during
the horizontal sync period, or used as a control pin for video
mute function.
Power Supplies
VCC and Video VCC supplies are to be 8.0 V ±5%.
Contrast Control
The contrast control varies the gain of three video
amplifiers from a minimum of 0.3 V/V to a maximum of
5.6 V/V when all subcontrast levels are set to 5.0 V.
6
MOTOROLA ANALOG IC DEVICE DATA
MC13282A
Figure 2. Test Circuit
Blank
Input
Clamp
Input
24
23
Blank
C1
0.1
2
G Input
C2
0.1
4
B Input
C3
0.1
6
R Input
Video
Inputs
8
8.0 V
OSD
Select
14
Clamp
17
Fast
Commutate
Video
VCC
VCC
R Input
R Emitter
G Input
G Emitter
B Input
B Emitter
12
R Output
19
G Output
15
B Output
R Clamp
BOSD
G Clamp
7
B Clamp
Gnd
R2
75
18
C13
0.1
C11
0.1
Clamp Capacitor
Subcontrast Control
G
R
C4
0.1
C12
0.1
16
V5
R3
75
R6
330
21
20
R1
75
R5
330
MC13282A
10 G
OSD
OSD
Inputs
22
R4
330
ROSD
C15
0.1
C14
47 µF
9
C5
10 µF
1
B
3
5
C7
0.1
C6
0.1
5.0 V
OSD
Contrast
5.0 V
Contrast
11
C8
0.1
5.0 V
13
C9
0.1
5.0 V
C10
0.1
5.0 V
APPLICATION INFORMATION
PCB Layout
Care should be taken in the PCB layout to minimize the
noise effects. The most sensitive pins are VCC (9), Video VCC
(17), V5 (20), Clamp (16, 18, 21). It is strongly recommended
to make a ground plane and connect VCC/Video VCC and
ground traces to the power supply directly. Separate power
supply traces, should be used for VCC and Video VCC and
decoupling capacitors should be connected as close as
possible to the device. Multi–layer ceramic and tantalum
capacitors are recommended. Pin 20 (V5) is designed as a
5.0 V voltage reference for contrast, RGB subcontrast and
OSD contrast controls, so the same precaution for VCC
should be also applied at this pin. The Clamp capacitors at
Pins 16,18 and 21 should be connected to ground close to
IC’s ground Pin 7 or power supply ground. The copper trace
of the video signal inputs and outputs should be as short as
possible and separated by ground traces to avoid any RGB
cross–interference. A double sided PCB should be used to
optimize the device’s performance.
RGB Input and Output
The RGB output stages are designed as emitter–followers
to drive the CRT driver circuitry directly. The emitter resistors
used is 330 Ω (typically) and the driving current is 15 mA
MOTOROLA ANALOG IC DEVICE DATA
maximum for each channel. The loading impedance
connected to the output stages should be greater than 330 Ω
and less than 5.0 pF for optimum performance (e.g., rise/fall
time, bandwidth, etc.). Decreasing the resistive load will
reduce the rise/fall time by increasing the driving current, but
the output stage may be damaged due to increasing power
dissipation at the same time. The frequency response is
affected by the loading capacitance. The typical value is 3.0
to 5.0 pF. Figure 4 shows a typical interface with a video output
driver. For a high resolution color monitor application, it is
recommended to use coaxial cable or shielded cable for input
signal connections.
Clamp and Blank Input
The clamp input is normally (except for Sync–on–Green)
connected to a positive horizontal sync pulse, and has a
threshold level of 3.75 V. It is used as a timing reference for
the dc restoration process, so it cannot be left open. If
Sync–on–Green timing mode is used, the clamping pulse
should be located at horizontal back porch period instead of
horizontal sync tip. Otherwise, the black level will be clamped
at an incorrect voltage.
The blank input is used as a video mute, or horizontal
blanking control, and is normally connected to a blanking
7
MC13282A
pulse generated from the flyback or from an MCU. The
threshold level of 1.25 V. The blanking pulse width should be
equal to the flyback retrace period to make sure that the
video signal is blanked properly during retrace. It is
necessary to limit the amplitude, and avoid any negative
undershoots if the flyback pulse is used. This Blanking input
pin cannot accept a negative voltage. This pin should be
grounded if it is not used.
OSD interface
Figure 3 show a typical application with an OSD device
(MC141540). The MC141540 OSD and FC outputs are TTL
compatible, and therefore interface directly with MC13282A.
Level shifting circuitry is not needed. The MC141540 is a
digital device, controlled by an MCU. Therefore, separate
power supply runs to the MC141540 and to the MC13282A
are recommended. Care should be taken in the PC board
layout to prevent digital noise from entering the analog
portions of MC13282A.
Normally the OSD switching is done during the active
video time. It is recommended that the Fast Commutate pin
not be activated during the horizontal sync time.
Figure 3. Interfacing with OSD Device
5.0 V
8.0 V
C11 C12
10 µF 47 µF
VR1
50 k
VR2
50 k
R4
10
VR3
50 k
C10
0.1
R
G
B
Contrast Contrast Contrast
V5
C9
0.1
C1 0.1
R Input
Video
VCC
VCC
Gnd
C8
0.1
C7
47 µF
R Emitter
R5
330
R Input
C2 0.1
G Input
G Emitter
C3 0.1
B Input
B Input
R1
75
R2
75
R3
75
MC13282A
B Emitter
Video Processor
with OSD Interface
R Clamp
Clamp
R7
330
G Clamp
Blank
B Clamp
Fast
OSD
ROSDGOSD BOSD Commutate Contrast
Blank
Input
C4
0.1
Contrast
C5
0.1
C6
0.1
5.0 V
5.0 V
Clamp
Input
RGB Output
R6
330
G Input
VR4
50 k
VR5
50 k
5.0 V
ROSD GOSD BOSD
Fast
H Tone
Commutate
VDD
VSS
SS
MCU Interface
MC141540
On Screen Display
Processor
MOSI
VDDA
VSSA
SCK
HF/B
VF/B
VCO
VDDA
Hsyn
Input
8
Vsyn
Input
C18
10 µF
C17
0.1
5.0 V
L1
150 mH
C16
100 µF
C15
0.1
RP
R9
R8
5.6 k
470 k
R10
2.0 k
C13
0.01
C14
0.1
R11
7.5 k
MOTOROLA ANALOG IC DEVICE DATA
MC13282A
Figure 4. Interfacing with Video Output Drivers
CRT Driver VCC
Reference Voltage
CL
5.0 V
8.0 V
C11 C12
10 µF 47 µF
VR1
50 k
VR2
50 k
VR3
50 k
C10
0.1
R
G
B
Contrast Contrast Contrast
V5
C9
0.1
Gnd
VCC
C1 0.1
R Input
R4
10
C8
0.1
C7
47 µF
Video
VCC
R Emitter
R5
330
R Input
C2 0.1
G Input
G Emitter
C3 0.1
B Input
B Input
R1
75
R2
75
R3
75
MC13282A
B Emitter
Video Processor
with OSD Interface
R Clamp
Clamp
RGB Output
R6
330
G Input
R7
330
G Clamp
Blank
B Clamp
Fast
OSD
ROSD GOSD BOSD Commutate Contrast
C4
0.1
Contrast
C5
0.1
C6
0.1
5.0 V
Clamp
Input
Blank
Input
VR5
50 k
OSD Input and Control
MOTOROLA ANALOG IC DEVICE DATA
9
MC13282A
Figure 6. Color Contrast
4.5
4.0
4.0
3.5
3.5
VIDEO OUTPUT (Vpp)
VIDEO OUTPUT (Vpp)
Figure 5. RGB In/Out Linearity
4.5
3.0
2.5
2.0
1.5
3.0
2.5
2.0
1.5
1.0
1.0
0.5
0.5
0
0
0.2
0.4
0.6
0
0.8
VIDEO INPUT (Vpp)
4.0
3.5
3.5
VIDEO OUTPUT (Vpp)
4.0
3.0
2.5
2.0
1.5
3.0
2.5
2.0
1.5
1.0
1.0
0.5
0.5
2.0
4.0
6.0
Figure 8. OSD Contrast Control
4.5
6.0
0
0
SUBCONTRAST VOLTAGE (V)
2.0
4.0
6.0
OSD CONTRAST CONTROL VOLTAGE (V)
Figure 9. Crosstalk From Green to Red
and Blue Channels
0
–10
ATTENUATION (dB)
VIDEO OUTPUT (Vpp)
Figure 7. Subcontrast Control
0
4.0
CONTRAST CONTROL VOLTAGE (V)
4.5
0
2.0
0
–20
–30
–40
–50
Blue Channel
–60
–70
–80
1.0
Red Channel
10
100
1000
f, FREQUENCY (MHz)
10
MOTOROLA ANALOG IC DEVICE DATA
MC13282A
Figure 10. Rise Time
Figure 11. Fall Time
100 mV/DIV
5.0 ns/DIV
10x PROBE
100 mV/DIV
5.0 ns/DIV
10x PROBE
NOTE:
Recommended to use a double sided PCB without any socket for rise/fall time measurements, using an input pulse with
1.5 ns rise/fall time and an active probe with 1.7 pF capacitance loading.
Figure 12. Single Sided PCB Layout
(Component Side)
Blank
Clamp
R In
G VR1
G VR2
R7
G VR3
R Out
R1
G In
C6
C1
C7
C2
R2 C8
C3
J1
J3
IC2
J5
B In
J2
C14 C15
R6
C13
R5
C4
R5
C12 C17
C16
J4
C11
R4
R3
G Out
B Out
C8
C10
J6
Gnd
VCC
8.0 V
R
NOTE:
G B FC
OSD In
In
VR4
VR5
OSD
Main
Contrast Contrast
J = Jumper
MOTOROLA ANALOG IC DEVICE DATA
11
MC13282A
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 724–03
ISSUE D
–A–
24
13
1
12
NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
–B–
L
C
–T–
NOTE 1
K
SEATING
PLANE
N
E
G
M
J
F
D
0.25 (0.010)
24 PL
0.25 (0.010)
24 PL
M
T A
M
M
T B
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
INCHES
MIN
MAX
1.230
1.265
0.250
0.270
0.145
0.175
0.015
0.020
0.050 BSC
0.040
0.060
0.100 BSC
0.007
0.012
0.110
0.140
0.300 BSC
0_
15_
0.020
0.040
MILLIMETERS
MIN
MAX
31.25
32.13
6.35
6.85
3.69
4.44
0.38
0.51
1.27 BSC
1.02
1.52
2.54 BSC
0.18
0.30
2.80
3.55
7.62 BSC
0_
15_
0.51
1.01
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
12
◊
MOTOROLA ANALOG IC DEVICE DATA
*MC13282A/D*
MC13282A/D