Intersil ISL3092 11ghz vco Datasheet

ISL3092
®
Data Sheet
PRELIMINARY
11GHz VCO
June 2003
FN8073
Features
The ISL3092 is a 11GHz SiGe
monolithic VCO circuit designed to
simplify and reduce the cost and size
of miniature wireless transceivers.
A fully integrated VCO requiring no external elements such
as inductors or varactors greatly simplifies low cost local
oscillator synthesized applications.
Included in this differential design is a high/low band
selection and a low-power standby function.
The ISL3092 directly interfaces with Intersil’s 2.4/5GHz
dualband ZIF (zero IF) converter (ISL3692). The addition of
the Intersil’s Wireless LAN Media Access Controller and
Baseband Processor (ISL3886) and Intersil’s Power
Amplifier (ISL3992) completes a worldwide wirelessLAN
radio application targeting both the 802.11b/g 2.4GHz and
802.11a 5GHz standard.
• Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 3.0V
• Frequency . . . . . . . . . . . . . . . . 9648 to 11670MHz typical
• Fully integrated / no external varactors or resonators
required
• Isolation output buffer/reduced load pulling
• Differential design/reduced spurs
• Digitally controlled power down mode
QFN Package
• Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No
Leads - Package Outline
• Near Chip Scale Package footprint, which improves PCB
efficiency and has a thinner profile
Applications
The ISL3092 is housed in a 16 lead Quad Flat No Lead
Plastic (QFN) Package suitable for Mini-PCI and PCMCIA
applications.
• High Data Rate Wireless LAN Systems Targeting the
IEEE 802.11a and 802.11b Standards
Pinout
• WLAN applications
• PCMCIA wireless transceivers
GND
VT REF
V TUNE
CORE_GND1
ISL3092 (QFN)
TOP VIEW
16
15
14
13
• TDMA packet protocol radios
Ordering Information
PART
NUMBER
OSC -
2
11
FILTER_CAP1
OSC +
3
10
FILTER_GND
BUFF_GND2
4
9
FILTER_CAP2
6
7
8
CORE_GND2
CORE_VCC
HB_LB
12
PE
1
BUFF_VCC
BUFF_GND1
5
• Only required VCO function for Intersil chip set
TEMP. RANGE
(oC)
ISL3092IR
-40 to 85
16 Lead QFN
ISL3092IR-TK
-40 to 85
Tape and Reel
PKG. DWG.
#
L16.3X3
Simplified Block Diagram
VCC
VCC
OSC +
OSC -
VCO
VTUNE
PE
BIAS
HB_LB
GND
1
PACKAGE
GND
GND
CCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright © Intersil Americas Inc. 2003. All Rights Reserved. PRISM® is a registered trademark of Intersil Americas Inc.
PRISM Duette™ and PRISM and design are trademarks of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owner.
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