SPSEMI ESD/AESD03FB Electro-Static Discharge for Aotomobile AESD03FB Bidirectional TVS Diode SOD-323 Pin Configuration Features 320 Watts Peak Pulse Power per Line (tp=8/20μs) Protects one I/O or power line Low clamping voltage Working voltages: 3. 3V Low leakage current AEC-Q101 IEC Compatibility IEC61000-4-2 (ESD) ±30kV (air), ±30kV (contact) IEC61000-4-4 (EFT) 40A (5/50ηs) Applications Cell Phone Handsets and Accessories Microprocessor based equipment Personal Digital Assistants(PDA's) Notebooks,Desktops,and Servers Portable Instrumentation Peripherals Pagers Mechanical Characteristics JEDEC SOD-323 Package Molding Compound Flammability Rating:UL 94V-O Weight 0.5 Millgrams(Approximate) Quantity Per Reel:3000pcs Reel Size:7 inch Lead Finish:Lead Free REV . 2017 . 07 . 24 www.spsemi.cn Page 1 of 3 SPSEMI ESD/AESD03FB Maximum Ratings (T A =25 ℃ unless otherwise noted ) Symbol Value Units Peak Pulse Power(tp=8/20μs) P PP 320 Watts Lead Soldering Temperature TL 260(10 sec.) ℃ Operating Temperature Range TJ -55~150 ℃ T STG -55~150 ℃ Parameter Storage Temperature Range Electrical Characteristics (T A =25 ℃ unless otherwise specified ) AESD03FB(Marking:2A) Symbol Parameter Reverse Stand-off Voltage Min. Conditions Max. Units 3.3 V V RWM Breakdown Voltage V BR Clamping Voltage VC Reverse Leakage Current Junction Capacitance I T =1mA 3.6 V I PP =1A,tp=8/20μs 7.5 V I PP =18A,tp=8/20μs 13 V IR @V RWM 40 μA C I/O 0Vdc,f=1MHz Between I/O Pins and GND 450 pF Ratings and Characteristic Curves Fig.2 Pulse Waveform Fig.1 Non-Repetitive Pulse Power vs.Pulse Time 110 100 Waveform Parameters: tr=8μs t d =20μs 90 80 Percent of I PP Peak Pulse Power-P PP (kW) 10 1 0.1 70 e 60 -1 50 40 t d =I PP /2 30 20 10 0.01 0 1 10 100 0 0 1000 REV . 2017 . 07 . 24 5 10 15 20 25 30 Time( μs ) Pulse Duration-tp( μs ) www.spsemi.cn Page 2 of 3 SPSEMI ESD/AESD03FB Application Information I/O Protection I/O I/O I/O I/O AESD03FB AESD03FB PCB Layout Recommendations The location and circuit board layout is critical to maximize the effectiveness of the I/O protection circuit. The following guidelines are recommended: Locate the protection devices as close as possible to the I/O connector. This allows the protection devices to absorb the energy of the transient voltage before it can be coupled into the adjacent traces on the PCB. Minimize the loop area for the high.speed data lines, power and ground lines to reduce the radiated emissions. Avoid running protection conductors in parallel with unprotected conductors Use ground planes wherever possible to reduce the parasitic capacitance and inductance of the PCB that degrades the effectiveness of a filter device. Using shared transient return paths to a common ground point. Dimensions(SOD-323) SOD-323 HE Millimeters D b 2 1 E DIM Min Max Min Max A 0.80 1.00 0.031 0.040 A1 0.00 0.10 0.000 0.004 A3 A3 A C L Inches 0.15REF 0.006REF b 0.25 0.40 0.010 0.016 C 0.089 0.177 0.003 0.007 D 1.60 1.80 0.062 0.070 E 1.15 1.35 0.045 0.053 L 0.08 HE 2.30 0.003 2.70 0.090 0.105 A1 Recommended Mounting Pad Layout 2.85 0.112 1.60 0.063 0.63 0.025 REV . 2017 . 07 . 24 0.83 0.033 Dimensions in ( millimeters ) inches www.spsemi.cn Page 3 of 3