HT23C512 CMOS 64K´8-Bit Mask ROM Features · Operating voltage: 2.7V~5.5V · 65536´8-bit of mask ROM · Low power consumption · Mask options: chip enable CE/CE/OE1/OE1 and - Operation: 25mA max. (VCC=5V) output enable OE/OE/NC · TTL compatible inputs and outputs 10mA max. (VCC=3V) - Standby: 30mA max. (VCC=5V) 10mA max. (VCC=3V) · Access time: 150ns max. (VCC=5V) 250ns max. (VCC=3V) · Tristate outputs · Fully static operation · 28-pin DIP/SOP package General Description tion in multiple bus microprocessor systems. An additional feature of the HT23C512 is its ability to enter the standby mode whenever the chip enable (CE/CE) is inactive, thus reducing current consumption to below 30mA. The combination of these functions makes the chip suitable for high density low power memory applications. The HT23C512 is a read-only memory with high performance CMOS storage device whose 512K of memory is arranged into 65536 words by 8 bits. For application flexibility, the chip enable and output enable control pins can be selected as active high or active low. This flexibility not only allows easy interface with most microprocessors, but also eliminates bus conten- Block Diagram X -D e c A 0 M e m o ry C e ll ( 6 4 K 8 B its ) Y -D e c A d d re s s B u ffe rs X Y -P re D e c A 1 5 C E /C E /O E 1 /O E 1 O E /O E /N C Z -D e c S e n s e A m p C o n tro l L o g ic O u tp u t B u ffe rs V S S Rev. 1.10 V C C 1 D 0 D 7 August 30, 2002 HT23C512 Pin Assignment A 1 5 1 2 8 V C C A 1 2 2 2 7 A 1 4 A 7 3 2 6 A 1 3 A 6 4 2 5 A 8 A 5 5 2 4 A 9 A 4 6 2 3 A 1 1 A 3 7 2 2 O E /O E /N C A 2 8 2 1 A 1 0 A 1 9 2 0 C E /C E /O E 1 /O E 1 A 0 1 0 1 9 D 7 D 0 1 1 1 8 D 6 D 1 1 2 1 7 D 5 D 2 1 3 1 6 D 4 V S S 1 4 1 5 D 3 H T 2 3 C 5 1 2 2 8 D IP -A /S O P -A Pin Description Pin Name I/O Description A0~A15 I Address inputs D0~D7 O Data outputs CE/CE/OE1/OE1 I Chip enable/Output enable input OE/OE/NC I Output enable input VSS ¾ Negative power supply, ground VCC ¾ Positive power supply Absolute Maximum Ratings Supply Voltage ............................................-0.3V to 6V Storage Temperature ............................-50°C to 125°C Input Voltage....................................-0.3V to VCC+0.3V Operating Temperature...........................-40°C to 85°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Supply voltage: 2.7V~3.6V Symbol Parameter Ta=-40°C to 85°C Test Conditions VCC Conditions ¾ Min. Typ. Max. Unit 2.7 ¾ 3.6 V ¾ ¾ 10 mA VCC Operating Voltage ¾ ICC Operating Current 3V VIL Input Low Voltage 3V ¾ VSS ¾ 0.4 V VIH Input High Voltage 3V ¾ 2.0 ¾ VCC V VOL Output Low Voltage 3V IOL=2.1mA ¾ ¾ 0.4 V VOH Output High Voltage 3V IOH=-0.4mA 2.4 ¾ VCC V Rev. 1.10 O/P Unload, f=5MHz 2 August 30, 2002 HT23C512 Symbol Parameter Test Conditions Conditions VCC Min. Typ. Max. Unit ILI Input Leakage Current 3V VIN=0 to VCC ¾ ¾ 10 mA ILO Output Leakage Current 3V VOUT=0 to VCC ¾ ¾ 10 mA ISTB1 Standby Current 3V CE=VIL, CE=VIH ¾ ¾ 500 mA ISTB2 Standby Current 3V CE £ 0.2V, CE ³ VCC-0.2V ¾ ¾ 10 mA CIN Input Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF COUT Output Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF Note: These parameters are periodically sampled but not 100% tested. Supply voltage: 4.5V~5.5V Symbol Parameter Ta=-40°C to 85°C Test Conditions VCC Conditions ¾ Min. Typ. Max. Unit 4.5 ¾ 5.5 V ¾ ¾ 25 mA VCC Operating Voltage ¾ ICC Operating Current 5V VIL Input Low Voltage 5V ¾ VSS ¾ 0.8 V VIH Input High Voltage 5V ¾ 2.2 ¾ VCC V VOL Output Low Voltage 5V IOL=3.2mA ¾ ¾ 0.4 V VOH Output High Voltage 5V IOH=-1mA 2.4 ¾ VCC V ILI Input Leakage Current 5V VIN=0 to VCC ¾ ¾ 10 mA ILO Output Leakage Current 5V VOUT=0 to VCC ¾ ¾ 10 mA ISTB1 Standby Current 5V CE=VIL, CE=VIH ¾ ¾ 1.5 mA ISTB2 Standby Current 5V CE £ 0.2V, CE ³ VCC-0.2V ¾ ¾ 30 mA CIN Input Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF COUT Output Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF O/P Unload, f=5MHz Note: These parameters are periodically sampled but not 100% tested. A.C. Characteristics Symbol Parameter Ta=-40°C to 85°C VCC=2.7V~3.6V VCC=4.5V~5.5V Unit Min. Max. Min. Max. 250 ¾ 150 ¾ ns tCYC Cycle Time tAA Address Access Time ¾ 250 ¾ 150 ns tACE Chip Enable Access Time ¾ 250 ¾ 150 ns tAOE Output Enable Access Time ¾ 150 ¾ 80 ns tOH Output Hold Time ¾ ¾ 10 ¾ ns tOD Output Disable Time (See Note) ¾ ¾ ¾ 70 ns tOE Output Enable Time (See Note) ¾ ¾ 10 ¾ ns Note: These parameters are periodically sampled but not 100% tested. Rev. 1.10 3 August 30, 2002 HT23C512 A.C. test conditions V C C Output load: see figure right 1 2 5 0 9 Input rise and fall time: 10ns O u tp u t Input pulse levels: 0.4V to 2.4V 7 7 5 9 Input and output timing reference levels: 0.8V and 2.0V (VCC=5V), 1.5V (VCC=3V) 1 0 0 p F * * In c lu d in g s c o p e a n d jig Output load circuit Functional Description The HT23C512 has two modes, namely data read mode and standby mode, controlled by CE/CE/OE1/OE1 and OE/OE/NC inputs. · Data read mode When both the chip enable (CE/CE/OE1/OE1) and the output enable (OE/OE/NC) are active, the chip is in data read mode. Otherwise, active CE/CE and inactive OE/OE/NC result in deselect mode. The output will remain in Hi-Z state. · Standby mode The HT23C512 has lower current consumption, controlled by the chip enable input (CE/CE). When a low/high level is applied to the CE/CE input regardless of the output enable (OE/OE/NC) states, the chip will enter the standby mode. Operation Truth Table Mode CE/CE OE/OE A0~A15 D0~D7 Read H/L H/L Valid Deselect H/L L/H X High Z Standby L/H X X High Z Data Out Note: H=VIH, L=VIL, X=VIH or VIL Timing Diagrams · Propagation delay due to address (CE/CE/OE1/OE1 and OE/OE are active) tC Y C V a lid A d d re s s tA tO A H V a lid D o u t · Propagation delay due to chip enable and output enable (address valid) tA C E C E C E tA O E C E O E tO tO E D o u t Rev. 1.10 D V a lid 4 August 30, 2002 HT23C512 Characteristic Curves 1 .4 1 .5 C 1 .1 0 .9 0 .7 0 .5 5 C 1 .2 1 .1 1 0 .9 0 .8 C C (V ) V C C 1 .3 T B 2 1 .3 1 .1 0 .9 0 .7 5 T a = 2 5 C C C (V ) V C C 5 0 7 5 5 0 7 5 1 0 .9 -5 0 -2 5 0 2 5 T e m p e ra tu re ( C ) A 1 .1 5 A c c e s s T im e tA (N o r m a liz e d ) A A c c e s s T im e tA (N o r m a liz e d ) Rev. 1.10 7 5 1 .2 5 1 .0 5 1 0 .9 5 C 5 0 1 .1 = 5 V 1 .1 0 .9 2 5 1 .2 0 .8 5 .5 O p e r a tin g V o lta g e V 0 T e m p e ra tu re ( C ) 1 .4 4 .5 -2 5 = 5 V 1 .5 0 .5 T a = 2 5 -5 0 5 .5 S ta n d b y C u r r e n t IS (N o r m a liz e d ) T B 2 S ta n d b y C u r r e n t IS (N o r m a liz e d ) 4 .5 O p e r a tin g V o lta g e V T a = 2 5 1 .3 O p e r a tin g C u r r e n t IC (N o r m a liz e d ) (N o r m a liz e d ) O p e r a tin g C u r r e n t IC C 1 .3 4 .5 5 O p e r a tin g V o lta g e V 0 .9 5 0 .8 5 0 .7 5 5 .5 C C 1 .0 5 (V ) V 5 C C = 5 V -5 0 -2 5 0 2 5 T e m p e ra tu re ( C ) August 30, 2002 HT23C512 1 .2 5 1 0 .9 5 0 .9 4 .5 5 C C C (V ) V C C Rev. 1.10 -5 0 -2 5 0 2 5 5 0 7 5 5 0 7 5 T e m p e ra tu re ( C ) 1 .1 5 A c c e s s T im e tA O (N o r m a liz e d ) E 1 .0 5 1 0 .9 5 C 0 .8 5 1 .2 5 E A c c e s s T im e tA O (N o r m a liz e d ) T a = 2 5 0 .9 5 = 5 V 1 .1 0 .9 1 .0 5 0 .7 5 5 .5 O p e r a tin g V o lta g e V T a = 2 5 1 .1 5 E 1 .0 5 A c c e s s T im e tA C (N o r m a liz e d ) A c c e s s T im e tA C (N o r m a liz e d ) E 1 .1 4 .5 5 O p e r a tin g V o lta g e V 0 .9 5 0 .8 5 0 .7 5 5 .5 C C 1 .0 5 (V ) V 6 C C = 5 V -5 0 -2 5 0 2 5 T e m p e ra tu re ( C ) August 30, 2002 HT23C512 HT23C512 MASK ROM ORDERING SHEET Custom: Input Medium: EPROM DISK File (Mail Address: [email protected]) User No. Type/Ref. Name Q'ty OTHER Check Sum Memory Address Start End Control Pin and Package Form Option: (a) 28 Pin Type Pin 20: (1) CE (2) CE (3) OE1 (4) OE1 Pin 22: (1) OE (2) OE (3) NC (b) Package Form: (1) Chip Form (2) 28 DIP (3) 28 SOP Companion User No. Package Marking : Delivery Date : Q'ty: CUSTOM CONFIRMED BY: (NAME, DATE, POSITION & CO. CHOP) HOLTEK CONFIRMED BY: (SALES) Rev. 1.10 (SALES MANAGER) 7 August 30, 2002 HT23C512 Package Information 28-pin DIP (600mil) outline dimensions A 1 5 2 8 B 1 1 4 H C D E Symbol Rev. 1.10 F = G I Dimensions in mil Min. Nom. Max. A 1445 ¾ 1465 B 535 ¾ 555 C 145 ¾ 155 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 595 ¾ 615 I 635 ¾ 670 a 0° ¾ 15° 8 August 30, 2002 HT23C512 28-pin SOP (300mil) outline dimensions 2 8 1 5 A B 1 1 4 C C ' G H D E Symbol Rev. 1.10 = F Dimensions in mil Min. Nom. Max. A 394 ¾ 419 B 290 ¾ 300 C 14 ¾ 20 C¢ 697 ¾ 713 D 92 ¾ 104 E ¾ 50 ¾ F 4 ¾ ¾ G 32 ¾ 38 H 4 ¾ 12 a 0° ¾ 10° 9 August 30, 2002 HT23C512 Product Tape and Reel Specifications Reel dimensions D T 2 A C B T 1 SOP 28W (300mil) Symbol Description Dimensions in mm A Reel Outer Diameter 330±1.0 B Reel Inner Diameter 62±1.5 C Spindle Hole Diameter 13.0+0.5 -0.2 D Key Slit Width 2.0±0.5 T1 Space Between Flange 24.8+0.3 -0.2 T2 Reel Thickness 30.2±0.2 Rev. 1.10 10 August 30, 2002 HT23C512 Carrier tape dimensions P 0 D P 1 t E F W C D 1 B 0 P K 0 A 0 SOP 28W (300mil) Symbol Description Dimensions in mm W Carrier Tape Width 24.0±0.3 P Cavity Pitch 12.0±0.1 E Perforation Position 1.75±0.1 F Cavity to Perforation (Width Direction) 11.5±0.1 D Perforation Diameter 1.5+0.1 D1 Cavity Hole Diameter 1.5+0.25 P0 Perforation Pitch 4.0±0.1 P1 Cavity to Perforation (Length Direction) 2.0±0.1 A0 Cavity Length 10.85±0.1 B0 Cavity Width 18.34±0.1 K0 Cavity Depth 2.97±0.1 t Carrier Tape Thickness 0.35±0.01 C Cover Tape Width Rev. 1.10 21.3 11 August 30, 2002 HT23C512 Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Sales Office) 11F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Shanghai) Inc. 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Holmate Semiconductor, Inc. 48531 Warm Springs Boulevard, Suite 413, Fremont, CA 94539 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com Copyright Ó 2002 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.10 12 August 30, 2002