AD DR280AKS-REEL 1.2 v ultralow power high psrr voltage reference Datasheet

1.2 V Ultralow Power
High PSRR Voltage Reference
ADR280
FEATURES
1.2 V Precision Output
Excellent Line Regulation, 2 ppm/V Typical
High Power Supply Ripple Rejection, –80 dB at 220 Hz
Ultralow Power, Supply Current 16 A Maximum
Temperature Coefficient, 40 ppm/oC Maximum
Low Noise, 12.5 nV/÷Hz Typical
Operating Supply Range, 2.4 V to 5.5 V
Compact 3-Lead SOT-23 and SC70 Packages
PIN CONFIGURATIONS
3-Lead SOT-23
(RT Suffix)
V+ 1
ADR280
3 V–
VOUT 2
APPLICATIONS
GSM, GPRS, 3G Mobile Stations
Portable Battery-Operated Electronics
Low Voltage Converter References
Wireless Devices
3-Lead SC70
(KS Suffix)
VOUT 1
ADR280
GENERAL DESCRIPTION
In addition to mobile stations, the ADR280 is suitable for a
variety of general-purpose applications. Most band gap references include internal gain for specific outputs, which simplifies
the user’s design but compromises on the cost, form factor, and
flexibility. The ADR280, on the other hand, optimizes the band
gap core voltage and allows users to tailor the voltage, current, or
transient response by simply adding their preferred op amps.
The ADR280 operates on a wide supply voltage range from 2.4 V
to 5.5 V. It is available in compact 3-lead SOT-23 and SC70
packages. The device is specified over the extended industrial
temperature range of –40°C to +85°C.
3 V–
V+ 2
15
10
LINE REGULATION (ppm/V)
The ADR280 is a 1.2 V band gap core reference with excellent
line regulation and power supply rejection designed specifically
for applications experiencing heavy dynamic supply variations,
such as data converter references in GSM, GPRS, and 3G
mobile station applications. Devices such as the AD6535, which
has an analog baseband IC with on-board baseband and audio
codecs, voltage regulators, and battery charger, rely on the
ADR280’s ability to reject input battery voltage variations during
RF power amplifier activity.
5
3V TO 5V
0
–5
–10
–15
–40
–20
0
20
40
TEMPERATURE (C)
60
80
100
Figure 1. Line Regulation vs. Temperature
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks
and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
ADR280–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (V
IN
Parameter
Symbol
2
Output Voltage
Temperature Coefficient
VOUT
TCVo
Line Regulation
Supply Current
Ground Current
Input Voltage Range
Operating Temperature Range
Nominal Load Capacitance
Output Noise Voltage
Output Noise Density
Power Supply Ripple Rejection3
Start-Up Time
VOUT/VIN
IIN
IGND
VIN
TA
COUT
VN
eN
PSRR
tON
= 2.55 V to 5.5 V, TA = 25°C, unless otherwise noted.)
Conditions
Min
Typ1
Max
Unit
1.195
1.200
5
10
2
10
12
1.205
20
40
12
16
20
5.5
+85
V
ppm/oC
ppm/oC
ppm/V
µA
µA
V
°C
µF
µVrms
nV/÷Hz
dB
ms
0°C < TA < 50°C
–40°C < TA < +85°C
2.55 V < VIN < 5.5 V, No Load
2.4 V < VIN < 5.5 V, No Load
V– Grounded, ILOAD = 10 µA
2.4
–40
1
f = 10 Hz to 10 kHz
f = 400 kHz
ILOAD = 10 µA
12.5
12.5
–80
2
NOTES
1Typical values represent average readings taken at room temperature.
2Conditions: 2.4 V < V
IN < 5.5 V, 0 µA < IOUT < 10 µA, –40°C < TA < +85°C.
3Power supply ripple rejection measurement applies to a changing input voltage (V ) waveform with a nominal 3.6 V baseline that drops to a 3 V value for
IN
380 µs at a 4.6 ms repetition rate.
Specifications subject to change without notice.
of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
2 Absolute Maximum Ratings apply at 25°C, unless otherwise noted.
ABSOLUTE MAXIMUM RATINGS1, 2
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Storage Temperature Range . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 Sec) . . . . . . . . . .300°C
THERMAL RESISTANCE
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those listed in the operational sections
Package Type
JA*
JC
Unit
SOT-23
SC70
230
376
146
102
°C/W
°C/W
* JA is specified for the worst-case conditions, i.e., JA is specified for device soldered in circuit board for surface-mount packages.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
Top
Mark
Output
Voltage (V)
Number of
Parts per Reel
ADR280ART-R2
ADR280ART-REEL7
ADR280ART-REEL
ADR280AKS-R2
ADR280AKS-REEL7
ADR280AKS-REEL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
SOT-23
SOT-23
SOT-23
SC70
SC70
SC70
RT-3
RT-3
RT-3
KS-3
KS-3
KS-3
RBA
RBA
RBA
RBA
RBA
RBA
1.200
1.200
1.200
1.200
1.200
1.200
250
3,000
10,000
250
3,000
10,000
PIN CONFIGURATIONS
SOT-23
SC70
PIN FUNCTION DESCRIPTIONS
Mnemonic
Pin No.
SOT-23
SC70
Description
1
V+
VOUT
High Supply Voltage Input
2
VOUT
V+
Output Voltage
3
V–
V–
Low Supply Voltage Input
VOUT 1
V+ 1
ADR280
3 V–
VOUT 2
ADR280
3 V–
V+ 2
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although the ADR280
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high
energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
–2–
REV. A
Typical Performance Characteristics–ADR280
1.20225
1.20200
NO LOAD
VOUT (V)
1.20175
1.20150
1.20125
1
1.20100
1.20075
1.20050
1.20025
1.20000
–40
–20
0
20
40
TEMPERATURE (C)
60
80
Ch1 50.0V
100
TPC 1. VOUT vs. Temperature
M 1.00 s
TPC 4. Noise Voltage Peak-to-Peak 10 Hz to 10 kHz
15
IIN (A)
13
NOISE POWER DENSITY (dBm)
14
VIN = 5V
12
VIN = 3V
11
–40
–60
–80
–100
10
9
–40
–20
0
20
40
TEMPERATURE (C)
60
80
100
0
TPC 2. Supply Current vs. Temperature
2.5
5.0
FREQUENCY (kHz)
7.5
10.0
TPC 5. Output Noise Density Plot
(VIN = 3.6 V, COUT = 1 µF, CIN = 1 µF)
15
–40dB
LINE REGULATION (ppm/V)
10
5
3V TO 5V
10dB/DIV
0
–5
–10
–15
–40
–20
0
20
40
TEMPERATURE (C)
60
80
100
0Hz
TPC 3. Line Regulation vs. Temperature
REV. A
100kHz
TPC 6. Voltage Noise Density 0 Hz to 100 kHz
–3–
ADR280
1.2
tS
1.0
VOLTAGE (V)
0.8
0.6
0.4
0.2
0
0
2
4
6
10
8
12
14
16
18
20
TIME (ms)
TPC 7. Settling Time
THEORY OF OPERATION
APPLICATIONS
The ADR280 provides the basic core 1.2 V band gap reference.
It contains two NPN transistors, Q9 and Q17, with their emitter
areas scaled in a fixed ratio. The difference in their Vbes produces
a PTAT (proportional to absolute temperature) voltage that
cancels the CTAT (complementary to absolute temperature) Q9
Vbe voltage. As a result, a core band gap voltage that is almost a
constant 1.2 V over temperature is generated (see Figure 2). Precision laser trimming of the internal resistors and other proprietary
circuit techniques are used to enhance the initial accuracy, temperature curvature, and temperature drift performance.
The ADR280 should be decoupled with a 0.1 µF ceramic cap at
the output for optimum stability. It is also good practice to
include 0.1 µF ceramic caps at the IC supply pin. These capacitors should be mounted close to their respective pins (see Figure 3).
V+
0.1F
ADR280
V–
VOUT
V+
R1
0.1F
R2
I1
R12
Q2
R3
Figure 3. Basic Configuration
Q7
Q1
The low supply voltage input pin V– can be elevated above
ground; a 1.2 V differential voltage can therefore be established
above V– (see Figure 4).
Q10
R4
R13
C1
PNP3
Q3
Q17
R7
R5
R10
Q18
Q9
V+
5V
0.1F
Q6
VOUT
ADR280
V–
Q5
2.5V
R6
R8
VOUT
R11
0.1F
1.2V
R9
V–
Figure 4. Floating References
Figure 2. Simplified Architecture
–4–
REV. A
ADR280
Precision Low Power Current Source
The ADR280 provides the core 1.2 V band gap voltage and is
able to drive a maximum load of only 100 µA. Users can simply
buffer the output for high current or sink/source current applications, such as ADC or LCD driver references (see Figure 5).
By adding a buffer to redirect the IGND in Figure 8, a current can
be precisely set by RSET with the equation IL = 1.2 V/RSET.
U1
U1
5V
V+
V+
0.1F
ADR280
V–
ADR280
V–
VOUT
VOUT
VOUT
U2
C2
0.1F
U2 = AD8541, SC70
AD8601, SOT-23-5
RSET 12k
Figure 5. Buffered Output
IL = 1.2V/RSET
Figure 8. Precision Low Power Current Source
Boosted Current Source
Adding one more buffer to the previous circuit boosts the current
to the level that is limited only by the buffer U2 current handling
capability (see Figure 9).
U1
5V
V+
AD8541
V–
IL
100A
RL 1k
Users can also tailor any specific need for voltage and dynamics
with an external op amp and discrete components (see Figure 5).
Depending on the specific op amp and PCB layout, it may be
necessary to add a compensation capacitor, C2, to prevent gain
peaking and oscillation. The exact value of C2 needed requires
some trial and error but usually falls in the range of a few pF.
V+
ADR280
5V
U1
V–
5V
U2
VO
1.8V
R2
60k 0.1%
C2
1.2V
V+
AD8541
V–
C1
0.1F
5V
U2
V+
ADR280
VOUT
V–
0.1F
5V
U2
2.2pF
V+
VOUT
V–
R1
120k 0.1%
C1
RSET
230
Figure 6. 1.8 V Reference
+
1.2V
–
V+
0.1F
5V
U3
V–
RL
500
LOW COST, LOW POWER CURRENT SOURCE
Because of its low power characteristics, the ADR280 can be
converted to a current source with just a setting resistor. In addition to the ADR280 current capability, the supply voltage and the
load limit the maximum current. The circuit in Figure 7 produces
100 µA with 2 V compliance at 5 V supply. The load current is
the sum of ISET and IGND. IGND will increase slightly with load; an
RSET of 13.6 k yields 100 µA of load current.
IL = 1.2V/RSET
U2 = U3 = AD8542, AD822
Figure 9. Precision Current Source
U1
V+
5V
ADR280
V–
ISET
C1
+
RSET 1.2V
0.1F
– 13.6k
RL
1k IL
100A
VOUT
IGND
IL = ISET + IGND
Figure 7. Low Cost Current Source
REV. A
IL
5mA
–5–
ADR280
Negative Reference
A negative reference can be precisely configured without using
any expensive tight tolerance resistors, as shown in Figure 10.
The voltage difference between VOUT and V– is 1.2 V. Since VOUT
is at virtual ground, U2 will close the loop by forcing the V– pin
to be the negative reference output.
VO
ADR280
M1
R2
10.8k 0.1%
V+
+5V
V+
RL
25
U1
U1
5V
2.5V/100mA
U2
C2
V–
1.2V
V+
AD8541
V–
C1
VOUT
0.1F
1pF
ADR280
V–
R1
10k 0.1%
–VREF
–1.2V
M1 = FDB301N, 2N7000, 2N7002, OR EQUIVALENT
VOUT
C1
0.1F
Figure 11. 2.5 V Boosted Reference
U2
GSM and 3G Mobile Station Applications
V+
AD8541
V–
The ADR280 voltage reference is ideal for use with analog baseband ICs in GSM and 3G mobile station applications. Figure 12
illustrates the use of the ADR280 with the AD6535 GSM analog
baseband. The AD6535 provides all of the data converters and
power management functions needed to implement a GSM
mobile station, including baseband and audio codecs, voltage
regulators, and a battery charger. Besides low current consumption and a small footprint, the ADR280 is optimized for excellent
power supply rejection ratio (PSRR) necessary for optimum
AD6535 device performance when the main battery voltage
fluctuates during RF power amplifier activity.
–2.7V
Figure 10. Negative Reference
Boosted Reference with Scalable Output
A precision user defined output with boosted current capability can be implemented with the circuit shown in Figure 11. In
this circuit, U2 forces VO to be equal to VREF (1 + R2/R1) by
regulating the turn-on of M1; the load current is therefore furnished by the 5 V supply. For higher output voltage, U2 must
be changed and the supply voltage of M1 and U2 must also be
elevated and separated from the U1 input voltage. In this configuration, a 100 mA load is achievable at a 5 V supply. The higher
the supply voltage, the lower the current handling is because of
the heat generated on the MOSFET. For heavy capacitive loads,
additional buffering is needed at the output to enhance the
transient response.
DIGITAL
BASEBAND
AD6535 ANALOG
BASEBAND
RADIO
BASEBAND CODEC
AUDIO CODEC
POWER
MANAGEMENT
ADR280
VOLTAGE REFERENCE
Figure 12. GSM Mobile Station Application
–6–
REV. A
ADR280
OUTLINE DIMENSIONS
3-Lead Small Outline Transistor Package [SOT-23]
(RT-3)
Dimensions shown in millimeters
3.04
2.90
2.80
1.40
1.30
1.20
3
1
2.64
2.10
2
PIN 1
0.95 BSC
1.90 BSC
1.12
0.89
0.10
0.01
0.50
0.30
SEATING
PLANE
0.20
0.08
0.60
0.50
0.40
COMPLIANT TO JEDEC STANDARDS TO-236AB
Tape and Reel Dimensions
(RT-3)
Dimensions shown in millimeters
4.10
4.00
3.90
1.55
1.50
1.50
7" REEL 100.00
OR
13" REEL 330.00
1.10
1.00
0.90
2.05
2.00
1.95
1.85
1.75
1.65
8.30
8.00
7.70
0.35
0.30
0.25
2.80
2.70
2.60
20.20
MIN
14.40 MAX
1.50 MIN
3.55
3.50
3.45
3.20
3.10
2.90
1.00 MIN
7" REEL 50.00 MIN
OR
13" REEL 100.00 MIN
0.75 MIN
9.90
8.40
8.40
DIRECTION OF UNREELING
3-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-3)
Dimensions shown in millimeters
2.20
1.80
1.35
1.15
3
2.40
1.80
2
1
PIN 1
0.65 BSC
1.00
0.80
1.10 MAX
0.18
0.10
0.10 MAX
0.40
0.25
0.10 COPLANARITY
REV. A
13.20
13.00
12.80
SEATING
PLANE
–7–
0.30
0.10
ADR280
Revision History
Location
Page
6/03—Data Sheet changed from REV. 0 to REV. A.
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to TPCs 4, 6, and 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated SOT-23 OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
–8–
REV. A
C03065–0–6/03(A)
Added SC70 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal