Fairchild FDMB668P P-channel 1.8v logic level powertrench mosfet -20v, -6.1a, 35mohm Datasheet

FDMB668P
tm
®
P-Channel 1.8V Logic Level PowerTrench MOSFET
-20V, -6.1A, 35mΩ
Features
General Description
FDMB668P is excellent for load switch and DC-DC conversion
among portable electronics. It achieves an optimal balance
among efficiency, thermal transfer and small form by integrating
a P-channel MOSFET with minimized on-state resistance into a
MicroFET 3x1.9 package. When optimizing the dimension of
portable applications, this little device offers a very efficient
solution.
„ Max rDS(on) = 35mΩ at VGS = -4.5V, ID = -6.1A
„ Max rDS(on) = 50mΩ at VGS = -2.5V, ID = -5.1A
„ Max rDS(on) = 70mΩ at VGS = -1.8V, ID = -4.3A
„ Excellent for portable application at VGS = -1.8V
„ Thin profile - Maximum height = 0.8mm
„ RoHS compliant
Applications
„ Load Switch in:
-HDD
-Portable Gaming, MP3
-Notebook
„ DC/DC Conversion
PIN 1
GATE
SOURCE
MicroFET 3X1.9
D
1
8
D
D
2
7
D
D
3
6
D
G
4
5
S
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
-Continuous
Ratings
-20
Units
V
±8
V
(Note 1a)
-6.1
-Pulsed
PD
TJ, TSTG
-40
Power Dissipation
(Note 1a)
1.9
Power Dissipation
(Note 1b)
0.8
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
65
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
165
°C/W
Package Marking and Ordering Information
Device Marking
668
Device
FDMB668P
©2007 Fairchild Semiconductor Corporation
FDMB668P Rev.B
Package
MicroFET 3X1.9
1
Reel Size
7”
Tape Width
8mm
Quantity
3000 units
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FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
February 2007
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250µA, VGS = 0V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
-20
ID = -250µA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = -16V, VGS = 0V
IGSS
Gate to Source Leakage Current
VGS = ±8V, VDS = 0V
V
-11.4
mV/°C
-1
µA
±100
nA
-1.0
V
On Characteristics (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250µA
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250µA, referenced to 25°C
2.8
VGS = -4.5V, ID = -6.1A
22
35
VGS = -2.5V, ID = -5.1A
27
50
VGS = -1.8V, ID = -4.3A
35
70
VGS = -4.5V, ID = -6.1A,TJ = 125°C
31
50
VDS = -4.5V, ID = -6.1A
27
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
-0.4
-0.6
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -10V, VGS = 0V,
f = 1MHz
1565
2085
pF
210
280
pF
175
265
pF
7
14
ns
9
18
ns
176
282
ns
84
135
ns
42
59
nC
22
31
nC
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
VGS = 0V to -10V
Qg
Total Gate Charge
VGS = 0V to -5V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -10V, ID = -6.1A
VGS = -4.5V, RGEN = 6Ω
VDD = -10V
ID = -6.1A
3
nC
5
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0V, IS = -1.6A
(Note 2)
IF = -6.1A, di/dt = 100A/µs
-0.7
-1.2
V
29
44
ns
15
23
nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a) 65°C/W when mounted on a
1in2 pad of 2 oz copper
b) 165°C/W when mounted on a
minimum pad .
2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2%.
FDMB668P Rev.B
2
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FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
VGS = -4.5V
32
3.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
40
VGS = -3.0V
VGS = -2.5V
24
16
VGS = -1.8V
VGS = -1.5V
8
0
0
1
2
3
4
5
2.5
2.0
VGS = -3.0V
VGS = -2.5V
1.5
1.0
0.5
VGS = -4.5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
0
8
-VDS, DRAIN TO SOURCE VOLTAGE (V)
24
32
40
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
50
1.6
ID = -6.1A
VGS = -4.5V
1.4
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
16
-ID, DRAIN CURRENT(A)
Figure 1. On-Region Characteristics
1.2
1.0
0.8
0.6
-75
-50
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
-IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
TJ = 25oC
VDD = -5V
TJ = 150oC
20
TJ =
-55oC
10
0
0.0
0.5
1.0
1.5
2.0
2.5
-VGS, GATE TO SOURCE VOLTAGE (V)
3.0
Figure 5. Transfer Characteristics
FDMB668P Rev.B
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
40
TJ = 125oC
35
30
25
20
TJ = 25oC
1
2
3
4
-VGS, GATE TO SOURCE VOLTAGE (V)
5
Figure 4. On-Resistance vs Gate to
Source Voltage
40
30
ID =-6.1A
45
Figure 3. Normalized On- Resistance
vs Junction Temperature
-ID, DRAIN CURRENT (A)
VGS = -1.8V
VGS = -1.5V
100
VGS = 0V
10
1
TJ = 150oC
TJ = 25oC
0.1
0.01
TJ = -55oC
1E-3
0.0
0.2
0.4
0.6
0.8
1.0
-VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
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FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
-VGS, GATE TO SOURCE VOLTAGE(V)
10
5000
ID = -6.1A
Ciss
CAPACITANCE (pF)
8
VDD = -10V
6
VDD = -5V
VDD = -15V
4
2
0
0
5
10
15 20 25 30
Qg, GATE CHARGE(nC)
35
40
1000
Crss
f = 1MHz
VGS = 0V
100
0.1
45
Figure 7. Gate Charge Characteristics
P(PK), PEAK TRANSIENT POWER (W)
-ID, DRAIN CURRENT (A)
rDS(on) LIMITED
1ms
10ms
1
100ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 165oC/W
TA = 25oC
0.1
0.01
0.01
1s
10s
DC
0.1
1
10
100
90
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
60
TA = 25oC
30
SINGLE PULSE
o
RθJA = 165 C/W
0
-3
10
-2
-1
10
0
1
2
10
10
10
t, PULSE WIDTH (s)
10
3
10
Figure 10. Single Pulse Maximum
Power Dissipation
DUTY CYCLE-DESCENDING ORDER
1
NORMALIZED THERMAL
IMPEDANCE, ZθJA
150 – T A
----------------------125
I = I25
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
2
20
1
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
20
10
Coss
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.1
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
EAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
0.01
-3
10
-2
10
-1
0
10
10
1
10
2
10
3
10
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Transient Thermal Response Curve
FDMB668P Rev.B
4
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FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
www.fairchildsemi.com
5
FDMB668P Rev.B
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Advance Information
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Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
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First Production
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supplementary data will be published at a later date.
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I22
FDMB668P Rev. B
6
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FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET
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