Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 LMV79x 17-MHz, Low-Noise, CMOS Input, 1.8-V Operational Amplifiers With Shutdown 1 Features 3 Description Typical 5-V Supply, Unless Otherwise Noted 1 • • • • • • • • • Input Referred Voltage Noise 5.8 nV/√Hz Input Bias Current 100 fA Unity Gain Bandwidth 17 MHz Supply Current per Channel Enable Mode – LMV791 1.15 mA – LMV792 1.30 mA Supply Current per Channel in Shutdown Mode 0.02 µA Rail-to-Rail Output Swing – At 10-kΩ Load, 25 mV from Rail – At 2-kΩ Load, 45 mV from Rail Ensured 2.5-V and 5-V Performance Total Harmonic Distortion 0.01% at1 kHz, 600 Ω Temperature Range −40°C to 125°C 2 Applications • • • • • The LMV791 (single) and the LMV792 (dual) lownoise, CMOS input operational amplifiers offer a low input voltage noise density of 5.8 nV/√Hz while consuming only 1.15 mA (LMV791) of quiescent current. The LMV791 and LMV792 are unity gain stable operational amplifiers and have gain bandwidth of 17 MHz. The LMV79x have a supply voltage range of 1.8 V to 5.5 V and can operate from a single supply. The LMV79x each feature a rail-to-rail output stage capable of driving a 600-Ω load and sourcing as much as 60 mA of current. The LMV79x family provides optimal performance in low-voltage and low-noise systems. A CMOS input stage, with typical input bias currents in the range of a few femtoamperes, and an input common-mode voltage range which includes ground, make the LMV791 and the LMV792 ideal for low-power sensor applications. The LMV79x family has a built-in enable feature which can be used to optimize power dissipation in low power applications. The LMV791x are manufactured using TI’s advanced VIP50 process and are offered in a 6-pin SOT and a 10-pin VSSOP package respectively. Photodiode Amplifiers Active Filters and Buffers Low-Noise Signal Processing Medical Instrumentation Sensor Interface Applications Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LMV791 SOT (6) 2.90 mm × 1.60 mm LMV792 VSSOP (10) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Photodiode Transimpedance Amplifier Low-Noise CMOS Input CF 100 + V = 5.5V IIN CCM CD VB + + VOUT CIN = CD + CCM VOUT = - RF IIN VOLTAGE NOISE (nV/ Hz) RF V+ = 2.5V 10 1 1 10 100 1k 10k 100k FREQUENCY (Hz) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 6 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. 2.5-V Electrical Characteristics ................................ 5-V Electrical Characteristics ................................... Typical Characteristics .............................................. Detailed Description ............................................ 16 7.1 Overview ................................................................. 16 7.2 Functional Block Diagram ....................................... 16 7.3 Feature Description................................................. 16 7.4 Device Functional Modes........................................ 17 8 Application and Implementation ........................ 19 8.1 Application Information............................................ 19 8.2 Typical Applications ............................................... 19 9 Power Supply Recommendations...................... 24 10 Layout................................................................... 24 10.1 Layout Guidelines ................................................. 24 10.2 Layout Example .................................................... 24 11 Device and Documentation Support ................. 25 11.1 11.2 11.3 11.4 11.5 11.6 11.7 Device Support .................................................... Documentation Support ....................................... Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 25 25 25 25 25 25 26 12 Mechanical, Packaging, and Orderable Information ........................................................... 26 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (March 2013) to Revision G Page • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 • Updated the format of the Enable and Shutdown Pin Voltage Range in the 2.5-V Electrical Characteristics table for clarity ...................................................................................................................................................................................... 5 • Updated the format of the Enable and Shutdown Pin Voltage Range in the 5-V Electrical Characteristics table for clarity . 7 Changes from Revision E (March 2013) to Revision F • 2 Page Changed layout of National Data Sheet to TI format ........................................................................................................... 23 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 5 Pin Configuration and Functions LMV791 DDC Package 6-Pin SOT Top View 6 1 OUTPUT + V 5 V - EN 2 + - 4 3 +IN -IN Pin Functions—LMV791 PIN NAME NO. I/O DESCRIPTION EN 5 I Enable +IN 3 I Noninverting Input –IN 4 I Inverting Input Out 1 O Output V+ 6 P Positive (highest) Supply Voltage V– 2 P Negative (lowest) Supply Voltage LMV792 DGS Package 10-Pin VSSOP Top View 1 10 2 9 - IN A- OUT B + 3 V - EN A 8 + IN B- - IN A+ + V OUT A 4 7 5 6 IN B+ EN B Pin Functions—LMV792 PIN I/O DESCRIPTION 5 I Enable A 6 I Enable B IN A+ 3, 7 I Inverting Input IN A– NAME NO. EN A EN B 2, 8 I Noninverting Input Out 1 O Output B Out B 9 O Output B V+ 10 P Positive (highest) Supply Voltage V– 4 P Negative (lowest) Supply Voltage Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 3 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) See MIN VIN differential MAX UNIT ±0.3 V 6 V − + Supply voltage (V – V ) V− − 0.3 V 150 °C Infrared or convection (20 sec) 235 °C Wave soldering lead temperature (10 sec) 260 °C 150 °C V+ + 0.3 Input/Output pin voltage Junction temperature (3) Soldering information −65 Storage temperature, Tstg (1) (2) (3) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) (3) (4) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) ±1000 Machine model (4) ±200 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Human Body Model is 1.5 kΩ in series with 100 pF. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Machine Model is 0 Ω in series with 200 pF 6.3 Recommended Operating Conditions MIN MAX UNIT −40 125 °C 2 5.5 V 1.8 5.5 V Temperature (1) Supply voltage (V+ – V−) (1) −40°C ≤ TJ ≤ 125°C 0°C ≤ TJ ≤ 125°C The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB. 6.4 Thermal Information THERMAL METRIC (1) LMV791 LMV792 DDC (SOT-23) DGS (VSSOP) UNIT 6 PINS 10 PINS RθJA Junction-to-ambient thermal resistance (2) 191.8 179.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 68.1 70.5 °C/W RθJB Junction-to-board thermal resistance 36.9 99.7 °C/W ψJT Junction-to-top characterization parameter 2.2 11.6 °C/W ψJB Junction-to-board characterization parameter 36.5 98.2 °C/W (1) (2) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 6.5 2.5-V Electrical Characteristics Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 2.5 V, V− = 0 V, VCM = V+/2 = VO, VEN = V+. PARAMETER VOS Input offset voltage TC VOS Input offset voltage temperature drift IB Input bias current TEST CONDITIONS MIN (1) TJ = 25 °C Input offset current CMRR PSRR Common-mode rejection ratio Power supply rejection ratio Common-mode voltage range LMV791 (3) −1 LMV792 (3) −1.8 VCM = 1 V (4) (5) 0.05 −40°C ≤ TJ ≤ 125 °C 100 0 V ≤ VCM ≤ 1.4 V 2.0V ≤ V+ ≤ 5.5V, VCM = 0 V TJ = 25 °C 80 −40°C ≤ TJ ≤ 125°C 75 TJ = 25 °C 80 −40°C ≤ TJ ≤ 125°C 75 fA 94 dB 80 100 dB 98 CMRR ≥ 60 dB TJ = 25 °C −0.3 1.5 CMRR ≥ 55 dB −40°C ≤ TJ ≤ 125°C −0.3 1.5 Open-loop voltage gain LMV792 Output voltage swing high + RLOAD = 10 kΩ to V /2 VOUT + RLOAD = 2 kΩ to V /2 Output voltage swing low RLOAD = 10 kΩ to V+/2 − Sourcing to V VIN = 200 mV (6) Output current + Sinking to V VIN = –200 mV (6) Enable mode VEN ≥ 2.1 V Supply current per amplifier Shutdown mode, VEN < 0.4 per channel TJ = 25 °C 85 −40°C ≤ TJ ≤ 125°C 80 TJ = 25 °C 82 −40°C ≤ TJ ≤ 125°C 78 V 98 92 dB TJ = 25 °C 88 −40°C ≤ TJ ≤ 125°C 84 TJ = 25 °C 110 25 −40°C ≤ TJ ≤ 125°C 20 −40°C ≤ TJ ≤ 125°C 30 −40°C ≤ TJ ≤ 125°C 15 −40°C ≤ TJ ≤ 125°C mV from either rail 65 67 TJ = 25 °C 35 −40°C ≤ TJ ≤ 125°C 28 LMV792 per channel 75 78 TJ = 25 °C 47 mA 7 −40°C ≤ TJ ≤ 125°C 65 71 TJ = 25 °C TJ = 25 °C 75 82 TJ = 25 °C LMV791 Slew rate pA 10 RLOAD = 2 kΩ to V+/2 SR 1 25 VCM = 1 V (5) VOUT = 0.15 V to 2.2 V, RLOAD = 10 kΩ to V+/2 IS UNIT μV/°C −40°C ≤ TJ ≤ 85 °C LMV791 IOUT ±1.35 mV VOUT = 0.15 V to 2.2 V, RLOAD = 2 kΩ to V+/2 AVOL 0.1 ±1.65 1.8 V ≤ V+ ≤ 5.5 V, VCM = 0 V CMVR MAX (1) −40°C ≤ TJ ≤ 125°C TJ = 25 °C IOS TYP (2) 15 5 TJ = 25 °C 0.95 −40°C ≤ TJ ≤ 125°C 1.3 1.65 mA TJ = 25 °C 1.1 −40°C ≤ TJ ≤ 125°C 1.50 1.85 TJ = 25 °C 0.02 1 μA −40°C ≤ TJ ≤ 125°C 5 AV = +1, Rising (10% to 90%) 8.5 AV = +1, Falling (90% to 10%) 10.5 V/μs GBW Gain bandwidth 14 MHz en Input referred voltage noise density f = 1 kHz 6.2 nV/√Hz in Input referred current noise density f = 1 kHz 0.01 pA/√Hz ton Turnon time 140 ns toff Turnoff time 1000 ns Enable mode VEN (1) (2) (3) (4) (5) (6) 2.1 2 Enable pin voltage range V Shutdown mode 0.5 0.4 Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the statistical quality control (SQC) method. Typical values represent the parametric norm at the time of characterization. Offset voltage average drift is determined by dividing the change in VOS by temperature change. Positive current corresponds to current flowing into the device. This parameter is specified by design and/or characterization and is not tested in production. The short circuit test is a momentary test, the short circuit duration is 1.5 ms. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 5 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 2.5-V Electrical Characteristics (continued) Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 2.5 V, V− = 0 V, VCM = V+/2 = VO, VEN = V+. PARAMETER IEN Enable pin input current THD+N Total harmonic distortion + noise MIN (1) TEST CONDITIONS Enable mode VEN = 2.5 V (4) Shutdown mode VEN = 0 V (4) f = 1 kHz, AV = 1, RLOAD = 600 Ω TYP (2) MAX (1) 1.5 3 0.003 0.1 UNIT μA 0.01% 6.6 5-V Electrical Characteristics Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 5 V, V− = 0 V, VCM = V+/2 = VO, VEN = V+. PARAMETER VOS Input offset voltage TC VOS Input offset voltage temperature drift IB Input bias current MIN (1) TEST CONDITIONS TJ = 25 °C Input offset current CMRR PSRR Common-mode rejection ratio Power supply rejection ratio Common-mode voltage range LMV791 (3) −1 LMV792 (3) −1.8 VCM = 2 V (4) (5) 0.1 −40°C ≤ TJ ≤ 125°C 100 0 V ≤ VCM ≤ 3.7 V 2.0V ≤ V+ ≤ 5.5 V, VCM = 0V TJ = 25 °C 80 −40°C ≤ TJ ≤ 125°C 75 TJ = 25 °C 80 −40°C ≤ TJ ≤ 125°C 75 dB 80 100 dB 98 TJ = 25 °C −0.3 4 CMRR ≥ 55 dB −40°C ≤ TJ ≤ 125°C −0.3 4 Open-loop voltage gain LMV792 RLOAD = 10 kΩ to V+/2 VOUT Output current + Sinking to V VIN = –200 mV (6) Supply current per amplifier Shutdown mode (VEN ≤ 0.4 V) 82 −40°C ≤ TJ ≤ 125°C 78 V 97 89 dB TJ = 25 °C 110 35 −40°C ≤ TJ ≤ 125°C 25 −40°C ≤ TJ ≤ 125°C 42 −40°C ≤ TJ ≤ 125°C 45 −40°C ≤ TJ ≤ 125°C mV from either rail 80 83 20 −40°C ≤ TJ ≤ 125°C 65 67 TJ = 25 °C 45 −40°C ≤ TJ ≤ 125°C 37 TJ = 25 °C 10 60 mA −40°C ≤ TJ ≤ 125°C 21 6 TJ = 25 °C 1.15 −40°C ≤ TJ ≤ 125°C TJ = 25 °C 1.4 1.75 mA 1.3 −40°C ≤ TJ ≤ 125°C −40°C ≤ TJ ≤ 125°C 75 78 TJ = 25 °C TJ = 25 °C 65 71 TJ = 25 °C TJ = 25 °C LMV792 per channel 75 82 TJ = 25 °C LMV791 Enable mode VEN ≥ 4.6 V TJ = 25 °C 84 LMV792 Sourcing to V− VIN = 200 mV (6) 80 88 RLOAD = 2 kΩ to V /2 RLOAD = 10 kΩ to V+/2 85 −40°C ≤ TJ ≤ 125°C −40°C ≤ TJ ≤ 125°C LMV791 Output voltage swing low TJ = 25 °C TJ = 25 °C + 6 fA 100 CMRR ≥ 60 dB Output voltage swing high (2) (3) (4) (5) (6) pA 10 RLOAD = 2 kΩ to V+/2 (1) 1 25 VCM = 2 V (5) VOUT = 0.3V to 4.7V, RLOAD = 10 kΩ to V+/2 IS μV/°C −40°C ≤ TJ ≤ 85°C LMV791 IOUT UNIT mV VOUT = 0.3V to 4.7V, RLOAD = 2 kΩ to V+/2 AVOL ±1.35 ±1.65 1.8V ≤ V+ ≤ 5.5 V, VCM = 0 V CMVR MAX (1) 0.1 −40°C ≤ TJ ≤ 125°C TJ = 25 °C IOS TYP (2) 1.7 2.05 0.14 1 μA 5 Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the statistical quality control (SQC) method. Typical values represent the parametric norm at the time of characterization. Offset voltage average drift is determined by dividing the change in VOS by temperature change. Positive current corresponds to current flowing into the device. This parameter is specified by design and/or characterization and is not tested in production. The short circuit test is a momentary test, the short circuit duration is 1.5 ms. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 5-V Electrical Characteristics (continued) Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 5 V, V− = 0 V, VCM = V+/2 = VO, VEN = V+. MIN (1) TYP (2) AV = +1, Rising (10% to 90%) 6 9.5 AV = +1, Falling (90% to 10%) 7.5 11.5 PARAMETER SR Slew rate TEST CONDITIONS MAX (1) UNIT V/μs GBW Gain bandwidth 17 MHz en Input referred voltage noise density f = 1 kHz 5.8 nV/√Hz in Input referred current noise density f = 1 kHz 0.01 pA/√Hz ton Turnon time 110 ns toff Turnoff time 800 ns Enable mode VEN 4.6 4.5 Enable pin voltage range V Shutdown mode IEN Enable pin input current THD+N Total harmonic distortion + noise Enable mode VEN = 5 V 0.5 (4) Shutdown mode VEN = 0 V (4) f = 1 kHz, AV = 1, RLOAD = 600 Ω 0.4 5.6 10 0.005 0.2 0.01% Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 μA 7 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 6.7 Typical Characteristics Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 2 2 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 125°C 1.6 125°C 25°C 1.2 0.8 -40°C 0.4 0 1.5 2.5 3.5 4.5 1.6 25°C 1.2 -40°C 0.8 0.4 0 1.5 5.5 6.0 2.5 3.5 + 4.5 5.5 6 + V (V) V (V) Figure 1. Supply Current vs Supply Voltage (LMV791) Figure 2. Supply Current vs Supply Voltage (LMV792) 1.8 0.5 1.6 0.45 + V = 1.8V 0.4 -40°C 1.2 VOS (mV) SUPPLY CURRENT (PA) 125°C 1.4 1 0.8 0.6 25°C 0.35 0.3 0.4 0.2 0.2 0.15 -40°C 0 1.5 2.5 3.5 4.5 5.5 25°C 0.25 125°C 0.1 -0.3 6.0 0 0.3 + 0.55 0.5 + 125°C -40°C 0.35 0.4 0.3 VOS (mV) VOS (mV) 0.4 0.35 25°C 0.3 0.25 25°C 0.25 0.2 0.15 -40°C 0.2 125°C 0.1 0.15 0.05 0.4 1.1 1.8 0 -0.3 VCM (V) 0.6 1.5 2.4 3.3 4.2 VCM (V) Figure 5. VOS vs VCM 8 + V = 5V 0.45 0.45 0.1 -0.3 1.2 Figure 4. VOS vs VCM V = 2.5V 0.5 0.9 VCM (V) V (V) Figure 3. Supply Current vs Supply Voltage in Shutdown Mode 0.6 0.6 Figure 6. VOS vs VCM Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 0.5 13 0.45 12 0.4 VOS (mV) SLEW RATE (V/Ps) -40°C 0.35 0.3 0.25 25°C 0.2 0.15 11 FALLING 10 9 8 RISING 125°C 0.1 7 0.05 0 1.5 2.5 3.5 4.5 6 1.8 5.5 6.0 2.3 2.8 3.3 4.3 V (V) 2.4 + + 125°C V = 5V 125°C 1.1 SUPPLY CURRENT (mA) 1.3 SUPPLY CURRENT (mA) 5.3 5.5 Figure 8. Slew Rate vs Supply Voltage V = 2.5V 25°C 0.9 -40°C 0.7 0.5 0.3 1.9 25°C 1.4 -40°C 0.9 -40°C 0.4 125°C 0.1 -0.1 -0.1 0 0.5 1 1.5 2 2.5 0 1 Figure 9. Supply Current vs Enable Pin Voltage (LMV791) 1.7 3 4 5 Figure 10. Supply Current vs Enable Pin Voltage(LMV791) 2.4 + 125°C V = 2.5V 1.5 2 ENABLE PIN VOLTAGE (V) ENABLE PIN VOLTAGE (V) + V = 5V 125°C 25°C 1.3 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 4.8 Figure 7. VOS vs Supply Voltage V (V) 1.5 3.8 + + 1.1 0.9 -40°C 0.7 0.5 0.3 1.9 1.4 25°C 0.9 -40°C -40°C 25°C 0.4 125°C 0.1 -0.1 -0.1 0 0.5 1 1.5 2 2.5 0 1 2 3 4 5 ENABLE PIN VOLTAGE (V) ENABLE PIN VOLTAGE (V) Figure 11. Supply Current vs Enable Pin Voltage (LMV792) Figure 12. Supply Current vs Enable Pin Voltage (LMV792) Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 9 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 1.5 50 + V = 5V -40°C 30 0.5 20 IBIAS (pA) 0 IBIAS (pA) + V = 5V 40 1 -0.5 25°C -1 -1.5 125°C 10 0 85°C -10 -20 -2 -30 -2.5 -40 -3 -50 0 1 2 3 4 0 1 2 VCM (V) Figure 13. Input Bias Current vs VCM 35 70 30 125°C 125°C 25 -40°C 50 ISINK (mA) ISOURCE (mA) 60 25°C 40 30 25°C 20 15 -40°C 10 20 5 10 0 0 1 2 3 4 5 6 1 2 3 4 5 6 + V+ (V) V (V) Figure 15. Sourcing Current vs Supply Voltage Figure 16. Sinking Current vs Supply Voltage 70 30 125°C 60 125°C 25 50 20 ISINK (mA) ISOURCE (mA) 4 Figure 14. Input Bias Current vs VCM 80 -40°C 40 25°C 30 25°C 15 10 -40°C 20 5 10 0 0 0 10 3 VCM (V) 1 2 3 4 5 0 1 2 3 4 5 VOUT (V) VOUT (V) Figure 17. Sourcing Current vs Output Voltage Figure 18. Sinking Current vs Output Voltage Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 40 25 RLOAD = 10 k: -40°C 25°C VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) 35 30 125°C 25 25°C 20 -40°C 15 10 20 15 125°C 10 5 5 RLOAD = 10 k: 0 1.8 2.5 3.2 3.9 4.6 5.3 0 1.8 6 2.5 3.2 3.9 4.6 5.3 6 + + Figure 19. Positive Output Swing vs Supply Voltage Figure 20. Negative Output Swing vs Supply Voltage 50 50 45 45 125°C 40 25°C 35 30 25 20 -40°C 15 40 35 125°C 30 25 20 15 10 10 5 -40°C 25°C VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) V (V) V (V) 5 RLOAD = 2 k: 0 1.8 2.5 3.2 RLOAD = 2 k: 0 1.8 2.5 3.2 3.9 4.6 5.3 6 3.9 4.6 5.3 6 + + V (V) V (V) Figure 21. Positive Output Swing vs Supply Voltage Figure 22. Negative Output Swing vs Supply Voltage 100 25°C 100 80 125°C 70 60 125°C RLOAD = 600: VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) 90 120 RLOAD = 600: 25°C 50 40 -40°C 30 20 80 -40°C 60 40 20 10 0 1.8 2.5 3.2 3.9 4.6 5.3 6 0 1.8 2.5 3.2 3.9 4.6 5.3 6 + + V (V) V (V) Figure 23. Positive Output Swing vs Supply Voltage Figure 24. Negative Output Swing vs Supply Voltage Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 11 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 100 VS = ±2.5V + VCM = 0.0V V+ = 2.5V 400 nV/DIV VOLTAGE NOISE (nV/ Hz) V = 5.5V 10 1 1 10 1k 100 10k 100k 1S/DIV FREQUENCY (Hz) Figure 25. Input Referred Voltage Noise vs Frequency Figure 26. Time Domain Voltage Noise 0 60 + V = 1.2V US% - -20 V = -0.6V AV = +2 50 -40 OS% THD+N (dB) OVERSHOOT AND UNDERSHOOT % 70 40 30 20 -60 RLOAD = 600: -80 -100 10 RLOAD = 100 k: 0 20 0 40 80 60 100 -120 0.02 120 0.2 2 CLOAD (pF) OUTPUT AMPLITUDE (V) Figure 27. Overshoot and Undershoot vs CLOAD Figure 28. THD+N vs Peak-to-Peak Output Voltage (VOUT) 0 0.006 + 0.005 RL = 600: 0.004 -60 THD+N (%) THD+N (dB) V = 2.75V -20 V = -2.75V AV = +2 -40 RLOAD = 600: -80 -100 RL = 100 k: 0.003 0.002 V+ = 1.2V - V = 0.6V -120 RLOAD = 100 k: -140 0.02 0.2 2 4 0.001 VO = 0.9 VPP AV = +2 0 10 100 OUTPUT AMPLITUDE (V) 12 1k 10k 100k FREQUENCY (Hz) Figure 29. THD+N vs Peak-to-Peak Output Voltage (VOUT) Figure 30. THD+N vs Frequency Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. 120 120 PHASE 100 100 RL = 600: 0.005 CL = 20 pF 80 60 GAIN (dB) THD+N (%) 0.004 + 0.003 V = 2.5V - V = 2.5V 0.002 CL = 50 pF VO = 4 VPP GAIN 40 CL = 20 pF CL = 50 pF -40 RL = 100 k: 0 10 100 1k CL = 100 pF -60 10k 1k 100k 10k 1M 10M -20 -40 -60 100M Figure 32. Open-Loop Gain and Phase With Capacitive Load 100 120 120 PHASE 80 80 60 60 40 40 GAIN 20 20 0 0 OUTPUT IMPEDANCE (:) 100 PHASE (°) GAIN (dB) 100k 0 FREQUENCY (Hz) FREQUENCY (Hz) Figure 31. THD+N vs Frequency 100 40 20 20 -20 0.001 60 CL = 100 pF 0 AV = +2 80 PHASE (°) 0.006 -20 -20 10 1 0.1 -40 -40 RLOAD = 600: 10 k: 10 M: -60 10k 100k 1M 0.01 10 -60 100M 10M 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 33. Open-Loop Gain and Phase With Resistive Load Figure 34. Closed-Loop Output Impedance vs Frequency 140 120 100 10 mV/DIV CROSSTALK REJECTION RATION (dB) 160 80 60 40 INPUT = 20 mVPP f = 1 MHz 20 + V = 2.5V 0 1k 10k 100k 1M 10M FREQUENCY (Hz) 100M 200 ns/DIV AV = +1 Figure 35. Crosstalk Rejection Figure 36. Small Signal Transient Response Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 13 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Typical Characteristics (continued) 10 mV/DIV 200 mV/DIV Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. INPUT = 20 mVPP f = 1 MHz INPUT = 1 VPP f = 200 kHz + + V = 5V V = 2.5V 800 ns/DIV 200 ns/DIV AV = +1 AV = +1 Figure 37. Large Signal Transient Response Figure 38. Small Signal Transient Response 50 RLOAD = 600: 200 mV/DIV PHASE MARGIN (°) 40 INPUT = 1 VPP f = 200 kHz + V = 5V RLOAD = 10 k: 30 20 RLOAD = 10 M: 10 0 + V = 2.5V -10 10 100 1000 800 ns/DIV CLOAD (pF) AV = +1 Figure 39. Large Signal Transient Response Figure 40. Phase Margin vs Capacitive Load (Stability) 0 50 RLOAD = 600: -20 RLOAD = 10 k: 30 20 RLOAD = 10 M: 10 POSITIVE PSRR (dB) PHASE MARGIN (°) 40 -40 -60 -80 0 1.8V + V = 5V -10 10 14 5.5V -100 100 1000 10 100 1k 10k 100k 1M 10M CLOAD (pF) FREQUENCY (Hz) Figure 41. Phase Margin vs Capacitive Load (Stability) Figure 42. Positive PSRR vs Frequency Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Typical Characteristics (continued) Unless otherwise specified, TA = 25°C, V– = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+. -20 120 100 + V = 2.5V 80 -60 CMRR (dB) NEGATIVE PSRR (dB) -40 + V = 1.8V -80 + V = 5V 60 40 -100 20 + V = 5.5V -120 10 100 1k 10k 100k 1M 0 10M 10 1k 100 FREQUENCY (Hz) 10k 100k 1M FREQUENCY (Hz) Figure 43. Negative PSRR vs Frequency Figure 44. CMRR vs Frequency 25 + V = 5V CCM (pF) 20 15 10 5 0 0 1 2 3 4 VCM (V) Figure 45. Input Common-Mode Capacitance vs VCM Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 15 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 7 Detailed Description 7.1 Overview The LMV79x family provides optimal performance in low-voltage and low-noise systems. A low-noise CMOS input stage, with typical input bias currents in the range of a few femtoamperes, and an input common-mode voltage range which includes ground make the LMV791 and the LMV792 ideal for low-power sensor applications 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Wide Bandwidth at Low Supply Current The LMV791 and LMV792 are high performance operational amplifiers that provide a unity gain bandwidth of 17 MHz while drawing a low supply current of 1.15 mA. This makes them ideal for providing wideband amplification in portable applications. The shutdown feature can also be used to design more power efficient systems that offer wide bandwidth and high performance while consuming less average power. 7.3.2 Low Input Referred Noise and Low Input Bias Current The LMV79x have a very low input referred voltage noise density (5.8 nV/√Hz at 1 kHz). A CMOS input stage ensures a small input bias current (100 fA) and low input referred current noise (0.01 pA/√Hz). This is very helpful in maintaining signal fidelity, and makes the LMV791 and LMV792 ideal for audio and sensor-based applications. 7.3.3 Low Supply Voltage The LMV791 and the LMV792 have performance ensured at 2.5-V and 5-V supply. The LMV791 family is ensured to be operational at all supply voltages between 2 V and 5.5 V, for ambient temperatures ranging from −40°C to 125°C, thus using the entire battery lifetime. The LMV791 and LMV792 are also ensured to be operational at 1.8-V supply voltage, for temperatures between 0°C and 125°C. This makes the LMV791 family ideal for usage in low-voltage commercial applications. 7.3.4 Rail-to-Rail Output and Ground Sensing Rail-to-rail output swing provides maximum possible dynamic range at the output. This is particularly important when operating at low supply voltages. An innovative positive feedback scheme is used to boost the current drive capability of the output stage. This allows the LMV791 and the LMV792 to source more than 40 mA of current at 1.8-V supply. This also limits the performance of the LMV791 family as comparators, and hence the usage of the LMV791 and the LMV792 in an open-loop configuration is not recommended. The input common-mode range includes the negative supply rail which allows direct sensing at ground in single supply operation. 7.3.5 Shutdown Feature The LMV791 family is ideal for battery-powered systems. With a low supply current of 1.15 mA and a shutdown current of 140 nA typically, the LMV791 and LMV792 allow the designer to maximize battery life. The enable pin of the LMV791 and the LMV792 allows the operational amplifier to be turned off and reduce its supply current to less than 1 μA. To power on the operational amplifier the enable pin should be higher than V+ – 0.5 V, where V+ is the positive supply. To disable the operational amplifier, the enable pin voltage should be less than V− + 0.5 V, where V− is the negative supply. 16 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Feature Description (continued) 7.3.6 Small Size The small footprint of the LMV791 and the LMV792 package saves space on printed-circuit-boards, and enables the design of smaller electronic products, such as mobile phones, tablets, or other portable systems. Long traces between the signal source and the operational amplifier make the signal path susceptible to noise. By using a physically smaller LMV791 and LMV792 package, the operational amplifier can be placed closer to the signal source, reducing noise pick-up and increasing signal integrity. 7.4 Device Functional Modes 7.4.1 Capacitive Load Tolerance The LMV791 and LMV792 can directly drive up to 120 pF in unity gain without oscillation. The unity gain follower is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combination of the output impedance of the amplifier and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, the circuit in Figure 46 can be used. In Figure 46, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor value, the more stable VOUT will be. Increased RISO would, however, result in a reduced output swing and short circuit current. Figure 46. Isolation of CL to Improve Stability 7.4.2 Input Capacitance and Feedback Circuit Elements The LMV791 family has a very low input bias current (100 fA) and a low 1/f noise corner frequency (400 Hz), which makes it ideal for sensor applications. However, to obtain this performance a large CMOS input stage is used, which adds to the input capacitance of the operational amplifier, CIN. Though this does not affect the DC and low frequency performance, at higher frequencies the input capacitance interacts with the input and the feedback impedances to create a pole, which results in lower phase margin and gain peaking. This can be controlled by being selective in the use of feedback resistors, as well as by using a feedback capacitance, CF. For example, in the inverting amplifier shown in Figure 47, if CIN and CF are ignored and the open-loop gain of the operational amplifier is considered infinite then the gain of the circuit is −R2/R1. An operational amplifier, however, usually has a dominant pole, which causes its gain to drop with frequency. Hence, this gain is only valid for DC and low frequency. To understand the effect of the input capacitance coupled with the non-ideal gain of the operational amplifier, the circuit needs to be analyzed in the frequency domain using a Laplace transform. CF R2 R1 + VIN CIN + + - - AV = - VOUT VIN =- VOUT R2 R1 Figure 47. Inverting Amplifier Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 17 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Device Functional Modes (continued) For simplicity, the operational amplifier is modeled as an ideal integrator with a unity gain frequency of A0. Hence, its transfer function (or gain) in the frequency domain is A0/s. Solving the circuit equations in the frequency domain, ignoring CF for the moment, results in an expression for the gain shown in Equation 1. -R2/R1 (s) = 1+ s2 s + § A0 R 1 § A0 ¨ ¨C R © R1 + R2 © IN 2 § ¨ © VIN § ¨ © VOUT (1) It can be inferred from the denominator of the transfer function that it has two poles, whose expressions can be obtained by solving for the roots of the denominator and are shown in Equation 2. -1 2CIN 1 1 + r R1 R2 §1 1 + ¨ R2 © R1 § ¨ © P1,2 = 2 - 4 A0CIN R2 (2) Equation 2 shows that as the values of R1 and R2 are increased, the magnitude of the poles, and hence the bandwidth of the amplifier, is reduced. This theory is verified by using different values of R1 and R2 in the circuit shown in Figure 46 and by comparing their frequency responses. In Figure 48 the frequency responses for three different values of R1 and R2 are shown. When both R1 and R2 are 1 kΩ, the response is flattest and widest; whereas, it narrows and peaks significantly when both their values are changed to 10 kΩ or 30 kΩ. So it is advisable to use lower values of R1 and R2 to obtain a wider and flatter response. Lower resistances also help in high-sensitivity circuits because they add less noise. A way of reducing the gain peaking is by adding a feedback capacitance CF in parallel with R2. This introduces another pole in the system and prevents the formation of pairs of complex conjugate poles which cause the gain to peak. Figure 49 shows the effect of CF on the frequency response of the circuit. Adding a capacitance of 2 pF removes the peak, while a capacitance of 5 pF creates a much lower pole and reduces the bandwidth excessively. 15 20 R1, R2 = 30 k: AV = -1 10 10 CF = 0 pF AV = -1 0 0 GAIN (dB) GAIN (dB) 5 -5 R1, R2 = 30 k: -10 CF = 5 pF -10 CF = 2 pF -20 R1, R2 = 10 k: -15 R1, R2 = 1 k: -30 -20 -25 10k 100k 1M 10M 100M -40 10k FREQUENCY (Hz) 1M 10M FREQUENCY (Hz) Figure 48. Gain Peaking Caused by Large R1, R2 18 100k Figure 49. Gain Peaking Eliminated by CF Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LMV791 and LMV792 family of amplifiers is specified for operation from 1.8 V to 5.5 V. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics section. 8.2 Typical Applications These application examples highlight a few of the circuits where the LMV791 and LMV792 may be used. 8.2.1 Transimpedance Amplifier CMOS input operational amplifiers are often used in transimpedance applications as they have an extremely high input impedance. A transimpedance amplifier converts a small input current into a voltage. This current is usually generated by a photodiode. The transimpedance gain, measured as the ratio of the output voltage to the input current, is expected to be large and wide-band. Because the circuit deals with currents in the range of a few nA, low-noise performance is essential. The LMV79x are CMOS input operational amplifiers providing wide bandwidth and low noise performance, and are hence ideal for transimpedance applications. CF RF IIN CCM CD VB + + VOUT CIN = CD + CCM VOUT = - RF IIN Figure 50. Photodiode Transimpedance Amplifier 8.2.1.1 Design Requirements Usually, a transimpedance amplifier is designed on the basis of the current source driving the input. A photodiode is a very common capacitive current source, which requires transimpedance gain for transforming its miniscule current into easily-detectable voltages. The photodiode and gain of the amplifier are selected with respect to the speed and accuracy required of the circuit. A faster circuit would require a photodiode with lesser capacitance and a faster amplifier. A more sensitive circuit would require a sensitive photodiode and a high gain. A typical transimpedance amplifier is shown in Figure 50. The output voltage of the amplifier is given by the equation VOUT = −IINRF. Because the output swing of the amplifier is limited, RF should be selected such that all possible values of IIN can be detected. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 19 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com Typical Applications (continued) 8.2.1.2 Detailed Design Procedure The LMV79x have a large gain-bandwidth product (17 MHz), which enables high gains at wide bandwidths. A rail-to-rail output swing at 5.5-V supply allows detection and amplification of a wide range of input currents. A CMOS input stage with negligible input current noise and low input voltage noise allows the LMV79x to provide high-fidelity amplification for wide bandwidths. These properties make the LMV79x ideal for systems requiring wide-band transimpedance amplification. As mentioned earlier, the following parameters are used to design a transimpedance amplifier: the amplifier gainbandwidth product, A0; the amplifier input capacitance, CCM; the photodiode capacitance, CD; the transimpedance gain required, RF; and the amplifier output swing. Once a feasible RF is selected using the amplifier output swing, these numbers can be used to design an amplifier with the desired transimpedance gain and a maximally flat frequency response. An essential component for obtaining a maximally flat response is the feedback capacitor, CF. The capacitance seen at the input of the amplifier, CIN, combined with the feedback capacitor, RF, generate a phase lag which causes gain-peaking and can destabilize the circuit. CIN is usually just the sum of CD and CCM. The feedback capacitor CF creates a pole, fP in the noise gain of the circuit, which neutralizes the zero in the noise gain, fZ, created by the combination of RF and CIN. If properly positioned, the noise gain pole created by CF can ensure that the slope of the gain remains at 20 dB/decade till the unity gain frequency of the amplifier is reached, thus ensuring stability. As shown in Figure 51, fP is positioned such that it coincides with the point where the noise gain intersects the open-loop gain of the operational amplifier. In this case, fP is also the overall 3-dB frequency of the transimpedance amplifier. The value of CF needed to make it so is given by Equation 3. A larger value of CF causes excessive reduction of bandwidth, while a smaller value fails to prevent gain peaking and instability. CF = 1 + 1 + 4SRFCINA0 2SRFA0 (3) GAIN OP AMP OPEN LOOP GAIN fZ = fP = NOISE GAIN WITH NO CF 1 2S RFCIN NOISE GAIN WITH CF A0 2S RF(CIN+CF) fZ fP A0 FREQUENCY Figure 51. CF Selection for Stability Calculating CF from Equation 3 can sometimes return unreasonably small values (<1 pF), especially for highspeed applications. In these cases, its often more practical to use the circuit shown in Figure 52 in order to allow more reasonable values. In this circuit, the capacitance CF′ is (1+ RB/RA) time the effective feedback capacitance, CF. A larger capacitor can now be used in this circuit to obtain a smaller effective capacitance. For example, if a CF of 0.5 pF is needed, while only a 5-pF capacitor is available, RB and RA can be selected such that RB/RA = 9. This would convert a CF′ of 5 pF into a CF of 0.5 pF. This relationship holds as long as RA < RF. 20 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 Typical Applications (continued) RB RA CFc RF + IF RA < < RF RB § CF CFc = ¨1 + RA © § ¨ © Figure 52. Obtaining Small CF from large CF′ 8.2.2 Application Curves The LMV791 was used to design a number of amplifiers with varying transimpedance gains and source capacitances. The gains, bandwidths and feedback capacitances of the circuits created are summarized in Table 1. The frequency responses are presented in Figure 53 and Figure 54. The feedback capacitances are slightly different from the formula in Equation 3, because the parasitic capacitance of the board and the feedback resistor RF had to be accounted for. Table 1. Frequency Response Results Transimpedance, ATI CIN CF 3-dB Frequency 470000 50 pF 1.5 pF 350 kHz 470000 100 pF 2.0 pF 250 kHz 470000 200 pF 3.0 pF 150 kHz 47000 50 pF 4.5 pF 1.5 MHz 47000 100 pF 6.0 pF 1 MHz 47000 200 pF 9.0 pF 700 kHz 130 100 120 CIN = 50 pF, CF = 4.5 pF 95 CIN = 50 pF, CF = 1.5 pF 90 110 GAIN (dB) GAIN (dB) 85 100 90 CIN = 100 pF, CF = 2 pF 80 70 CIN = 100 pF, CF = 6 pF 75 70 CIN = 200 pF, CF = 9 pF 65 CIN = 200 pF, CF = 3 pF 60 60 50 10k 80 55 100k 1M 10M 50 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 53. Frequency Response for ATI = 470000 Figure 54. Frequency Response for ATI = 47000 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 21 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 8.2.3 High-Gain, Wideband Transimpedance Amplifier Using the LMV792 The LMV792, dual, low-noise, wide-bandwidth, CMOS input operational amplifier IC can be used for compact, robust and integrated solutions for sensing and amplifying wide-band signals obtained from sensitive photodiodes. One of the two operational amplifiers available can be used to obtain transimpedance gain while the other can be used for amplifying the output voltage to further enhance the transimpedance gain. The wide bandwidth of the operational amplifiers (17 MHz) ensures that they are capable of providing high gain for a wide range of frequencies. The low input referred noise (5.8 nV/√Hz) allows the amplifier to deliver an output with a high SNR (signal to noise ratio). The small VSSOP-10 footprint saves space on printed-circuit-boards and allows ease of design in portable products. The circuit shown in Figure 55, has the first operational amplifier acting as a transimpedance amplifier with a gain of 47000, while the second stage provides a voltage gain of 10. This provides a total transimpedance gain of 470000 with a −3-dB bandwidth of about 1.5 MHz, for a total input capacitance of 50 pF. The frequency response for the circuit is shown in Figure 56 4.5 pF 47 k: 10 k: IIN - - 792A + CIN = 50 pF 1 k: 792B + 0.1 PF + VOUT - ATI = VOUT IIN = 470,000 Figure 55. 1.5-MHz Transimpedance Amplifier, With ATI = 470000 120 110 GAIN (dB) 100 90 80 70 CIN = 50 pF CF = 4.5 pF 60 10k 100k 1M 10M FREQUENCY (Hz) Figure 56. 1.5-MHz Transimpedance Amplifier Frequency Response 8.2.4 Audio Preamplifier With Bandpass Filtering With low input referred voltage noise, low supply voltage and low supply current, and a low harmonic distortion, the LMV791 family is ideal for audio applications. Its wide unity gain bandwidth allows it to provide large gain for a wide range of frequencies and it can be used to design a preamplifier to drive a load of as low as 600 Ω with less than 0.01% distortion. Two amplifier circuits are shown in Figure 57 and Figure 58. Figure 57 is an inverting amplifier, with a 10-kΩ feedback resistor, R2, and a 1-kΩ input resistor, R1, and hence provides a gain of −10. Figure 58 is a noninverting amplifier, using the same values of R1and R2, and provides a gain of 11. In either of these circuits, the coupling capacitor CC1 decides the lower frequency at which the circuit starts providing gain, while the feedback capacitor CF decides the frequency at which the gain starts dropping off. Figure 59 shows the frequency response of the inverting amplifier with different values of CF. 22 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 + CF CC1 R1 1 k: R2 10 k: + VIN - RB1 V V CC2 + CC2 + VIN - RB2 - + + RB1 VOUT RB2 R1 1 k: AV = - R2 = -10 R1 CC1 Figure 57. Inverting Audio Preamplifier + - + R2 10 k: - VOUT CF AV = 1 + R2 R1 = 11 Figure 58. Noninverting Audio Preamplifier 25 CF = 10 pF 20 15 CF = 1 nF GAIN (dB) 10 CF = 100 pF 5 0 -5 -10 -15 -20 1 100 10 1k 100k 10k 1M FREQUENCY (Hz) Figure 59. Frequency Response of the Inverting Audio Preamplifier 8.2.5 Sensor Interfaces The low input bias current and low input referred noise of the LMV791 and LMV792 make them ideal for sensor interfaces. These circuits are required to sense voltages of the order of a few μV, and currents amounting to less than a nA, and hence the operational amplifier needs to have low voltage noise and low input bias current. Typical applications include infrared (IR) thermometry, thermocouple amplifiers and pH electrode buffers. Figure 60 is an example of a typical circuit used for measuring IR radiation intensity, often used for estimating the temperature of an object from a distance. The IR sensor generates a voltage proportional to I, which is the intensity of the IR radiation falling on it. As shown in Figure 60, K is the constant of proportionality relating the voltage across the IR sensor (VIN) to the radiation intensity, I. The resistances RA and RB are selected to provide a high gain to amplify this voltage, while CF is added to filter out the high-frequency noise. + IR SENSOR + VIN = KI - IR RADIATION INTENSITY, I RB + VOUT RA CF VOUT RA I= K(RA + RB) Figure 60. IR Radiation Sensor Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 23 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 9 Power Supply Recommendations For proper operation, the power supplies must be properly decoupled. For decoupling the supply lines, TI recommends that 10-nF capacitors be placed as close as possible to the operational amplifier power supply pins. For single-supply, place a capacitor between V+ and V– supply leads. For dual supplies, place one capacitor between V+ and ground, and one capacitor between V– and ground. 10 Layout 10.1 Layout Guidelines Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-supply applications. Noise can propagate into analog circuitry through the power pins of the circuit as a whole and operational amplifier itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. The ground pin should be connected to the PCB ground plane at the pin of the device. The feedback components should be placed as close to the device as possible minimizing strays. 10.2 Layout Example Figure 61. Typical SOT Layout 24 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 LMV791, LMV792 www.ti.com SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support For developmental support, see the following: • LMV791 PSPICE Model, SNOM056 • LMV792 PSPICE Model, SNOM057 • TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti • DIP Adapter Evaluation Module, http://www.ti.com/tool/dip-adapter-evm • TI Universal Operational Amplifier Evaluation Module, http://www.ti.com/tool/opampevm • TI Filterpro Software, http://www.ti.com/tool/filterpro 11.2 Documentation Support 11.2.1 Related Documentation For related documentation, see the following: • AN-31 Op Amp Circuit Collection, SNLA140 • Feedback Plots Define Op Amp AC Performance, SBOA015 (AB-028) • Circuit Board Layout Techniques, SLOA089 • Op Amps for Everyone, SLOD006 • Capacitive Load Drive Solution using an Isolation Resistor, TIPD128 • Handbook of Operational Amplifier Applications, SBOA092 11.3 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMV791 Click here Click here Click here Click here Click here LMV792 Click here Click here Click here Click here Click here 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 25 LMV791, LMV792 SNOSAG6G – SEPTEMBER 2005 – REVISED OCTOBER 2015 www.ti.com 11.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 26 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMV791 LMV792 PACKAGE OPTION ADDENDUM www.ti.com 10-Aug-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV791MK/NOPB ACTIVE SOT DDC 6 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS1A LMV791MKX/NOPB ACTIVE SOT DDC 6 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS1A LMV792MM/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AX2A LMV792MMX/NOPB ACTIVE VSSOP DGS 10 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM AX2A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Aug-2015 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device LMV791MK/NOPB Package Package Pins Type Drawing SOT DDC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 6 1000 178.0 B0 (mm) K0 (mm) P1 (mm) 8.4 3.2 3.2 1.4 4.0 W Pin1 (mm) Quadrant 8.0 Q3 LMV791MKX/NOPB SOT DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV792MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV792MMX/NOPB VSSOP DGS 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV791MK/NOPB SOT DDC 6 1000 210.0 185.0 35.0 LMV791MKX/NOPB SOT DDC 6 3000 210.0 185.0 35.0 LMV792MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0 LMV792MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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