Ordering number : ENA2124 LC79431KNE CMOS LSI Dot-Matrix LCD Drivers http://onsemi.com Overview The LC79431KNE is a large-scale dot matrix LCD common driver LSI. The LC79431KNE contains an 80-bit bidirectional shift register and is equipped with a 4-level LCD driver. The input/output pins for cascade connection can be used to further increase the IC’s number of bits. The LC79431KNE can be used in conjunction with segment driver LC79401KNE (QIP100E) to drive a wide-screen LCD panel. Features • On-chip LCD drive circuit (80 bits) • Display duty selection ranging from 1/64 to 1/256 • On-chip input/output pins support a further increases in bit number • Supports externally supplied bias voltage • Operating power supply voltage/operating temperature include VDD (Logic section) : 2.7 to 5.5V/-20 to +85°C VDD-VEE (LCD section) : 12 to 32V/-20 to +85°C • CMOS process • 100-pin flat plastic package (QIP100E) Semiconductor Components Industries, LLC, 2013 July, 2013 91912HKPC 20080310-S00005 No. A2124-1/7 LC79431KNE Specifications Absolute Maximum Ratings at Ta = 25±2°C, VSS = 0V Parameter Symbol Maximum supply voltage (Logic) VDD max Maximum supply voltage (LCD) VDD-VEE max Maximum input voltage VI max Storage temperature Tstg Conditions Ratings unit -0.3 to +7.0 V 0 to 35 V *1 -0.3 to VDD+0.3 V -40 to +125 °C Note *1 The following relations between elements should be maintained: VDD≥V1>V2>V5>VEE, VDD-V2≤7V, V5-VEE≤7V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Allowable Operating Ranges at Ta = -20 to +85°C, VSS = 0V Parameter Symbol Conditions Supply voltage (Logic) VDD Supply voltage (LCD) VDD-VEE *2, 3 Input high level voltage VIH DIO1, DIO80, CP, M, RS/LS, DISPOFF Input low level voltage VIL DIO1, DIO80, CP, M, RS/LS, DISPOFF CP Shift clock fCP CP CP pulse width tWC CP min typ max unit 2.7 5.5 V 12 32 V 0.8VDD V 0.2VDD 1 V MHz 63 ns ns Setup time tSETUP DIO1 → CP, DIO80 → CP 100 Hold time tHOLD DIO1 → CP, DIO80 → CP 100 CP rise time tR CP 50 ns CP fall time tF CP 50 ns ns Note *2 The following relations between elements should be maintained: VDD≥V1>V2>V5>VEE, VDD-V2≤7V, V5-VEE≤7V *3 When the power supply is turned on, power to the LCD driver is turned on after or simultaneously with the turning on of the logic section’s power supply. When the power supply is turned off, the logic power supply is turned off after or at the same time the LCD driver power supply is turned off. Electrical Characteristics at Ta = 25±2°C, VDD = 2.7 to 5.5V Parameter Symbol Conditions Input high level current IIH VIN=VDD, VDD=5.5V, DIO1, DIO80, CP, M, RS/LS, DISPOFF Input low level current IIL VIN=VSS, VDD=5.5V, DIO1, DIO80, CP, M, RS/LS, DISPOFF Output high level voltage VOH IOH=-0.4mA, DIO1, DIO80 Output low level voltage VOL IOL=0.4mA, DIO1, DIO80 Driver on resistance RON(1) RON(2) VDD-VEE=30V, ⎜VDE-VO⎜=0.5V VDD=4.5V, O1 to O80 *4 VDD-VEE=20V, ⎜VDE-VO⎜=0.5V ISS VDD=4.5V, O1 to O80 *4 VDD-VEE=30V, CP=14kHz Consumable current drain (1) min typ max 1 IEE VDD-VEE=30V, CP=14kHz no-load, VDD=5.5V ; VEE Input capacitance CI f=1MHz ; CP μA μA -1 VDD-0.4 V no-load, VDD=5.5V ; VSS Consumable current drain (2) unit 0.4 V 1.0 kΩ 1.0 kΩ 100 μA 100 μA 6 pF Note *4 VDE = V1 or V2 or V5 or VEE, V1 = VDD, V2 = 16/17 (VDD-VEE), V5 = 1/17 (VDD-VEE) Switching Characteristics at Ta = 25±2°C, VSS = 0V, VDD = 2.7 to 5.5V Parameter Output delay time Symbol Conditions min typ max unit tPLH CL=15pF ; CP → DIO1, CP → DIO80 250 ns tPHL CL=15pF ; CP → DIO1, CP → DIO80 250 ns No. A2124-2/7 LC79431KNE Package Dimensions unit:mm (typ) 3151A 23.2 0.8 20.0 51 50 100 31 14.0 81 1 17.2 80 30 0.65 0.15 0.3 0.1 3.0max (2.7) (0.58) SANYO : QIP100E(14X20) O51 O55 O54 O53 O52 O59 O58 O57 O56 O67 O66 O65 O64 O63 O62 O61 O60 O72 O71 O70 O69 O68 O76 O75 O74 O73 O80 O79 O78 O77 Pin Assignment 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 LC79431KNE 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 O50 O49 O48 O47 O46 O45 O44 O43 O42 O41 O40 O39 O38 O37 O36 O35 O34 O33 O32 O31 O30 O26 O27 O28 O29 O22 O23 O24 O25 O14 O15 O16 O17 O18 O19 O20 O21 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 O9 O10 O11 O12 O13 1 2 3 4 5 6 O5 O6 O7 O8 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 O1 O2 O3 O4 NC DIO80 NC VEE V5 V2 V1 NC DISPOFF VDD RS/LS VSS NC M NC CP NC DIO1 NC NC Top view No. A2124-3/7 LC79431KNE Equivalent Circuit Block Diagram O1 O2 O3 O79 O80 V1 VDD V2 4 Level LCD Drive Circuit (80 bits) V5 VSS VEE Level Shifter (80bits) M DISPOFF Bidirectional DIO1 I/O Shift Register (80 bits) I/O DIO80 RS/LS CP No. A2124-4/7 LC79431KNE Pin Function Pin No Symbol 90 VDD I/O 92 VSS 84 VEE 87 V1 86 V2 85 V5 96 CP I 98 DIO1 I/O 82 DIO80 I/O Supply Function VDD-VSS : Logic power supply VDD-VEE : LCD drive circuit power supply LCD drive level power supply Supply V1, VEE : Selected level V2, V5 : Unselected level Bidirectional shift register shift clock (falling edge trigger) RS/LS Data Transfer Direction DIO1 DIO80 L (Shift right) O1 → O80 IN OUT H (Shift left) O80 → O1 OUT IN 91 RS/LS I 94 M I LCD drive output alternation signal 89 DISPOFF I O1 to O80 output controlling input pins. 1 O1 LCD drive outputs The output levels are determined by the combination of the output the data, The M signal, and the DISPOFF pin as shown in the table. O M Data DISPOFF L L H V2 L H H VEE H L H V5 H H H V1 * * L V1 Output * Don’t care (May be set to either “H” or “L”) 80 O80 81 83 88 93 95 NC - Must be left open. 97 99 100 No. A2124-5/7 R R VEE + + V5 V4 Power supply circuit Case of 1/n bias (n-4)R V3 V2 V2 V5 Com238 Com239 Com240 O1 to O80 CDI CDO LC79401KNE VDD #4 VSS O1 to O80 CDI CDO LC79401KNE VDD #2 VSS CDI CDO LC79401KNE VDD #1 VSS LCD PANEL (320×240) O1 to O80 Seg3 Seg2 Seg1 R + + VEE DIO1 M CP LC79431KNE #3 V1 Com1 Com2 Com3 Seg320 Seg319 Seg318 R VSS V1 DIO80 VDD RS/LS DISPOFF O1 to O80 VDD M CP LC79431KNE #1 V1 V2 V5 RS/LS DISPOFF DIO1 GND FLM M LOAD CP DI1 to DI4 DISPOFF Controller R/L DISPOFF DI1 to DI4 M LOAD CP V1 V3 V4 VEE R/L DISPOFF DI1 to DI4 M LOAD CP V1 V3 V4 VEE R/L DISPOFF DI1 to DI4 M LOAD CP V1 V3 V4 VEE LC79431KNE Application Example (LC79401KNE/LC79431KNE) O1 to O80 DIO80 VDD VSS VEE No. A2124-6/7 LC79431KNE Switching Characteristics Diagram tR tWC tF 0.8VDD CP 0.2VDD tSETUP tHOLD DIO1 (DIO80) tPLH, tPHL DIO80 (DIO1) ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No. A2124-7/7