OP A2 09 OPA OPA209 OPA2209 OPA4209 2209 OPA 4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 2.2nV/√Hz, Low-Power, 36V, OPERATIONAL AMPLIFIER Check for Samples: OPA209, OPA2209, OPA4209 FEATURES DESCRIPTION • • • • • • • The OPA209 series of precision operational amplifiers achieve very low voltage noise density (2.2nV/√Hz) with a supply current of only 2.5mA (max). This series also offers rail-to-rail output swing, which helps to maximize dynamic range. 1 2 • • • LOW VOLTAGE NOISE: 2.2nV/√Hz at 1kHz 0.1Hz to 10Hz NOISE: 130nVPP LOW QUIESCENT CURRENT: 2.5mA/Ch (max) LOW OFFSET VOLTAGE: 150mV (max) GAIN BANDWIDTH PRODUCT: 18MHz SLEW RATE: 6.4V/ms WIDE SUPPLY RANGE: ±2.25V to ±18V, +4.5V to +36V RAIL-TO-RAIL OUTPUT SHORT-CIRCUIT CURRENT: ±65mA AVAILABLE IN SOT23-5, MSOP-8, SO-8, AND TSSOP-14 PACKAGES APPLICATIONS • • • • • The OPA209 is specified over a wide dual power-supply range of ±2.25 to ±18V, or single-supply operation from +4.5V to +36V. The OPA209 is available in the SOT23-5, MSOP-8 and the standard SO-8 packages. The dual OPA2209 comes in both MSOP-8 and SO-8 packages. The quad OPA4209 is available in the TSSOP-14 package. The OPA209 series is specified from –40°C to +125°C. 0.1Hz to 10Hz NOISE 50nV/div • • • • • • PLL LOOP FILTERS LOW-NOISE, LOW-POWER SIGNAL PROCESSING LOW-NOISE INSTRUMENTATION AMPLIFIERS HIGH-PERFORMANCE ADC DRIVERS HIGH-PERFORMANCE DAC OUTPUT AMPLIFIERS ACTIVE FILTERS ULTRASOUND AMPLIFIERS PROFESSIONAL AUDIO PREAMPLIFIERS LOW-NOISE FREQUENCY SYNTHESIZERS INFRARED DETECTOR AMPLIFIERS HYDROPHONE AMPLIFIERS In precision data acquisition applications, the OPA209 provides fast settling time to 16-bit accuracy, even for 10V output swings. This excellent ac performance, combined with only 150mV (max) of offset and low drift over temperature, makes the OPA209 very suitable for fast, high-precision applications. Time (1s/div) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2010, Texas Instruments Incorporated OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT OPA209 OPA2209 OPA4209 (1) PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING SOT23-5 DBV OOBQ MSOP-8 DGK OOAQ OPA209A SO-8 D MSOP-8 DGK OOJI SO-8 D O2209 TSSOP-14 PW OPA4209 For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VS = (V+) – (V–) Signal Input Terminal, Voltage (2) Signal Input Terminal, Current (except power-supply pins) (2) OPA209, OPA2209, OPA4209 UNIT 40 V (V–) – 0.5 to (V+) + 0.5 V 10 mA Output Short-Circuit (3) Continuous Operating Temperature TA –55 to +150 °C Storage Temperature TA –65 to +150 °C TJ Junction Temperature ESD Ratings: (1) (2) (3) 2 +200 °C Human Body Model (HBM) 3000 V Charged Device Model (CDM) 1000 V Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. For input voltages beyond the power-supply rails, voltage or current must be limited. Short-circuit to ground, one amplifier per package. Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. OPA209, OPA2209, OPA4209 PARAMETER CONDITIONS MIN TYP MAX UNIT ±35 ±150 mV 1 3 mV/°C 0.05 0.5 mV/V 1 mV/V OFFSET VOLTAGE Input Offset Voltage Drift vs Power Supply VOS VS = ±15, VCM = 0V dVOS/dT PSRR over Temperature VS = ±2.25V to ±18V VS = ±2.25V to ±18V Channel Separation, dc (dual and quad versions) 1 mV/V INPUT BIAS CURRENT Input Bias Current IB VCM = 0V ±1 ±4.5 nA over Temperature, -40°C to +85°C VCM = 0V ±8 nA over Temperature, -40°C to +125°C VCM = 0V ±15 nA ±4.5 nA Input Offset Current IOS VCM = 0V ±0.7 over Temperature, -40°C to +85°C VCM = 0V ±8 nA over Temperature, -40°C to +125°C VCM = 0V ±15 nA NOISE Input Voltage Noise, XXXf = 0.1Hz to 10Hz 0.13 mVPP Noise Density, f = 10Hz 3.3 nV/√Hz Noise Density, f = 100Hz 2.25 nV/√Hz Noise Density, f = 1kHz 2.2 nV/√Hz 500 fA/√Hz Input Current Noise Density, f = 1kHz en In INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio, over Temperature VCM CMRR (V–) + 1.5V (V–) + 1.5V < VCM < (V+) – 1.5V 120 (V+) – 1.5V V 130 dB Differential 200 || 4 kΩ || pF Common-Mode 109 || 2 Ω || pF INPUT IMPEDANCE OPEN-LOOP GAIN Open-Loop Voltage Gain AOL over Temperature over Temperature (V–) + 0.2V < VO < (V+) – 0.2V, RL = 10kΩ 126 (V–) + 0.2V < VO < (V+) – 0.2V, RL = 10kΩ 120 (V–) + 0.6V < VO < (V+) – 0.6V, RL = 600Ω (1) 114 (V–) + 0.6V < VO < (V+) – 0.6V, RL = 1kΩ 110 132 dB dB 120 dB dB FREQUENCY RESPONSE Gain Bandwidth Product GBW 18 Slew Rate SR 6.4 V/ms Phase margin qm RL = 10kΩ, CL = 25pF 80 Degrees G = –1, 10V Step, CL = 100pF 2.1 ms G = –1, 10V Step, CL = 100pF 2.6 ms G = –1 <1 ms G = +1, f = 1kHz, VO = 20VPP, 600Ω 0.000025 % Settling Time, 0.1% tS Settling Time, 0.0015% (16-bit) Overload Recovery Time Total Harmonic Distortion + Noise (1) THD+N MHz See the Thermal Information table for additional information. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 3 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. OPA209, OPA2209, OPA4209 PARAMETER CONDITIONS MIN TYP MAX UNIT OUTPUT Voltage Output Swing over Temperature Short-Circuit Current RL = 10kΩ, AOL > 130dB (V–) + 0.2V (V+) – 0.2V V RL = 600Ω, AOL > 114dB (V–) + 0.6V (V+) – 0.6V V RL = 10kΩ, AOL > 120dB (V–) + 0.2V (V+) – 0.2V ISC Capacitive Load Drive (stable operation) VS = ±18V ±65 CLOAD See Typical Characteristics ZO See Typical Characteristics Open-Loop Output Impedance V mA POWER SUPPLY Specified Voltage VS Quiescent Current (per amplifier) IQ ±2.25 IO = 0A 2.2 over Temperature ±18 V 2.5 mA 3.25 mA TEMPERATURE RANGE Specified Range TA –40 +125 °C Operating Range TA –55 +150 °C THERMAL INFORMATION THERMAL METRIC (1) OPA209AID OPA209AIDBV OPA209AIDGK D DBV DGK 8 5 8 qJA Junction-to-ambient thermal resistance (2) 135.5 204.9 142.6 qJCtop Junction-to-case (top) thermal resistance 73.7 200 46.9 qJB Junction-to-board thermal resistance 61.9 113.1 63.5 yJT Junction-to-top characterization parameter 19.7 38.2 5.3 yJB Junction-to-board characterization parameter 54.8 104.9 62.8 qJCbot Junction-to-case (bottom) thermal resistance n/a n/a n/a (1) (2) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. THERMAL INFORMATION THERMAL METRIC (1) OPA2209AID OPA2209AIDGK OPA4209AIPW D DGK PW 8 8 14 qJA Junction-to-ambient thermal resistance (2) 134.3 132.7 112.9 qJCtop Junction-to-case (top) thermal resistance 72.1 38.5 26.1 qJB Junction-to-board thermal resistance 60.7 52.1 61.0 yJT Junction-to-top characterization parameter 18.2 2.4 0.7 yJB Junction-to-board characterization parameter 53.8 52.8 59.2 qJCbot Junction-to-case (bottom) thermal resistance n/a n/a n/a (1) (2) 4 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 PIN CONFIGURATIONS OPA209 MSOP-8, SO-8 (TOP VIEW) NC (1) -IN OPA2209 MSOP-8, SO-8 (TOP VIEW) 1 2 (1) 8 NC 7 V+ 6 OUT 5 NC OUT A OPA209 +IN V- 3 4 1 -IN A 2 +IN A 3 V- 4 A B 8 V+ 7 OUT B 6 -IN B 5 +IN B (1) (1) NC = no internal connection OPA4209 TSSOP-14 (TOP VIEW) OPA209 SOT23-5 (TOP VIEW) OUT 1 V- 2 +IN 3 5 4 V+ -IN 14 OUT D OUT A 1 -IN A 2 +IN A 3 12 +IN D V+ 4 11 V- +IN B 5 -IN B 6 OUT B 7 Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 A D 13 -IN D 10 +IN C B C 9 -IN C 8 OUT C Submit Documentation Feedback 5 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VS = ±18V, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY INPUT CURRENT NOISE DENSITY vs FREQUENCY 10 Input Current Noise Density (nV/ÖHz) Input Voltage Noise Density (nV/ÖHz) 100 10 1 0.1 1 0.1 1 10 100 1k 10k 100k 0.1 1 10 Frequency (Hz) 1k 10k Figure 1. Figure 2. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE RATIO vs AMPLITUDE 0.001 1 VS = ±15V RL = 600W Total Harmonic Distortion+Noise (%) Total Harmonic Distortion+Noise (%) 100 Frequency (Hz) G = +11 VOUT = 3VRMS 0.0001 G = +1 VOUT = 3VRMS 0.00001 10 100 1k 10k 20k 0.1 0.01 0.001 G = +11 0.0001 G = +1 0.00001 0.01 0.1 Frequency (Hz) 1 10 100 Output Voltage Amplitude (VRMS) Figure 3. Figure 4. 0.1Hz TO 10Hz NOISE POWER-SUPPLY REJECTION RATIO vs FREQUENCY (REFERRED TO INPUT) 160 140 50nV/div PSRR (dB) 120 100 -PSRR 80 +PSRR 60 40 20 0 Time (1s/div) 0.1 1 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Figure 5. 6 Submit Documentation Feedback Figure 6. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±18V, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY 100000 Open-Loop Output Impedance (ZO) CMRR (dB) COMMON-MODE REJECTION RATIO vs FREQUENCY 150 140 130 120 110 100 90 80 70 60 50 40 30 20 1k 10k 100k 1M 10M 10000 1000 100 10 1 0.1 100M 1 10 Frequency (Hz) 100 1k Figure 7. OPEN-LOOP GAIN AND PHASE vs FREQUENCY 1M 10M 100M OPEN-LOOP GAIN vs TEMPERATURE 5 180 4 80 Phase 60 90 40 20 45 Phase (°) 135 Open-Loop Gain (mV/V) Gain 100 Gain (dB) 100k Figure 8. 140 120 10k Frequency (Hz) 3 RL = 10kW VS = ±18V 2 1 0 -1 -2 -3 0 100 1k 10k 100k 1M 10M -5 -50 0 -25 25 50 75 100 125 150 2.50 10 Temperature (°C) Frequency (Hz) Figure 10. OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Offset Voltage (mV) Figure 11. 2.00 1.75 1.50 1.25 0.75 0.50 0.25 0 -75.00 -67.50 -60.00 -52.50 -45.00 -37.50 -30.00 -22.50 -15.00 -7.50 0 7.50 15.00 22.50 30.00 37.50 45.00 52.50 60.00 67.50 75.00 Population Population Figure 9. 1.00 1 0 100M 2.25 -4 -20 Drift (mV/°C) Figure 12. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 7 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±18V, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. INPUT BIAS AND INPUT OFFSET CURRENTS vs TEMPERATURE 80 Input Offset Voltage (mV) 100 4 3 IOS 2 1 0 IB+ -1 IB- -2 -3 -4 VS = 36V 60 40 20 0 -20 -40 -60 -80 -5 -50 (V+)-0.5V (V+)-1.0.V 150 (V+)-1.5V 125 (V+)-2.0V 100 (V+)-2.5V 75 (V-)+2.5V 50 Temperature (°C) (V-)+2.0V 25 (V-)+0.5V 0 -25 (V-)+1.5V -100 (V-)+1.0V IB and IOS (nA) INPUT OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 5 Input Common-Mode Voltage (V) Figure 13. Figure 14. INPUT OFFSET VOLTAGE vs TIME INPUT OFFSET CURRENT vs SUPPLY VOLTAGE 20 4.5 18 3.5 16 2.5 1.5 12 IOS (nA) VOS Shift (mV) 14 Average of 36 Typical Units 10 8 0.5 -0.5 6 -1.5 4 -2.5 2 -3.5 0 -4.5 0 20 40 60 80 100 120 4 8 12 16 Time (s) Figure 15. 24 28 32 36 Figure 16. INPUT BIAS AND INPUT OFFSET CURRENTS vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs SUPPLY VOLTAGE 2.0 4 VS = 36V 10 Typical Units Shown 1.5 3 2 1.0 IB- IB+ 0.5 IB (nA) 1 0 IB-1 0 -0.5 IOS IB+ IOS (V+)-0.5V (V+)-1.0.V (V+)-1.5V (V+)-2.0V (V+)-2.5V (V+)-3.0V -2.0 (V-)+3.0V -4 (V-)+2.5V -1.5 (V-)+2.0V -3 (V-)+1.5V -1.0 (V-)+1.0V -2 (V-)+0.5V IB and IOS (nA) 20 VS (V) 4 8 12 16 20 24 28 32 36 Supply Voltage (V) Common-Mode Voltage (V) Figure 17. 8 Submit Documentation Feedback Figure 18. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±18V, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE 3.5 2.5 3.0 2.0 2.0 IQ (mA) IQ (mA) 2.5 1.5 1.5 1.0 1.0 0.5 0.5 0 -50 0 -25 0 25 50 75 100 125 150 0 4 8 12 16 Temperature (°C) Figure 19. SHORT-CIRCUIT CURRENT vs TEMPERATURE Output Voltage (V) ISC (mA) Sourcing VS = ±2.25V 0 Sinking VS = ±2.25V -40 +85°C 15 60 -20 28 32 36 OUTPUT VOLTAGE vs OUTPUT CURRENT 20 Sourcing VS = ±18V 80 20 24 Figure 20. 100 40 20 VS (V) VS = ±18V 0°C 10 05 +150°C 0 -50°C +125°C -40°C +85°C -05 0°C -10 -50°C -60 Sinking VS = ±18V -80 -100 -50 -15 -40°C -20 -25 0 25 50 75 100 125 150 20 30 40 Temperature (°C) 50 Figure 21. Figure 22. SMALL-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE RF 604W RL CL 20mV/div +18V OPA209 70 G = -1 CL = 100pF G = +1 RL = 604W CL = 100pF 20mV/div 60 Output Current (mA) RI 604W +18V OPA209 -18V CL -18V Time (0.1ms/div) Time (0.2ms/div) Figure 23. Figure 24. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 9 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±18V, RL = 10kΩ connected to midsupply, and VCM = VOUT = midsupply, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE G = -1 CL = 100pF G = +1 RL = 604W CL = 100pF 2V/div 2V/div +18V OPA209 RL RF 604W RI 604W CL -18V +18V OPA209 CL -18V Time (1ms/div) Time (1ms/div) Figure 25. Figure 26. NO PHASE REVERSAL NEGATIVE OVERLOAD RECOVERY G = -10 Output VIN 5V/div 5V/div 0V +18V 10kW 1kW OPA209 Output VOUT -18V 37VPP Sine Wave (±18.5V) OPA209 VOUT VIN 0.25ms/div Time (0.5ms/div) Figure 27. Figure 28. POSITIVE OVERVOLTAGE RECOVERY SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD 60 10kW 1kW OPA209 VOUT 50 VOUT VIN 5V/div Overshoot (%) G = +1 0V VIN 40 G = -1 30 20 10 G = -10 Time (0.5ms/div) 0 0 200 400 600 800 1000 1200 1400 1600 Capacitive Load (pF) Figure 29. 10 Submit Documentation Feedback Figure 30. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 APPLICATION INFORMATION DESCRIPTION OPERATING VOLTAGE The OPA209 series of precision operational amplifiers are unity-gain stable, and free from unexpected output and phase reversal. Applications with noisy or high-impedance power supplies require decoupling capacitors placed close to the device pins. In most cases, 0.1mF capacitors are adequate. Figure 31 shows a simplified schematic of the OPA209. This die uses a SiGe bipolar process and contains 180 transistors. The OPA209 series of op amps can be used with single or dual supplies within an operating range of VS = +4.5V (±2.25V) up to +36V (±18V). Supply voltages higher than 40V total can permanently damage the device; see the Absolute Maximum Ratings table. In addition, key parameters are assured over the specified temperature range, TA = –40°C to +125°C. Parameters that vary significantly with operating voltage or temperature are shown in the Typical Characteristics section of this data sheet. V+ Pre-Output Driver OUT IN- IN+ V- Figure 31. OPA209 Simplified Schematic Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 11 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com The input terminals of the OPA209 are protected from excessive differential voltage with back-to-back diodes, as shown in Figure 32. In most circuit applications, the input protection circuitry has no consequence. However, in low-gain or G = 1 circuits, fast ramping input signals can forward-bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 25 and Figure 26 of the Typical Characteristics. If the input signal is fast enough to create this forward-bias condition, the input signal current must be limited to 10mA or less. If the input signal current is not inherently limited, an input series resistor can be used to limit the signal input current. This input series resistor degrades the low-noise performance of the OPA209. See the Noise Performance section for further information on noise performance. Figure 32 shows an example configuration that implements a current-limiting feedback resistor. RF The equation in Figure 33 shows the calculation of the total circuit noise, with these parameters: • en = voltage noise, • in = current noise, • RS = source impedance, • k = Boltzmann's constant = 1.38 × 10–23 J/K, • and T = temperature in kelvins. For more details on calculating noise, see the Basic Noise Calculations section. VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE 10k Votlage Noise Spectral Density, EO INPUT PROTECTION EO 1k RS OPA209 100 OPA827 Resistor Noise 10 2 1k 100 - 2 2 EO = en + (in RS) + 4kTRS 1 10k 100k 1M Source Resistance, RS (W) OPA209 RI Input Output Figure 33. Noise Performance of the OPA209 and OPA827 in Unity-Gain Buffer Configuration + BASIC NOISE CALCULATIONS Figure 32. Pulsed Operation NOISE PERFORMANCE Figure 33 shows the total circuit noise for varying source impedances with the op amp in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). Two different op amps are shown with the total circuit noise calculated. The OPA209 has very low voltage noise, making it ideal for low source impedances (less than 2kΩ). As a comparable precision FET-input op amp (very low current noise), the OPA827 has somewhat higher voltage noise, but lower current noise. It provides excellent noise performance at moderate to high source impedance (10kΩ and up). For source impedance lower than 300Ω, the OPA211 may provide lower noise. 12 Submit Documentation Feedback Low-noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in many cases; consider the effect of source resistance on overall op amp noise performance. Total noise of the circuit is the root-sum-square combinations of all noise components. The resistive portion of the source impedance produces thermal noise proportional to the square root of the resistance. This function is illustrated in Figure 33. The source impedance is usually fixed; consequently, select the appropriate op amp and the feedback resistors to minimize the respective contributions to the total noise. Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 Figure 34 illustrates both noninverting (Figure 34a) and inverting (Figure 34b) op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise. The current noise of the op amp reacts with the feedback resistors to create additional noise components. The feedback resistor values can generally be chosen to make these noise sources negligible. Note that low-impedance feedback resistors load the output of the amplifier. The equations for total noise are shown for both configurations. A) Noise in Noninverting Gain Configuration Noise at the output: R2 2 2 EO R1 = 1+ R2 R1 2 2 2 2 2 2 en + e1 + e2 + (inR2) + eS + (inRS) EO R2 Where eS = Ö4kTRS ´ 1 + R1 2 1+ R2 R1 = thermal noise of RS RS e1 = Ö4kTR1 ´ VS R2 R1 = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 B) Noise in Inverting Gain Configuration Noise at the output: R2 2 2 EO = 1 + R1 R2 R1 + RS EO RS Where eS = Ö4kTRS ´ 2 2 2 2 2 en + e1 + e2 + (inR2) + eS R2 R1 + RS = thermal noise of RS VS e1 = Ö4kTR1 ´ R2 R1 + RS = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 NOTE: For the OPA209 series op amps at 1kHz, en = 2.2nV/√Hz and In = 530fA/√Hz. Figure 34. Noise Calculation in Gain Configurations Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 13 OPA209 OPA2209 OPA4209 SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 www.ti.com ELECTRICAL OVERSTRESS Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. It is helpful to have a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event. See Figure 35 for an illustration of the ESD circuits contained in the OPA209 series (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where they meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation. An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high-current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent it from being damaged. The energy absorbed by the protection circuitry is then dissipated as heat. When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or more of the steering diodes. Depending on the path that the current takes, the absorption device may activate. The absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPA209 but below the device breakdown voltage level. Once this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. When the operational amplifier connects into a circuit such as the one Figure 35 shows, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. Should this condition occur, there is a risk that some of the internal ESD protection circuits may be biased on, and conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption device. Figure 35 depicts a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by 500mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current levels can flow with increasingly higher VIN. As a result, the datasheet specifications recommend that applications limit the input current to 10mA. If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. Another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies +VS and/or –VS are at 0V. Again, it depends on the supply characteristic while at 0V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current steering diodes. This state is not a normal bias condition; the amplifier most likely will not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path. If there is an uncertainty about the ability of the supply to absorb this current, external zener diodes may be added to the supply pins as shown in Figure 35. The zener voltage must be selected such that the diode does not turn on during normal operation. However, its zener voltage should be low enough so that the zener diode conducts if the supply pin begins to rise above the safe operating supply voltage level. 14 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 OPA209 OPA2209 OPA4209 www.ti.com SBOS426B – NOVEMBER 2008 – REVISED AUGUST 2010 (2) TVS RF +V +VS OPA209 RI ESD CurrentSteering Diodes -In (3) RS +In Op Amp Core Edge-Triggered ESD Absorption Circuit ID VIN Out RL (1) -V -VS (2) TVS (1) VIN = +VS + 500mV. (2) TVS: +VS(max) > VTVSBR (Min) > +VS (3) Suggested value approximately 1kΩ. Figure 35. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): OPA209 OPA2209 OPA4209 Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 4-Sep-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) OPA209AID PREVIEW SOIC D 8 75 TBD Call TI Call TI Samples Not Available OPA209AIDBVR PREVIEW SOT-23 DBV 5 3000 TBD Call TI Call TI Samples Not Available OPA209AIDBVT PREVIEW SOT-23 DBV 5 250 TBD Call TI Call TI Samples Not Available OPA209AIDGKR PREVIEW MSOP DGK 8 2500 TBD Call TI Call TI Samples Not Available OPA209AIDGKT PREVIEW MSOP DGK 8 250 TBD Call TI Call TI Samples Not Available OPA209AIDR PREVIEW SOIC D 8 2500 TBD Call TI Call TI Samples Not Available OPA2209AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) OPA2209AIDGKR PREVIEW MSOP DGK 8 2500 TBD Call TI Call TI Samples Not Available OPA2209AIDGKT PREVIEW MSOP DGK 8 250 TBD Call TI Call TI Samples Not Available OPA2209AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) OPA4209AIPW PREVIEW TSSOP PW 14 90 TBD Call TI Call TI Samples Not Available OPA4209AIPWR PREVIEW TSSOP PW 14 2000 TBD Call TI Call TI Samples Not Available CU NIPDAU Level-2-260C-1 YEAR CU NIPDAU Level-2-260C-1 YEAR Purchase Samples Request Free Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 4-Sep-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device OPA2209AIDR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2209AIDR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DLP® Products www.dlp.com Communications and Telecom www.ti.com/communications DSP dsp.ti.com Computers and Peripherals www.ti.com/computers Clocks and Timers www.ti.com/clocks Consumer Electronics www.ti.com/consumer-apps Interface interface.ti.com Energy www.ti.com/energy Logic logic.ti.com Industrial www.ti.com/industrial Power Mgmt power.ti.com Medical www.ti.com/medical Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Space, Avionics & Defense www.ti.com/space-avionics-defense RF/IF and ZigBee® Solutions www.ti.com/lprf Video and Imaging www.ti.com/video Wireless www.ti.com/wireless-apps Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2010, Texas Instruments Incorporated